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MSPC (PLDI) 2012: Beijing, China
- Lixin Zhang, Onur Mutlu:

Proceedings of the 2012 ACM SIGPLAN workshop on Memory Systems Performance and Correctness: held in conjunction with PLDI '12, Beijing, China, June 16, 2012. ACM 2012, ISBN 978-1-4503-1219-6 - Erez Petrank:

Can parallel data structures rely on automatic memory managers? 1
Locality and memory models
- Meng-Ju Wu, Donald Yeung:

Identifying optimal multicore cache hierarchies for loop-based parallel programs via reuse distance analysis. 2-11 - Hans-Juergen Boehm:

Can seqlocks get along with programming language memory models? 12-20
Memory scheduling
- Zhe Wang, Samira Manabi Khan, Daniel A. Jiménez:

Rank idle time prediction driven last-level cache writeback. 21-29 - Pengfei Zhu, Mingyu Chen, Yungang Bao, Licheng Chen, Yongbing Huang:

Trace-driven simulation of memory system scheduling in multithread application. 30-37
Memory management
- Ronald Veldema, Michael Philippsen

:
Parallel memory defragmentation on a GPU. 38-47 - Erik Österlund, Welf Löwe:

Analysis of pure methods using garbage collection. 48-57 - Matthew Davis, Peter Schachte

, Zoltan Somogyi, Harald Søndergaard
:
Towards region-based memory management for Go. 58-67
Poster potpourri
- Chen Ding, Xiaoya Xiang:

A higher order theory of locality. 68-69 - Hyesoon Kim:

Supporting virtual memory in GPGPU without supporting precise exceptions. 70-71 - Eddy Z. Zhang, Han Li, Xipeng Shen:

A study towards optimal data layout for GPU computing. 72-73 - Jieun Lim

, Hyesoon Kim:
Design space exploration of memory model for heterogeneous computing. 74-75 - Bin Bao, Xiaoya Xiang:

Defensive loop tiling for multi-core processor. 76-77

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