Vectorization-aware loop unrolling with seed forwarding.

Vasileios Porpodas Rodrigo C. O. Rocha Vasileios Porpodas Pavlos Petoumenos Luís F. W. Góes Zheng Wang 0001 Murray Cole Hugh Leather Vectorization-aware loop unrolling with seed forwarding. 1-13 2020 CC https://doi.org/10.1145/3377555.3377890 https://www.wikidata.org/entity/Q130894310 conf/cc/2020 db/conf/cc/cc2020.html#RochaPPG0CL20 Vasileios Porpodas Rodrigo C. O. Rocha Evgueni Brevnov Luís F. W. Góes Timothy G. Mattson Super-Node SLP: Optimized Vectorization for Code Sequences Containing Operators and Their Inverse Elements. 206-216 2019 CGO https://doi.org/10.1109/CGO.2019.8661192 https://dl.acm.org/citation.cfm?id=3314897 conf/cgo/2019 db/conf/cgo/cgo2019.html#PorpodasRBGM19 Vasileios Porpodas Pushkar Ratnalikar PostSLP: Cross-Region Vectorization of Fully or Partially Vectorized Code. 15-31 2019 LCPC https://doi.org/10.1007/978-3-030-72789-5_2 conf/lcpc/2019 db/conf/lcpc/lcpc2019.html#PorpodasR19

Vasileios Porpodas ZOFI: Zero-Overhead Fault Injection Tool for Fast Transient Fault Coverage Analysis. 2019 abs/1906.09390 CoRR http://arxiv.org/abs/1906.09390 db/journals/corr/corr1906.html#abs-1906-09390

Vasileios Porpodas Rodrigo C. O. Rocha Luís F. W. Góes VW-SLP: auto-vectorization with adaptive vector width. 12:1-12:15 2018 PACT https://doi.org/10.1145/3243176.3243189 conf/IEEEpact/2018 db/conf/IEEEpact/pact2018.html#PorpodasRG18 Vasileios Porpodas Rodrigo C. O. Rocha Luís F. W. Góes Look-ahead SLP: auto-vectorization in the presence of commutative operations. 163-174 2018 CGO https://doi.org/10.1145/3168807 conf/cgo/2018 db/conf/cgo/cgo2018.html#PorpodasRG18 Vasileios Porpodas SuperGraph-SLP Auto-Vectorization. 330-342 2017 PACT https://doi.org/10.1109/PACT.2017.21 https://doi.ieeecomputersociety.org/10.1109/PACT.2017.21 conf/IEEEpact/2017 db/conf/IEEEpact/pact2017.html#Porpodas17 Xinmin Tian Hideki Saito 0001 Ernesto Su Jin Lin Satish Guggilla Diego Caballero Matt Masten Andrew Savonichev Michael Rice Elena Demikhovsky Ayal Zaks Gil Rapaport Abhinav Gaba Vasileios Porpodas Eric N. Garcia LLVM Compiler Implementation for Explicit Parallelization and SIMD Vectorization. 4:1-4:11 2017 LLVM-HPC@SC https://doi.org/10.1145/3148173.3148191 https://www.wikidata.org/entity/Q130837595 conf/sc/2017llvm db/conf/sc/llvm2017.html#TianSSLGCMSRDZR17 Konstantina Mitropoulou Vasileios Porpodas Timothy M. Jones 0001 COMET: communication-optimised multi-threaded error-detection technique. 7:1-7:10 2016 CASES https://doi.org/10.1145/2968455.2968508 https://www.wikidata.org/entity/Q130984912 conf/cases/2016 db/conf/cases/cases2016.html#MitropoulouPJ16 Konstantina Mitropoulou Vasileios Porpodas Xiaochun Zhang Timothy M. Jones 0001 Lynx: Using OS and Hardware Support for Fast Fine-Grained Inter-Core Communication. 18:1-18:12 2016 ICS https://doi.org/10.1145/2925426.2926274 conf/ics/2016 db/conf/ics/ics2016.html#MitropoulouPZJ16 Vasileios Porpodas Timothy M. Jones 0001 Throttling Automatic Vectorization: When Less is More. 432-444 2015 PACT https://doi.org/10.1109/PACT.2015.32 https://doi.ieeecomputersociety.org/10.1109/PACT.2015.32 conf/IEEEpact/2015 db/conf/IEEEpact/pact2015.html#PorpodasJ15 Vasileios Porpodas Alberto Magni Timothy M. Jones 0001 PSLP: padded SLP automatic vectorization. 190-201 2015 CGO https://doi.org/10.1109/CGO.2015.7054199 https://doi.ieeecomputersociety.org/10.1109/CGO.2015.7054199 http://dl.acm.org/citation.cfm?id=2738625 conf/cgo/2015 db/conf/cgo/cgo2015.html#PorpodasMJ15 Vasileios Porpodas Marcelo Cintra CAeSaR: Unified cluster-assignment scheduling and communication reuse for clustered VLIW processors. 9:1-9:10 2013 CASES https://doi.org/10.1109/CASES.2013.6662513 http://dl.acm.org/citation.cfm?id=2555738 conf/cases/2013 db/conf/cases/cases2013.html#PorpodasC13 Konstantina Mitropoulou Vasileios Porpodas Marcelo Cintra CASTED: Core-Adaptive Software Transient Error Detection for Tightly Coupled Cores. 513-524 2013 IPDPS https://doi.org/10.1109/IPDPS.2013.107 https://doi.ieeecomputersociety.org/10.1109/IPDPS.2013.107 conf/ipps/2013 db/conf/ipps/ipdps2013.html#MitropoulouPC13 Konstantina Mitropoulou Vasileios Porpodas Marcelo Cintra DRIFT: Decoupled CompileR-Based Instruction-Level Fault-Tolerance. 217-233 2013 LCPC https://doi.org/10.1007/978-3-319-09967-5_13 conf/lcpc/2013 db/conf/lcpc/lcpc2013.html#MitropoulouPC13 Vasileios Porpodas Marcelo Cintra Aligned Scheduling: Cache-Efficient Instruction Scheduling for VLIW Processors. 275-291 2013 LCPC https://doi.org/10.1007/978-3-319-09967-5_16 conf/lcpc/2013 db/conf/lcpc/lcpc2013.html#PorpodasC13 Vasileios Porpodas Marcelo Cintra LUCAS: latency-adaptive unified cluster assignment and instruction scheduling. 45-54 2013 LCTES https://doi.org/10.1145/2491899.2465565 https://doi.org/10.1145/2499369.2465565 conf/lctrts/2013 db/conf/lctrts/lctes2013.html#PorpodasC13 Karthik T. Sundararajan Vasileios Porpodas Timothy M. Jones 0001 Nigel P. Topham Björn Franke Cooperative partitioning: Energy-efficient cache partitioning for high-performance CMPs. 311-322 2012 HPCA https://doi.org/10.1109/HPCA.2012.6169036 https://doi.ieeecomputersociety.org/10.1109/HPCA.2012.6169036 conf/hpca/2012 db/conf/hpca/hpca2012.html#SundararajanPJTF12 Vasileios Porpodas Marcelo Cintra UCIFF: Unified Cluster Assignment Instruction Scheduling and Fast Frequency Selection for Heterogeneous Clustered VLIW Cores. 127-142 2012 LCPC https://doi.org/10.1007/978-3-642-37658-0_9 conf/lcpc/2012 db/conf/lcpc/lcpc2012.html#PorpodasC12

Athanasios Milidonis Nikolaos Alachiotis 0002 Vasileios Porpodas Harris E. Michail George A. Panagiotakopoulos Athanasios P. Kakarountas Costas E. Goutis Decoupled Processors Architecture for Accelerating Data Intensive Applications using Scratch-Pad Memory Hierarchy. 281-296 2010 59 J. Signal Process. Syst. 3 https://doi.org/10.1007/s11265-009-0393-9 db/journals/vlsisp/vlsisp59.html#MilidonisAPMPKG10

Athanasios Milidonis Vasileios Porpodas Nikolaos Alachiotis 0002 Athanasios P. Kakarountas Harris E. Michail George A. Panagiotakopoulos Costas E. Goutis Low-power architecture with scratch-pad memory for accelerating embedded applications with run-time reuse. 109-123 2009 3 IET Comput. Digit. Tech. 1 https://doi.org/10.1049/iet-cdt:20070145 db/journals/iet-cdt/iet-cdt3.html#MilidonisPAKMPG09

Athanasios Milidonis Nikolaos Alachiotis 0002 Vasileios Porpodas Haralambos Michail Athanasios Kakarountas Constantinos E. Goutis Interactive presentation: A decoupled architecture of processors with scratch-pad memory hierarchy. 612-617 2007 conf/date/2007 DATE https://doi.org/10.1109/DATE.2007.364661 https://doi.ieeecomputersociety.org/10.1109/DATE.2007.364661 http://dl.acm.org/citation.cfm?id=1266495 db/conf/date/date2007.html#MilidonisAPMKG07 Nikolaos Alachiotis 0002 Evgueni Brevnov Diego Caballero Marcelo Cintra Murray Cole Elena Demikhovsky Björn Franke Abhinav Gaba Eric N. Garcia Fabrício GóesLuís F. W. Góes Constantinos E. GoutisCostas E. Goutis Satish Guggilla Timothy M. Jones 0001 Athanasios KakarountasAthanasios P. Kakarountas Hugh Leather Jin Lin Alberto Magni Matt Masten Timothy G. Mattson Harris E. MichailHaralambos Michail Athanasios Milidonis Konstantina Mitropoulou George A. Panagiotakopoulos Pavlos Petoumenos Gil Rapaport Pushkar Ratnalikar Michael Rice Rodrigo Caetano RochaRodrigo C. O. Rocha Hideki Saito 0001 Andrew Savonichev Ernesto Su Karthik T. Sundararajan Xinmin Tian Nigel P. Topham Zheng Wang 0001 Ayal Zaks Xiaochun Zhang