RRAM-DNN: An RRAM and Model-Compression Empowered All-Weights-On-Chip DNN Accelerator.

George Tsou

Ziyun Li 0001 Zhehong Wang Li Xu 0006 Qing Dong 0001 Bowen Liu 0001 Chin-I Su Wen-Ting Chu George Tsou Yu-Der Chih Tsung-Yung Jonathan Chang Dennis Sylvester Hun-Seok Kim David T. Blaauw RRAM-DNN: An RRAM and Model-Compression Empowered All-Weights-On-Chip DNN Accelerator. 1105-1115 2021 56 IEEE J. Solid State Circuits 4 https://doi.org/10.1109/JSSC.2020.3045369 db/journals/jssc/jssc56.html#LiW00LSCTCCSKB21

Zhehong Wang Ziyun Li 0001 Li Xu 0006 Qing Dong 0001 Chin-I Su Wen-Ting Chu George Tsou Yu-Der Chih Tsung-Yung Jonathan Chang Dennis Sylvester Hun-Seok Kim David T. Blaauw An All-Weights-on-Chip DNN Accelerator in 22nm ULL Featuring 24×1 Mb eRRAM. 1-2 2020 VLSI Circuits https://doi.org/10.1109/VLSICircuits18222.2020.9162811 conf/vlsic/2020 db/conf/vlsic/vlsic2020.html#WangLX0SCTCCSKB20 David T. Blaauw Tsung-Yung Jonathan Chang Yu-Der Chih Wen-Ting Chu Qing Dong 0001 Hun-Seok Kim Ziyun Li 0001 Bowen Liu 0001 Chin-I Su Dennis Sylvester Zhehong Wang Li Xu 0006