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Jinho Park 0006
Person information
- affiliation: Point2 Technology, Seoul, South Korea
- affiliation: TeraSquare Inc., Seoul, South Korea
- affiliation: Marvell Semiconductor, Sunnyvale, CA, USA
- affiliation (PhD 2003): University of Washington, Department of Electrical Engineering, Seattle, WA, USA
Other persons with the same name
- Jinho Park (aka: Jin-ho Park, Jin-Ho Park, Jin Ho Park) — disambiguation page
- Jinho Park 0001
— Kwangwoon University, Department of Electronics and Communications Engineering, Seoul, South Korea - Jinho Park 0002
— Soongsil University, Global School of Media, Seoul, South Korea (and 1 more) - Jinho Park 0003
— National Institutes of Health (NIH), Bethesda, MD, USA (and 1 more) - Jinho Park 0004
— Columbia University, VLSI Lab, New York City, NY, USA - Jinho Park 0005 — Korea Advanced Institute of Science and Technology (KAIST), Daejeon, South Korea
- Jin Ho Park 0007 (aka: Jin-Ho Park 0007, Jin-ho Park 0007, Jinho Park 0007) — Seoul National University of Science and Technology (SeoulTech), Department of Computer Science and Engineering, Seoul, South Korea (and 1 more)
- Jin-Ho Park 0008
(aka: Jinho Park 0008) — Sungkyunkwan University, Interdisciplinary Program in Photovoltaic System Engineering, Suwon, South Korea - Jin Ho Park 0009 (aka: Jinho Park 0009) — Seoul National University Hospital, Healthcare System Gangnam Center, Seoul, South Korea
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2020 – today
- 2024
[j8]Woohyun Kwon
, Hyosup Won, Taeho Kim, Sejun Jeon
, Soon-Won Kwon
, Ha-Il Song, Hanho Choi
, Bongjin Kim
, Huxian Jin, Jun-Gi Jo, Woosang Han, Tai-Young Kim, Gain Kim
, Jake Eu, Jinho Park, Hyeon-Min Bae
:
A 26-Gb/s Framed-Pulsewidth Modulation Transceiver for Extended Reach Optical Links. IEEE J. Solid State Circuits 59(8): 2506-2517 (2024)- 2022
[c8]Woohyun Kwon
, Hyosup Won, Taeho Kim, Ha-Il Song, Hanho Choi, Sejun Jeon, Soon-Won Kwon, Huxian Jin, Jun-Gi Jo, Tai Young Kim, Jake Eu, Jinho Park, Hyeon-Min Bae:
A 25.78125Gbps Bi-directional Transceiver with Framed-Pulsewidth Modulation (FPWM) for Extended Reach Optical Links in 28nm CMOS. VLSI Technology and Circuits 2022: 156-157
2010 – 2019
- 2017
[j7]Taehun Yoon
, Joon-Yeong Lee, Jinhee Lee, Kwangseok Han, Jeong-Sup Lee, Sangeun Lee, Taeho Kim, Jinho Han, Hyosup Won, Jinho Park, Hyeon-Min Bae:
A 103.125-Gb/s Reverse Gearbox IC in 40-nm CMOS for Supporting Legacy 10- and 40-GbE Links. IEEE J. Solid State Circuits 52(3): 688-703 (2017)
[j6]Hyosup Won
, Joon-Yeong Lee, Taehun Yoon, Kwangseok Han, Sangeun Lee, Jinho Park, Hyeon-Min Bae:
A 28-Gb/s Receiver With Self-contained Adaptive Equalization and Sampling Point Control Using Stochastic Sigma-Tracking Eye-Opening Monitor. IEEE Trans. Circuits Syst. I Regul. Pap. 64-I(3): 664-674 (2017)- 2016
[j5]Joon-Yeong Lee, Kwangseok Han, Taehun Yoon, Taeho Kim, Sangeun Lee, Jeong-Sup Lee, Jinho Park, Hyeon-Min Bae
:
A Power-and-Area Efficient 10 × 10 Gb/s Bootstrap Transceiver in 40 nm CMOS for Referenceless and Lane-Independent Operation. IEEE J. Solid State Circuits 51(10): 2475-2484 (2016)- 2015
[j4]Hyosup Won, Taehun Yoon, Jinho Han, Joon-Yeong Lee, Jong-Hyeok Yoon, Taeho Kim, Jeong-Sup Lee, Sangeun Lee, Kwangseok Han, Jinhee Lee, Jinho Park, Hyeon-Min Bae:
A 0.87 W Transceiver IC for 100 Gigabit Ethernet in 40 nm CMOS. IEEE J. Solid State Circuits 50(2): 399-413 (2015)
[j3]Soon-Won Kwon
, Joon-Yeong Lee, Jinhee Lee, Kwangseok Han, Taeho Kim, Sangeun Lee, Jeong-Sup Lee, Taehun Yoon, Hyosup Won, Jinho Park, Hyeon-Min Bae:
An Automatic Loop Gain Control Algorithm for Bang-Bang CDRs. IEEE Trans. Circuits Syst. I Regul. Pap. 62-I(12): 2817-2828 (2015)
[c7]Joon-Yeong Lee, Kwangseok Han, Taeho Kim, Sangeun Lee, Jeong-Sup Lee, Taehun Yoon, Jinho Park, Hyeon-Min Bae:
A power-and-area efficient 10 × 10 Gb/s bootstrap transceiver in 40 nm CMOS for reference-less and lane-independent operation. CICC 2015: 1-4
[c6]Hyosup Won, Kwangseok Han, Sangeun Lee, Jinho Park, Hyeon-Min Bae:
An on-chip stochastic sigma-tracking eye-opening monitor for BER-optimal adaptive equalization. CICC 2015: 1-4
[c5]Taehun Yoon, Joon-Yeong Lee, Kwangseok Han, Jeong-Sup Lee, Sangeun Lee, Taeho Kim, Hyosup Won, Jinho Park, Hyeon-Min Bae:
A 100-GbE reverse gearbox IC in 40nm CMOS for supporting legacy 10- and 40-GbE standards. VLSIC 2015: 212-
2000 – 2009
- 2006
[j2]Jinho Park, David J. Allstot:
A matrix amplifier in 0.18-μm SOI CMOS. IEEE Trans. Circuits Syst. I Regul. Pap. 53-I(3): 561-568 (2006)- 2005
[c4]Hossein Zarei, Allan Ecker, Jinho Park, David J. Allstot:
A full-range all-pass variable phase shifter for multiple antenna receivers. ISCAS (3) 2005: 2100-2103- 2004
[j1]Jinho Park, Kiyong Choi, David J. Allstot:
Parasitic-aware RF circuit design and optimization. IEEE Trans. Circuits Syst. I Regul. Pap. 51-I(10): 1953-1966 (2004)
[c3]Jinho Park, David J. Allstot:
RF circuit synthesis using particle swarm optimization. ISCAS (5) 2004: 93-96
[c2]Jinho Park, David J. Allstot:
A 12.5 GHz RF matrix amplifier in 180nm SOI CMOS. ISCAS (1) 2004: 117-20- 2003
[c1]Jinho Park, Kiyong Choi, David J. Allstot:
Parasitic-aware design and optimization of a fully integrated CMOS wideband amplifier. ASP-DAC 2003: 904-907
Coauthor Index

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last updated on 2026-04-03 00:44 CEST by the dblp team
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