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BibTeX records: Yumiko Iyama
@inproceedings{DBLP:conf/vts/ImamiyaMOTI92,
author = {Ken{-}ichi Imamiya and
Jun{-}ichi Miyamoto and
Nobuaki Ohtuska and
Naoto Tomita and
Yumiko Iyama},
title = {Optimum redundancy design for new-generation EPROMs based on yield
analysis of previous generation},
booktitle = {10th {IEEE} {VLSI} Test Symposium (VTS'92), 7-9 Apr 1992, Atlantic
City, NJ, {USA}},
pages = {182--187},
publisher = {{IEEE} Computer Society},
year = {1992},
url = {https://doi.org/10.1109/VTEST.1992.232746},
doi = {10.1109/VTEST.1992.232746},
timestamp = {Wed, 22 Jan 2025 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/vts/ImamiyaMOTI92.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/TomitaOMIIMOAKSYT91,
author = {Naoto Tomita and
Nobuaki Ohtsuka and
Jun{-}ichi Miyamoto and
Ken{-}ichi Imamiya and
Yumiko Iyama and
Seiichi Mori and
Yoichi Ohshima and
Norihisa Arai and
Yukio Kaneko and
Eiji Sakagami and
Kuniyoshi Yoshikawa and
Sumio Tanaka},
title = {A 62-ns 16-Mb {CMOS} {EPROM} with voltage stress relaxation technique},
journal = {{IEEE} J. Solid State Circuits},
volume = {26},
number = {11},
pages = {1593--1599},
year = {1991},
url = {https://doi.org/10.1109/4.98977},
doi = {10.1109/4.98977},
timestamp = {Wed, 26 Feb 2025 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/jssc/TomitaOMIIMOAKSYT91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@inproceedings{DBLP:conf/itc/MiyamotoOITI91,
author = {Jun{-}ichi Miyamoto and
Nobuaki Ohtsuka and
Ken{-}ichi Imamiya and
Naoto Tomita and
Yumiko Iyama},
title = {Multi-Step Stress Test for Yield Improvement of 16Mbit EPROMs with
Redundancy Scheme},
booktitle = {Proceedings {IEEE} International Test Conference 1991, Test: Faster,
Better, Sooner, Nashville, TN, USA, October 26-30, 1991},
pages = {540--547},
publisher = {{IEEE} Computer Society},
year = {1991},
url = {https://doi.org/10.1109/TEST.1991.519716},
doi = {10.1109/TEST.1991.519716},
timestamp = {Wed, 22 Jan 2025 00:00:00 +0100},
biburl = {https://dblp.org/rec/conf/itc/MiyamotoOITI91.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/ImamiyaMAOMSHIMOAKNAYT90,
author = {Kenichi Imamiya and
Jun{-}ichi Miyamoto and
Shigeru Atsumi and
Nobuaki Ohtsuka and
Yukinori Muroya and
Toshiyuki Sako and
Masao Higashino and
Yumiko Iyama and
Seiichi Mori and
Yoichi Ohshima and
Hitoshi Araki and
Yukio Kaneko and
Kazuhito Narita and
Norihisa Arai and
Kuniyoshi Yoshikawa and
Shinichi Tanaka},
title = {A 68-ns 4-Mbit {CMOS} {EPROM} with high-noise-immunity design},
journal = {{IEEE} J. Solid State Circuits},
volume = {25},
number = {1},
pages = {72--78},
year = {1990},
url = {https://doi.org/10.1109/4.50287},
doi = {10.1109/4.50287},
timestamp = {Thu, 23 Jan 2025 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/jssc/ImamiyaMAOMSHIMOAKNAYT90.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}
@article{DBLP:journals/jssc/KuriyamaAIIMANMT90,
author = {Masao Kuriyama and
Shigeru Atsumi and
Ken{-}ichi Imamiya and
Yumiko Iyama and
Naohiro Matsukawa and
Hitoshi Araki and
Kazuhito Narita and
Kazunori Masuda and
Sumio Tanaka},
title = {A 16-ns 1-Mb {CMOS} {EPROM}},
journal = {{IEEE} J. Solid State Circuits},
volume = {25},
number = {5},
pages = {1141--1146},
year = {1990},
url = {https://doi.org/10.1109/4.62135},
doi = {10.1109/4.62135},
timestamp = {Mon, 03 Mar 2025 00:00:00 +0100},
biburl = {https://dblp.org/rec/journals/jssc/KuriyamaAIIMANMT90.bib},
bibsource = {dblp computer science bibliography, https://dblp.org}
}

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