BibTeX records: Nobuyuki Ishiwata

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@inproceedings{DBLP:conf/isscc/NebashiSHSIMKMOKOKSNISFHSK09,
  author       = {Ryusuke Nebashi and
                  Noboru Sakimura and
                  Hiroaki Honjo and
                  Shinsaku Saito and
                  Yuichi Ito and
                  Sadahiko Miura and
                  Yuko Kato and
                  Kaoru Mori and
                  Yasuaki Ozaki and
                  Yosuke Kobayashi and
                  Norikazu Ohshima and
                  Keizo Kinoshita and
                  Tetsuhiro Suzuki and
                  Kiyokazu Nagahara and
                  Nobuyuki Ishiwata and
                  Katsumi Suemitsu and
                  Shunsuke Fukami and
                  Hiromitsu Hada and
                  Tadahiko Sugibayashi and
                  Naoki Kasai},
  title        = {A 90nm 12ns 32Mb 2T1MTJ {MRAM}},
  booktitle    = {{IEEE} International Solid-State Circuits Conference, {ISSCC} 2009,
                  Digest of Technical Papers, San Francisco, CA, USA, 8-12 February,
                  2009},
  pages        = {462--463},
  publisher    = {{IEEE}},
  year         = {2009},
  url          = {https://doi.org/10.1109/ISSCC.2009.4977508},
  doi          = {10.1109/ISSCC.2009.4977508},
  timestamp    = {Sat, 19 Oct 2019 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/isscc/NebashiSHSIMKMOKOKSNISFHSK09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/jssc/SakimuraSHHSSIT07,
  author       = {Noboru Sakimura and
                  Tadahiko Sugibayashi and
                  Takeshi Honda and
                  Hiroaki Honjo and
                  Shinsaku Saito and
                  Tetsuhiro Suzuki and
                  Nobuyuki Ishiwata and
                  Shuichi Tahara},
  title        = {{MRAM} Cell Technology for Over 500-MHz SoC},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {42},
  number       = {4},
  pages        = {830--838},
  year         = {2007},
  url          = {https://doi.org/10.1109/JSSC.2007.891665},
  doi          = {10.1109/JSSC.2007.891665},
  timestamp    = {Sun, 02 Oct 2022 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jssc/SakimuraSHHSSIT07.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/jssc/SugibayashiSHNT07,
  author       = {Tadahiko Sugibayashi and
                  Noboru Sakimura and
                  Takeshi Honda and
                  Kiyokazu Nagahara and
                  Kiyotaka Tsuji and
                  Hideaki Numata and
                  Sadahiko Miura and
                  Ken{-}ichi Shimura and
                  Yuko Kato and
                  Shinsaku Saito and
                  Yoshiyuki Fukumoto and
                  Hiroaki Honjo and
                  Tetsuhiro Suzuki and
                  Katsumi Suemitsu and
                  Tomonori Mukai and
                  Kaoru Mori and
                  Ryusuke Nebashi and
                  Shunsuke Fukami and
                  Norikazu Ohshima and
                  Hiromitsu Hada and
                  Nobuyuki Ishiwata and
                  Naoki Kasai and
                  Shuichi Tahara},
  title        = {A 16-Mb Toggle {MRAM} With Burst Modes},
  journal      = {{IEEE} J. Solid State Circuits},
  volume       = {42},
  number       = {11},
  pages        = {2378--2385},
  year         = {2007},
  url          = {https://doi.org/10.1109/JSSC.2007.906195},
  doi          = {10.1109/JSSC.2007.906195},
  timestamp    = {Sun, 30 Aug 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/jssc/SugibayashiSHNT07.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}