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Stars

EDA

8 repositories

PicoRV32 - A Size-Optimized RISC-V CPU

Verilog 4,019 912 Updated Jun 27, 2024

EDA Playground -- The FREE IDE for SystemVerilog, Verilog, and VHDL

HTML 68 18 Updated Mar 10, 2026

BaseJump STL: A Standard Template Library for SystemVerilog

SystemVerilog 650 113 Updated Jan 19, 2026

Tamagotchi P1 for Analogue Pocket and MiSTer

SystemVerilog 170 3 Updated May 19, 2024

Collection of IP and information on how to develop for openFPGA and Analogue Pocket

SystemVerilog 126 4 Updated Aug 10, 2023

All code found on nandland is here. underconstruction.gif

Verilog 363 76 Updated Aug 21, 2022

4004 CPU and MCS-4 family chips

Verilog 47 11 Updated Jul 17, 2014

AXI, AXI stream, Ethernet, and PCIe components in System Verilog

SystemVerilog 660 105 Updated Mar 10, 2026