100% found this document useful (1 vote)
2K views2 pages

IAS Computer Instruction Set Overview

The document describes the instruction set of the IAS computer. It lists the opcode, symbolic representation, and description of various instruction types including data transfer, unconditional branches, conditional branches, arithmetic, and address modify instructions. Data transfer instructions move data between registers and memory. Branch instructions change the flow of execution. Arithmetic instructions perform operations like addition, subtraction, multiplication, and division. Address modify instructions update address fields in memory.

Uploaded by

shekhar_sharma1
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
100% found this document useful (1 vote)
2K views2 pages

IAS Computer Instruction Set Overview

The document describes the instruction set of the IAS computer. It lists the opcode, symbolic representation, and description of various instruction types including data transfer, unconditional branches, conditional branches, arithmetic, and address modify instructions. Data transfer instructions move data between registers and memory. Branch instructions change the flow of execution. Arithmetic instructions perform operations like addition, subtraction, multiplication, and division. Address modify instructions update address fields in memory.

Uploaded by

shekhar_sharma1
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd

Programme: B.

Tech Branch: Compute Science and Engineering Batch: I


Subject: COMPUTER ARCHITECTURE AND ORGANIZATION Code: CSE 205
Name: [Link]:

IAS Computer Instruction Set

Instruction Type Opcode Symbolic Description


Representation
Data Transfer: 00001010 LOAD MQ Transfer the contents of register
MQ to accumulator.
00001001 LOAD MQ,M(X) Transfer contents of Memory
location X to MQ
00100001 STOR M(X) Transfer contents of ACCU to
memory location X.
00000001 LOAD M(X) Transfer M(X) to ACCU
00000010 LOAD –M(X) Transfer -M(X) to ACCU
00000011 LOAD |M(X)| Transfer absolute value of |M(X)| to
ACCU.
00000100 LOAD -|M(X)| Transfer -|M(X)| to ACCU.
Unconditional 00001101 JUMP M(X,0:19) Take next instruction from left half
Branch: of M(X).
00001110 JUMP M(X,20:39) Take next instruction from right
half of M(X).
Conditional Branch: 00001111 JUMP +M(X,0:19) If number in the ACCU is non (-)
take next instruction from the left
half of M(X).
00010000 JUMP +M(X,20:39) If number in the ACCU is non (-)
take next instruction from the right
half of M(X).
Arithmetic: 00000101 ADD M(X) Add M(X) to ACCU, put the result
in ACCU
00000111 ADD |(X)| Add |M(X)| to ACCU, put the result
in ACCU.
00000110 SUB M(X) Subtract M(X) from ACCU put the
result in ACCU.
00001000 |SUB M(X)| Subtract |M(X)| from ACCU put
the result in ACCU.
00001011 MUL M(X) Multiply M(X) by M(Q) ,put MSB
in ACCU and LSB in MQ.
00001100 DIV M(X) Divide ACCU by M(X) ,put the
quotient in M(Q) and remainder in
ACCU.
00010100 LSH Multiply ACCU by 2(i.e.-shift left
one bit position)
00010101 RSH Divide ACCU by 2(i.e.-shift left
one bit position)
Address Modify: 00010010 STOR M(X,8:19) Replace left address field at M(X)
12 right most bits of ACCU.
00010011 STOR M(X,28:39) Replace left address field at M(X)
12 right most bits of ACCU.

You might also like