Logic Gates

o Logic Gates are a block of hardware that produces signals of binary 1 or 0

when input logic requirements are satisfied. The seven basic logic gates
includes: AND, OR, XOR, NOT, NAND, NOR, and XNOR.

AND GATE:
The AND gate is an electronic circuit which gives a high output only if all its inputs
are high. The AND operation is represented by a dot (.) sign.

OR GATE:
The OR gate is an electronic circuit which gives a high output if one or more of its
inputs are high. The operation performed by an OR gate is represented by a plus (+)
sign.
NOT GATE:
The NOT gate is an electronic circuit which produces an inverted version of the input
at its output. It is also known as an Inverter.

NAND GATE:
The NOT-AND (NAND) gate which is equal to an AND gate followed by a NOT gate.
The NAND gate gives a high output if any of the inputs are low. The NAND gate is
represented by a AND gate with a small circle on the output. The small circle
represents inversion.
NOR GATE:
The NOT-OR (NOR) gate which is equal to an OR gate followed by a NOT gate. The
NOR gate gives a low output if any of the inputs are high. The NOR gate is
represented by an OR gate with a small circle on the output. The small circle
represents inversion.

Exclusive-OR/ XOR GATE:

The 'Exclusive-OR' gate is a circuit which will give a high output if one of its inputs is
high but not both of them. The XOR operation is represented by an encircled plus
sign.
EXCLUSIVE-NOR/Equivalence GATE:
The 'Exclusive-NOR' gate is a circuit that does the inverse operation to the XOR gate.
It will give a low output if one of its inputs is high but not both of them. The small
circle represents inversion.

Laws of Boolean algebra

The basic Laws of Boolean Algebra can be stated as follows:

o Commutative Law states that the interchanging of the order of operands in a

Boolean equation does not change its result. For example:
1. OR operator → A + B = B + A
2. AND operator → A * B = B * A
o Associative Law of multiplication states that the AND operation are done on
two or more than two variables. For example:
A * (B * C) = (A * B) * C
o Distributive Law states that the multiplication of two variables and adding the
result with a variable will result in the same value as multiplication of addition
of the variable with individual variables. For example:
A + BC = (A + B) (A + C).
o Annulment law:
A.0=0
A+1=1
o Identity law:
A.1 = A
A+0=A
o Idempotent law:
A+A=A
A.A = A
o Complement law:
A + A' = 1
A.A'= 0
o Double negation law:
((A)')' = A
o Absorption law:
A.(A+B) = A
A + AB = A

Simplification using Boolean algebra

Let us consider an example of a Boolean function: AB+A (B+C) + B (B+C)

o The logic diagram for the Boolean function AB+A (B+C) + B (B+C) can be
represented as:

o We will simplify this Boolean function on the basis of rules given by Boolean
algebra.
o AB + A (B+C) + B (B+C)
o AB + AB + AC + BB + BC {Distributive law; A (B+C) = AB+AC, B (B+C) =
BB+BC}
o AB + AB + AC + B + BC {Idempotent law; BB = B}
o AB + AC + B + BC {Idempotent law; AB+AB = AB}
o AB + AC +B {Absorption law; B+BC = B}
 o B + AC {Absorption law; AB+B = B}
o Hence, the simplified Boolean function will be B + AC.
o The logic diagram for Boolean function B + AC can be represented as:

What is a Half Adder?

It is a combinational logic circuit. We can design it by connecting one AND gate and
one EX-OR gate.

A half-adder circuit consists of two input terminals- namely A and B. Both of these
add two input digits (one-bit numbers) and generate the output in the form of a carry
and a sum. Thus, there are two output terminals.

The output that one obtains from the EX-OR gate is the sum of both the one-bit
numbers.

The output obtained from the AND gate is called the carry. But we cannot forward
the carry that we obtain in one addition into another addition. It is because of the
absence of any logic gate to process it.

Thus, it’s called the Half Adder circuit.

Logical Expression of Half Adder

Sum (S) = A ⊕ B

Carry (C) = A . B
Truth Table
Here is a truth table representing the possible outputs obtained from the possible
inputs in a Half Adder:

Input Output

A B CARRY SUM

0 0 0 0

1 1 1 0

0 1 0 1

1 0 0 1

What is Full Adder?

A full adder is a circuit that has two AND gates, two EX-OR gates, and one OR gate.
The full adder adds three binary digits. Among all the three, one is the carry that we
obtain from the previous addition as C-IN, and the two are inputs A and B. It
designates the input carry as the C-OUT and the normal output as S (or SUM).

Just like the Half Adder, the Full Ladder is a combinational type of logic circuit-
meaning, it has no storage element. But it has additional logic gates. Thus, it adds
the previous carry to generate the complete output. Thus, it is called the Full Adder.

Logical Expression of Full Adder

CARRY-OUT = AB + BCin + ACin

SUM = (A ⊕ B) ⊕ Cin

Truth Table
A truth table represents the possible outputs obtained from the possible inputs. A
truth table for the Full Adder is as follows:
Input Output

A B C SUM CARRY OUT

0 0 0 0 0

1 1 1 1 1

0 1 1 0 1

1 0 1 0 1

0 0 1 1 0

0 1 0 1 0

1 0 0 1 0

1 1 0 0 1

Difference between Half Adder and Full Adder

Parameter Half Adder Full Adder

Basics The Half Adder is a type of The Full Adder is also a type of combinational
combinational logic circuit that adds two logic that adds three of the 1-bit binary digits for
of the 1-bit binary digits. It generates performing an addition operation. It generates a
carry and sum of both the inputs. sum of all three inputs along with a carry value.

Adding the The Half Adder does not add the carry The Full Adder, along with its current inputs A and
Previous Carry obtained from the previous addition to B, also adds the previous carry.
the next one.

Hardware A Half Adder consists of only one AND A Full Adder consists of one OR gate and two EX-
Architecture gate and EX-OR gate. OR and AND gates.

Total Inputs There are two inputs in a Half Adder- A There are a total of three inputs in a Full Adder- A.
and B. B. C-in.

Usage The Half Adder is good for digital The Full Adder comes into play in various digital
measuring devices, computers, processors, the addition of multiple bits, and many
 calculators, and many more. more.

Logical Here is the logical expression of Half Here is the logical expression of Full Adder:
Expression Adder:
Cout = (AB) + CinA ⊕ CinB
C=A*B
S =A ⊕ B ⊕ Cin
S=A⊕B

Half Subtractor
The half subtractor is also a building block for subtracting two binary numbers. It has
two inputs and two outputs. This circuit is used to subtract two single bit binary
numbers A and B. The 'diff' and 'borrow' are two output states of the half
subtractor.

Block diagram

Truth Table

The SOP form of the Diff and Borrow is as follows:

Diff= A'B+AB'
Borrow = A'B

In the above table,

 o 'A' and 'B' are the input variables whose values are going to be subtracted.
o The 'Diff' and 'Borrow' are the variables whose values define the subtraction result,
i.e., difference and borrow.
o The first two rows and the last row, the difference is 1, but the 'Borrow' variable is 0.
o The third row is different from the remaining one. When we subtract the bit 1 from
the bit 0, the borrow bit is produced.

Construction of Half Subtractor Circuit

In the block diagram, we have seen that it contains two inputs and two outputs.
The carry and sum are the output states of the half subtractor. The half subtractor is
designed with the help of the following logic gates:

1. 2-input AND gate.

2. 2-input Exclusive-OR Gate or Ex-OR Gate
3. NOT or inverter Gate

1. 2-input Exclusive-OR Gate or Ex-OR Gate

The Diff bit is generated with the help of the Exclusive-OR or Ex-OR gate.

The above is the symbol of the EX-OR gate. In the above diagram, 'A' and 'B' are the
inputs, and 'Diff' is the final outcome after performing the XOR operation of both
numbers.
The truth table of the EX-OR gate is as follows:

From the above table, it is clear that the XOR gate gives the result 1 when both of the
inputs are different. When both of the inputs are the same, the XOR gives the result
0. To learn more about the XOR gate, click here.

2. 2-input AND gate:

The XOR gate is unable to generate the carry bit. For this purpose, we use another
gate called AND gate. The AND gate is not enough to give the correct result
of 'Borrow'. We will use the NOT gate with the 'AND' gate to get the correct result.

The above is the symbol of the AND gate. In the above diagram, 'A' and 'B' are the
inputs, and 'OUT' is the final outcome after performing AND operation of both
numbers.

There is the following truth table of AND gate:

From the above table, it is clear that the AND gate gives the result 1 when both of
the inputs are 1. When both of the inputs are different and 0, the AND gates gives
the result 0.

3. NOT or Inverter Gate:

The NOT gate is used to get the inverse output. We can combine the 'AND' and
'NOT' gates in order to get the combinational gate 'NAND'. By inverting the input 'A'
using 'NOT' gate and then use the output of the 'NOT' gate as the input of the 'AND'
gate, we can get the 'Borrow' bit.

Half-Subtractor logical circuit

So, the Half Subtractor is designed by combining the 'XOR', 'AND', and 'NOT' gates
and provide the Diff and Borrow.
The Boolean expression of the Half Adder circuit is given below:

Diff= A XOR B (A⊕B)

Borrow= not-A AND B (A'.B)

Full Subtractor
The Half Subtractor is used to subtract only two numbers. To overcome this problem,
a full subtractor was designed. The full subtractor is used to subtract three 1-bit
numbers A, B, and C, which are minuend, subtrahend, and borrow, respectively. The
full subtractor has three input states and two output states i.e., diff and borrow.

Block diagram
Truth Table

In the above table,

o 'A' and' B' are the input variables. These variables represent the two significant
bits that are going to be subtracted.
o 'Borrowin' is the third input which represents borrow.
o The 'Diff' and 'Borrow' are the output variables that define the output values.
o The eight rows under the input variable designate all possible combinations of
0 and 1 that can occur in these variables.

Basics of Flip Flop

A circuit that has two stable states is treated as a flip flop. These stable states are
used to store binary data that can be changed by applying varying inputs.

There are the following types of flip flops:

SR Flip Flop
The S-R flip flop is the most common flip flop used in the digital system. In SR flip
flop, when the set input "S" is true, the output Y will be high, and Y' will be low. It is
required that the wiring of the circuit is maintained when the outputs are established.
We maintain the wiring until set or reset input goes high, or power is shutdown.
The S-R flip flop is the simplest and easiest circuit to understand.

Truth Table:

J-K Flip-flop
The JK flip flop is used to remove the drawback of the S-R flip flop, i.e., undefined
states. The JK flip flop is formed by doing modification in the SR flip flop. The S-R flip
flop is improved in order to construct the J-K flip flop. When S and R input is set to
true, the SR flip flop gives an inaccurate result. But in the case of JK flip flop, it gives
the correct output.
In J-K flip flop, if both of its inputs are different, the value of J at the next clock edge
is taken by the output Y. If both of its input is low, then no change occurs, and if high
at the clock edge, then from one state to the other, the output will be toggled. The
JK Flip Flop is a Set or Reset Flip flop in the digital system.

Truth Table:

D Flip Flop
D flip flop is a widely used flip flop in digital systems. The D flip flop is mostly used in
shift-registers, counters, and input synchronization.
Truth Table:

T Flip Flop
Just like JK flip-flop, T flip flop is used. Unlike JK flip flop, in T flip flop, there is only
single input with the clock input. The T flip flop is constructed by connecting both of
the inputs of JK flip flop together as a single input.

The T flip flop is also known as Toggle flip-flop. These T flip-flops are able to find
the complement of its state.
Truth Table:

Master-Slave JK Flip Flop

The master-slave flip flop is constructed by combining two JK flip flops. These flip
flops are connected in a series configuration. In these two flip flops, the 1st flip flop
work as "master", called the master flip flop, and the 2nd work as a "slave", called
slave flip flop. The master-slave flip flop is designed in such a way that the output of
the "master" flip flop is passed to both the inputs of the "slave" flip flop. The output
of the "slave" flip flop is passed to inputs of the master flip flop.

In "master-slave flip flop", apart from these two flip flops, an inverter or NOT gate is
also used. For passing the inverted clock pulse to the "slave" flip flop, the inverter is
connected to the clock's pulse. In simple words, when CP set to false for "master",
then CP is set to true for "slave", and when CP set to true for "master", then CP is set
to false for "slave".