Analog Integrated Circuits Laboratory
Current Mirror
Hong-Yi Huang
Nano Integrated Circuits and Systems Lab. Graduate Institute of Electrical Engineering
Current Source 2-1 Analog ICs;Hong-Yi Huang
Outline
v NMOS Current Source v Basic NMOS Current Mirror v Cascode Current Mirrors v Improve Current Mirror High-Swing Cascode Current Mirror Wilson Current Mirror Low-Voltage Current Mirror v Experiment Steps v Questions
Current Source
2-2
Analog ICs;Hong-Yi Huang
NMOS Current Source
v For NMOS get into saturation region VGS Vt, VGD Vt v VGD = VBIAS VDS Vt , we get VDS VBIAS-Vt v Define VBIAS-Vt is VMIN v So VDS VMIN is a Current Source
v rds =
1 + lVDS 1 lID lID
Where l =
K L NCH
K=dimensional factor NCH=doping concentration
Current Source
2-3
Analog ICs;Hong-Yi Huang
NMOS Current Source
v Let VBIAS = 0.8V VMIN=VBIAS Vt
Current Source
0.4V
2-4
Analog ICs;Hong-Yi Huang
Basic NMOS Current Mirror
v In fact, in analog IC design, using Current Mirror (as seen in the figure above) to get current source from a current reference is a typical method.
Io =
1 W unC ox ( VGS1 - Vt )2 2 L 1
Io =
(W / L )1 I (W / L )2 REF
IREF =
Current Source
1 W unCox ( VGS2 - Vt )2 2 L 2
2-5 Analog ICs;Hong-Yi Huang
Basic NMOS Current Mirror _ Second Order Effect
v If we take Short Channel Effect into analysis
Io =
1 W unCox ( VGS1 - Vt )2 (1 + lVDS1 ) 2 L 1
1 W unCox ( VGS2 - Vt )2 (1 + lVDS2 ) 2 L 2
IREF =
Io =
(W / L )1(1 + lVDS1 ) I (W / L )2 (1 + lVDS2 ) REF
v From the formula, if we want to reduce the Short Channel Effect, increase the channel length will increase rO, so that the current source become more ideal.
Current Source
2-6
Analog ICs;Hong-Yi Huang
Basic NMOS Current Mirror _ Second Order Effect
v If we increase the channel length then we get a more constant current source.
Current Source
2-7
Analog ICs;Hong-Yi Huang
Cascode Current Mirror
rO IREF IO
io + Vc gm3va gmb3va Vo rO1 + Va rO3 +
+
MN4 VR MN2
+ +
Vd MN3 Vc
+
Vb
+
MN1 Va
Vo
v Use cascode structure to enhance ro. v Vo = Va + Vc = Va + ro3[ Io + gmb3Va +gm3Va ] and Va = Io ro1 Vo = Io[ ro1 + ro3 + gmb3 ro1 ro3+ gm3 ro1 ro3 ] We get ro = Vo / Io = ro1 + ro3 + gm3 ro1 ro3 (1+3) Where 3 = gmb3 / gm3
Current Source 2-8 Analog ICs;Hong-Yi Huang
Cascode Current Mirror
v Now we analyze the VMIN of Cascode Current Mirror v VDS(sat) = VGS Vt v VGS = VDS(sat) + Vt and VR = 2VGS = 2VDS(sat) + 2Vt Vo = VR - Vt v We get Vo = 2VDS(sat) + Vt = VMIN v In this case, VMIN 2 0.15 + 0.4 = 0.7V
Current Source
2-9
Analog ICs;Hong-Yi Huang
High-Swing Cascode Current Mirror
rO IREF MN4 Wn/Ln =4/4 MN3 Wn/Ln + =4/1 4/1 - VGS2 IO
+ + - VGS4
MN3 Wn/Ln =4/1 MN1 Wn/Ln =4/1 4/1
Vo
v In order to reduce VMINadjust the Channel Length of MN4 as four times to the other NMOSaccording to the current formula in saturation (VGS4 Vt) = 2(VGS2 Vt) = 2VDS(sat)so VGS4 = 2VDS(sat) + Vt we get Vo = VGS4 Vt Vo = (2VDS(sat) + Vt ) Vt = 2VDS(sat) = VMIN
Current Source 2-10 Analog ICs;Hong-Yi Huang
High-Swing Cascode Current Mirror
v From the simulation, we can see that the VMIN of High-Swing Cascode Current Mirror is smaller than Cascode Current Mirror.
Current Source
2-11
Analog ICs;Hong-Yi Huang
Wilson Current Mirror
v From the small signal analysis we get the output resistance to be ro = = Vo / Io = ro3 + ro2 +[
gm3 (1 + h3 )ro3 + gm1gm3 ro1ro3 + 1 ] 1 + gm2ro 2
if we increase the ro3 means we can increase output resistance obviously.
Current Source
2-12
Analog ICs;Hong-Yi Huang
Wilson Current Mirror
v We increase the width of MN3 in order to increase the output resistance, from the simulation, the larger width produce smaller slope current curve, means we increase the output resistance.
Current Source 2-13 Analog ICs;Hong-Yi Huang
Low-Voltage Current Mirror
v Now, we introduce a Low-Voltage Current Mirror.
VDD
VGS4 + (VGS2 - Vt2 ) Vb VGS2 + Vt4 V b min = 2 D V + V t
Iout VOUT M3
IREF X Vb M4 A
V OUTmin = 2 D V
Vb = VGS 4 + VDS2 = VGS3 + VDS1
If VGS 4 = VGS 3
Then VDS1 = VDS2 And VGS1 = VGS 2 IOUT = IREF
B M1
M2
v From the small signal, the output resistance ro = Vo / Io = 1 + ro1(1 + gm3ro3 + gmb3ro3) .
Current Source
2-14
Analog ICs;Hong-Yi Huang
Low-Voltage Current Mirror
v From above-mentioned, we can increase the output resistance ro by increasing the width of MN3MN4.
m=10
m=2
m=1
Current Source
2-15
Analog ICs;Hong-Yi Huang
Experiment Steps
v Use a single MOS as a current source as page 3, simulate output current ID. Try to increase the channel length to see what change in ID. v Use a simple type current mirror as page 5, get the output current Io from the reference current IREF. Try to increase the channel length to see what change in ID. v Use a cascode current mirror as page 8, get the output current Io from the reference current IREF. Try to increase the channel length to see what change in ID. v Use high swing cascode current mirror as page 10, get the output current Io from the reference current IREF. Try to increase the channel length to see what change in ID. v Use wilson current mirror as page 12, get the output current Io from the reference current IREF. Try to increase the channel width of MN3 to vary gm3 and to see what change in ro.
Current Source 2-16 Analog ICs;Hong-Yi Huang
Steps
v Use low voltage current mirror as page 14, get the output current Io from the reference current IREF. Try to increase the channel width of MN3 to vary gm3 and to see what change in ro.
Current Source
2-17
Analog ICs;Hong-Yi Huang
Questions
v Assuming IREF=100uA, how can we use IREF to generate 500uA300uA current source (sink) respectively ? v An advantage of the High-Swing Cascode Current Mirror is that its VMIN is 2VDS(sat), but what is the drawback for this structure? v Can you describe the voltage operation range of a Low-Voltage Current Mirror?
Current Source
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Analog ICs;Hong-Yi Huang
