CD4015BC Dual 4-Bit Static Shift Register
October 1987 Revised January 1999
CD4015BC Dual 4-Bit Static Shift Register
General Description
The CD4015BC contains two identical, 4-stage, serialinput/parallel-output registers with independent Data, Clock, and Reset inputs. The logic level present at the input of each stage is transferred to the output of that stage at each positive-going clock transition. A logic high on the Reset input resets all four stages covered by that input. All inputs are protected from static discharge by a series resistor and diode clamps to VDD and VSS.
Features
I Wide supply voltage range: I High noise immunity: compatibility: 3.0V to 18V 0.45 VDD (typ.) I Low power TTL: Fan out of 2 driving 74L or 1 driving 74LS I Medium speed operation: 8 MHz (typ.) clock rate I Fully static design: @VDD VSS = 10V
Applications
Serial-input/parallel-output data queueing Serial to parallel data conversion General purpose register
Ordering Code:
Order Number CD4015BCM CD4015BCN Package Number M16A N16E Package Description 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter X to the ordering code.
Connection Diagram
Pin Assignments for DIP and SOIC
Truth Table
CL (Note 1) D 0 1 X X R 0 0 0 1
X
Q1 0 1 Q1 0
Qn Qn1 Qn1 Qn 0 (No change)
X = Don't Care Case Note 1: Level Change
1999 Fairchild Semiconductor Corporation
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CD4015BC
Logic Diagrams
Terminal No. 16 = VDD Terminal No. 8 = GND
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CD4015BC
Absolute Maximum Ratings(Note 2)
(Note 3) DC Supply Voltage (VDD) Input Voltage (VIN) Storage Temperature Range (TS) Power Dissipation (PD) Dual-In-Line Small Outline Lead Temperature (TL) (Soldering, 10 seconds) 260C 700 mW 500 mW 0.5 to +18 VDC 0.5 to VDD +0.5 VDC 65C to +150C
Recommended Operating Conditions
DC Supply Voltage (VDD) Input Voltage (VIN) Operating Temperature Range (TA) +3 to +15 VDC 0 to VDD VDC 40C to +85C
Note 2: Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed; they are not meant to imply that the devices should be operated at these limits. The tables of Recommended Operating Conditions and Electrical Characteristics provide conditions for actual device operation. Note 3: VSS = 0V unless otherwise specified.
DC Electrical Characteristics (Note 3)
Symbol IDD Parameter Quiescent Device Current VOL LOW Level Output Voltage VOH HIGH Level Output Voltage VIL LOW Level Input Voltage VIH HIGH Level Input Voltage IOL LOW Level Output Current (Note 4) IOH HIGH Level Output Current (Note 4) IIN Input Current Conditions VDD = 5V, VIN = VDD or VSS VDD = 10V, VIN = VDD or VSS VDD = 15V, VIN = VDD or VSS VDD = 5V VDD = 10V VDD = 15V VDD = 5V VDD = 10V VDD = 15V VDD = 5V, VO = 0.5V or 4.5V VDD = 10V, VO = 1.0V or 9.0V VDD = 15V, VO = 1.5V or 13.5V VDD = 5V, VO = 0.5V or 4.5V VDD = 10V, VO = 1.0V or 9.0V VDD = 15V, VO = 1.5V or 13.5V VDD = 5V, VO = 0.4V VDD = 10V, VO = 0.5V VDD = 15V, VO = 1.5V VDD = 5V, VO = 4.6V VDD = 10V, VO = 9.5V VDD = 15V, VO = 13.5V VDD = 15V, VIN = 0V VDD = 15V, VIN = 15V
Note 4: IOH and IOL are tested one output at a time.
40C Min Max 20 40 80 0.05 0.05 0.05 4.95 9.95 14.95 1.5 3.0 4.0 3.5 7.0 11.0 0.52 1.3 3.6 0.52 1.3 3.6 0.3 0.3 3.5 7.0 11.0 0.44 1.1 3.0 0.44 1.1 3.0 4.95 9.95 14.95 Min
+25C Typ 0.005 0.010 0.015 0 0 0 5 10 15 2.25 4.50 6.75 2.75 5.50 8.25 0.88 2.25 8.8 0.88 2.25 8.8 105 105 0.3 0.3 1.5 3.0 4.0 Max 20 40 80 0.05 0.05 0.05
+85C Min Max 150 300 600 0.05 0.05 0.05 4.95 9.95 14.95 1.5 3.0 4.0 3.5 7.0 11.0 0.36 0.9 2.4 0.36 0.9 2.4 1.0 1.0
Units A A A V V V V V V V V V V V V mA mA mA mA mA mA A A
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CD4015BC
AC Electrical Characteristics
Symbol CLOCK OPERATION tPHL, tPLH Propagation Delay Time Parameter
(Note 5)
Conditions Min Typ Max Units
TA= 25C, CL= 50 pF, RL= 200k, tr = tf = 20 ns, unless otherwise specified
VDD = 5V VDD = 10V VDD = 15V
230 80 60 100 50 40 160 60 50
350 160 120 200 100 80 250 110 85 15 15 15
ns ns ns ns ns ns ns ns ns s s s s s s MHz MHz MHz
tTHL, tTLH
Transition Time
VDD = 5V VDD = 10V VDD = 15V
tWL, tWM
Minimum Clock Pulse-Width
VDD = 5V VDD = 10V VDD = 15V VDD = 5V VDD = 10V VDD = 15V VDD = 5V VDD = 10V VDD = 15V VDD = 5V VDD = 10V VDD = 15V Clock Input Other Inputs 2 4.5 6
trCL, tfCL
Clock Rise and Fall Time
tSU
Minimum Data Set-Up Time
50 20 15 3.5 8 11 7.5 5 200 100 80 135 40 30
100 40 30
fCL
Maximum Clock Frequency
CIN RESET OPERATION tPHL(R)
Input Capacitance
10 7.5 400 200 160 250 80 60
pF pF ns ns ns ns ns ns
Propagation Delay Time
VDD = 5V VDD = 10V VDD = 15V
tWH(R)
Minimum Reset Pulse Width
VDD = 5V VDD = 10V VDD = 15V
Note 5: AC Parameters are guaranteed by DC correlated testing.
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CD4015BC
Physical Dimensions inches (millimeters) unless otherwise noted
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow Package Number M16A
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CD4015BC Dual 4-Bit Static Shift Register
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Package Number N16E
LIFE SUPPORT POLICY FAIRCHILDS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support 1. Life support devices or systems are devices or systems device or system whose failure to perform can be reawhich, (a) are intended for surgical implant into the sonably expected to cause the failure of the life support body, or (b) support or sustain life, and (c) whose failure device or system, or to affect its safety or effectiveness. to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the [Link] user.
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.
