EASWARI ENGINEERING COLLEGE

DEPARTMENT of
ELECTRONICS AND COMMUNICATION ENGINEERING

LABORATORY MANUAL

AY(2014-15)

Lab Name

: CIRCUITS & SIMULATION

INTEGRATED LAB

Lab Code

: EC6411

Semester
Year

: IV
: 2nd Year

Prepared By
Jayasanthi Sambbandam,[Link],[Link]

Approved By
HOD/ECE

EC 6411
C

CIRCUITS & SIMULATION INTEGRATED LAB

LTP
0032

DESIGN OF FOLLOWING CIRCUITS

1. Series and Shunt feedback amplifiers: Frequency response, Input and output
impedance
2. RC Phase shift oscillator, Wien Bridge Oscillator
3. Hartley Oscillator, Colpitts Oscillator
4. Single tuned Amplifier
5. RC Integrators, Differentiators
6. Astable and monostable multivibrators
7. Clippers and Clampers
8. Free running blocking oscillator
SIMULATION USING PSPICE:
1. Tuned collector oscillator
2. Wien Bridge Oscillator
3. Double and stagger tuned amplifier
4. Bistable multivibrators
5. Schmitt trigger with predictable hysteresis
6. Monostable multivibrators with emitter and base timing
7. Voltage and current time base circuits.
Lab requirements for a batch of 30 students
CRO

- 15 Nos.

Signal generator/Function generator

- 15 Nos.

Dual Regulated power supply

- 15 Nos

Digital multimeter

- 15 Nos.

Digital LCR meter

- 2 Nos.

Stanalone desktops PC

- 15 Nos.

Transistor/FET (BJT-NPN-PNP and NMOS / PMOS)

- 50 Nos.

Components and Accessories:

Transistors,Resistors,Capacitors,Inductors,Diodes,Zenerdiodes,Bread
Boards,Transformers,SPICE Circuit Simulation software (any public domain or
Commercial software)

EC 6411 - Circuits and Simulation Integrated Lab

LIST OF EXPERIMENTS

CYCLE I

1.
2.
3.
4.
5.

Feed Back Amplifiers (Series and Shunt)

Transistor RC Phase Shift Oscillator
Hartley Oscillator and Colpitts Oscillator
Single Tuned Amplifier
a. RC Integrators, Differentiators
b.

Clippers And Clampers

6. Astable Multivibrator.
SIMULATION USING PSPICE:
7. Double and stagger tuned amplifier
8. Schmitt trigger with predictable hysteresis
9. Voltage and current time base circuits.

CYCLE II
[Link] Oscillator
[Link] running blocking oscillator
[Link] multivibrators
SIMULATION USING PSPICE:
[Link] collector oscillator and Wien Bridge Oscillator
[Link] multivibrator and Monostable multivibrators with emitter and base
timing

INDEX

[Link]

DATE

EXPERIMENT NAME

PAGE
NO.

MARKS
OBTAINE

FACULT
Y SIGN

[Link] Back Amplifiers

Aim:

To design and construct the Current Series and Voltage Shunt feedback
amplifiers.

To plot the frequency response and

To calculate the following parameters.
1. Mid Band Gain.
2. Bandwidth and Cutoff Frequencies.
3. Input and Output Impedance

Apparatus Required:
[Link]

Item

Range

Qty

Transistor

BC 147

Resistor

Capacitor

CRO

(0-30) MHz

RPS

(0-30) V

Function

(0 1) MHz

Generator
7

Ammeters

Theory:

Circuit Diagram:

(0-5) mA (ac), (0-200) A (ac)

1 each

CURRENT SERIES FEEDBACK AMPLIFIER

+VCC
R1

RC

Cin

Co
+

B
BC107
E

RL
CE

Vin
F.G

R2

Vo

CRO

RE

Current Series Feedback Design:

Design specification:

VCC =

,=

Assume

, f=

IE = IC

R E = VE / I E =
RC = (VCC - VCE - VE)/ IC =
VB = VBE + VE =
VB = VCC * R2 /( R1+R2 )
R2 /( R1+R2 )= VB / VCC
S=1+ RB / RE
RB =
R1* R2 /( R1+R2 ) = RB

,RL =

, Ic = , hie=

VCE = VCC / 2 =

,VBE = 0.7 V

VE = VCC / 10 =

S=

R1=
R2=
Input Impedance
Zin = ( RB

hie )

Coupling and bypass capacitors can be thus found out.

Input coupling capacitor is given by
XCin = Z in/ 10 =
XCin = 1/ 2fCin=
Cin = 1/ 2f XCin =
output coupling capacitor is given by ,
Zo = (Rc

RL) =

Xco= Zo / 10 =
XCo = 1/ 2 f Co =
Co = 1/ 2 f XCo =
By-pass capacitor is given by ,
XCE = hie / 1+ hfe
XCE = 1/ 2fCE
CE = 1/ 2f XCE =
Av=hfe * RL eff/hie
RL eff =(Rc

RL) =

Design (With feedback):

Remove the emitter capacitance (CE)

= -1 / RE =
Gm = - hfe/ [(hie + RE )

RB] =

D = 1+ Gm =
Gmf = Gm / D =
Voltage gain=Avf= -hfeRc
h ie+ hfeRE
Zif = Z iD =
Zof = ZoD =

Observation:
Vin =

mV

Gain
Frequency

Output voltage

(Hz)

Vo (volts)

Av=20 log
(Vo/Vi)
(dB)

Without
F/B

Input Impedance

Output Impedance

With F/B

Without
F/B

With F/B

Voltage Shunt Feedback Amplifier Design (With

Feedback):
Connect the feedback resistance (R f) and feedback capacitor (Cf) as shown in the
figure.

Assume,

Rf = 68 K

XCf = Rf / 10 =
Cf = Rf / 2f XCf =
= -1 / Rf =
Transresistance=Rm=(Rc RL Rf) (Rs Rf)
(Rs
D = 1+ Rm =

RB

Rf)

Rmf = Rm / D =
Voltage gain=Avf= Rmf/Rs
Zif = Z i/D =
Zof = Zo/D =

Circuit Diagram:VOLTAGE SHUNT FEEDBACK AMPLIFIER

+VCC

R1

Rf

Cf

Rc
Co

Cin

BC107

Rs

RL
CRO

CE
Vin

R2

RE

f = 1 KHz
Observation:

Vin =

mV

Gain
Frequency
(Hz)

O/P voltage Vo (volts)

Without

With F/B

Av=20 log(Vo/Vi)
(dB)
Without

With F/B

Vo

F/B

F/B

Input Impedance (with feedback) :

Output Impedance (with feedback) :

Model Graph (With & Without Feedback)

Without feedback
3 dB
gain
(dB)

3dB

f3

f1

With feedback

f2

f4

f(Hz)

f2 f1 = Bandwidth without feedback circuit

f4 f3 = Bandwidth with feedback circuit

Procedure:
The connections are made as shown in the circuit. The amplifier is checked for its
correct operation .Set the input voltage to a fixed value. Keeping the input voltage
Vary the input frequency from 0Hz to 1MHz and note down the corresponding output
voltage. plot the graph : gain (dB) Vs frequency .Calculate the bandwidth from the
graph. Remove RE and follow the same procedure.

To find out input impedance:

Connect DRB in the input side in series with the base of the transistor
Initially keep the resistance as 0
Vary F.G to get maximum output
Increase the resistance of the DRB such that output reduces to one half of the
maximum output
To find out output impedance:

Connect DRB in the output side in shunt with the load resistor
Initially keep the resistance as MAX
Vary F.G to get maximum output
Decrease the resistance of the DRB such that output reduces to one half of
the maximum output

Result:
Thus the feedback amplifier was designed, constructed, tested,frequency
response was plotted and the following parameters were calculated.

TYPE OF
FEEDBA
CK

PARAMETER

CURRENT
SERIES

WITH OUT
FEEDBACK
WITH
FEEDBACK

VOLTAGE
SHUNT

BANDWIDTH

INPUT
IMPEDANCE

OUTPUT
IMPEDANC
E

2. Transistor RC Phase Shift Oscillator

Aim:
To design, construct and test the transistor RC Phase shift oscillator and to obtain its
output waveform for the given frequency .

Apparatus Required:

[Link]

Apparatus Name

Transistor

Resistor

Capacitor

4
5
6

Range

Qty

BC 147

CRO

( 0 30 ) MHz

RPS

(0-30) V

(0-1 )MHz

Function
Generator

Design :

VCC =
fT=

IE = IC

,=

, f=

,RL =

, Ic = , hie=

,VBE = 0.7 V

S=

Assume, VCE = VCC / 2 =

VE = VCC / 10 =
R E = VE / I E =
RC = (VCC - VCE - VE)/ IC =
VB = VBE + VE =
VB = VCC * R2 /( R1+R2 )
R2 /( R1+R2 )= VB / VCC
S=1+ RB / RE
RB =
R1* R2 /( R1+R2 ) = RB
R1=
R2=

Input Impedance , Zin = ( RB

hie )

Coupling and bypass capacitors can be thus found out.

Input coupling capacitor is given by
XCin = Z in/ 10 =
XCin = 1/ 2fCin=
Cin = 1/ 2f XCin =
output coupling capacitor is given by ,
Zo = (Rc

RL) =

Xco= Zo / 10 =

XCo = 1/ 2 f Co =
Co = 1/ 2 f XCo =
By-pass capacitor is given by ,
XCE = hie / 1+ hfe
XCE = 1/ 2fCE
CE = 1/ 2f XCE =

Oscillator Design
Frequency fT = ____________Hz
fT = 1/ 2 6 RC
Assume C = 0.1F
R = 1/26 f TC

Circuit Diagram:

Model Graph:

Theory:
Procedure:

1. The circuit is constructed as per the given circuit diagram.

2. Switch on the power supply and observe the output on the CRO( sine wave)

3. Note down the practical frequency and compare it with the theoretical
frequency.

Observation:

Amplitude

Time period T

Frequency f

= 1/T =

Theoretical frequency fT =
Practical frequency

fP

Result:

Thus the RC Phase shift Oscillator designed, constructed, tested, Simulated

using Pspice and the output sine waveform is drawn.

Theoretical frequency

Practical frequency

3a. Hartley Oscillator

Aim :

To design, construct and test the Hartley oscillator and to obtain its output
waveform for the given frequency .

Apparatus Required:

[Link]

Apparatus Name

Range
BC 107

Qty

Transistor

Resistor

Capacitor

CRO

(0 30)MHZ

RPS

(0-30) V

Function

(0- 1 ) MHz

Generator
7

DLB, DRB

Theory:

Circuit Diagram:

Design :

VCC =

,=

, f=

IE = IC
Assume, VCE = VCC / 2 =
VE = VCC / 10 =
R E = VE / I E =
RC = (VCC - VCE - VE)/ IC =
VB = VBE + VE =
VB = VCC * R2 /( R1+R2 )
R2 /( R1+R2 )= VB / VCC
S=1+ RB / RE
RB =

,RL =

, Ic = , hie=

,VBE = 0.7 V

S=

R1* R2 /( R1+R2 ) = RB
R1=
R2=
Input Impedance , Zin = ( RB

hie )

Coupling and bypass capacitors can be thus found out.

Input coupling capacitor is given by
XCin = Z in/ 10 =
XCin = 1/ 2fCin=
Cin = 1/ 2f XCin =
output coupling capacitor is given by ,
Zo = (Rc

RL) =

Xco= Zo / 10 =
XCo = 1/ 2 f Co =
Co = 1/ 2 f XCo =
By-pass capacitor is given by ,
XCE = hie / 1+ hfe
XCE = 1/ 2fCE
CE = 1/ 2f XCE =

Hartley Oscillator Design

Frequency f = ____________Hz
f = 1/ 2 LC

Assume,

C = 0.1microF

L = L1 + L 2
L1=

L2=

Model Graph:

Procedure:

1. The circuit connection is made as per the circuit diagram.

2. Switch on the power supply and observe the output on the CRO
(sine wave).
3. Note down the practical frequency and compare it with the theoretical
frequency.

Observation:

Amplitude

Time period T

Frequency f

= 1/ T =

Theoretical frequency fT =
Practical frequency

Result:

fP

Thus the Hartley Oscillator was designed, constructed and the output sine
waveform was observed.

Theoretical frequency

Practical frequency

3 b. Colpitts Oscillator
Aim :

To design, construct and test the Colpitts Oscillator and to obtain its output
waveform for the given frequency .

Apparatus Required:
[Link]
1

Apparatus Name
Transistor

Range
BC 107

Qty
1

Resistor

Capacitor

CRO

(0 30)MHZ

RPS

(0-30) V

Function

(0- 1 ) MHz

Generator
7

DLB, DRB

Theory:

Circuit Diagram:

Design :

VCC =

,=

, f=

Assume IE = IC

,RL =

, Ic = , hie=

VCE = VCC / 2 =

,VBE = 0.7 V
VE = VCC / 10 =

R E = VE / I E =
RC = (VCC - VCE - VE)/ IC =
VB = VBE + VE =
VB = VCC * R2 /( R1+R2 )
R2 /( R1+R2 )= VB / VCC
S=1+ RB / RE
RB =
R1* R2 /( R1+R2 ) = RB
R1=
R2=
Input Impedance , Zin = ( RB

hie )

Coupling and bypass capacitors can be thus found out.

Input coupling capacitor is given by
XCin = Z in/ 10 =
XCin = 1/ 2fCin=
Cin = 1/ 2f XCin =
output coupling capacitor is given by ,
Zo = (Rc

RL) =

Xco= Zo / 10 =
XCo = 1/ 2 f Co =
Co = 1/ 2 f XCo =
By-pass capacitor is given by ,
XCE = hie / 1+ hfe
XCE = 1/ 2fCE
CE = 1/ 2f XCE =

Colpitts Oscillator Design:

Frequency f = ____________Hz

S=

f = 1/ 2 LC
Assume

C1 = 0.1microF

, C2 = 0.1microF

C = C1C2 /(C1+C2)
L=

Model Graph:

Observation:

Amplitude

Time period T

Frequency f

= 1/T =

Theoretical frequency fT =
Practical frequency

fP

Result:

Thus the Colpitts Oscillator was designed, constructed and the output sine
waveform was observed.

Theoretical frequency

Practical frequency

4. Single Tuned Amplifier

Aim:
To design, construct and test the operation of Single Tuned Amplifier and to
obtain its frequency response.

Apparatus Required:
[Link]

Apparatus Name

Range

Transistor

Resistor

Capacitor

CRO

RPS

(0-30) V

Function
Generator

Theory:

Circuit Diagram

BC 107

Qty
1
1
2
1

Design :
VCC =

,=

, f=

,RL =

, Ic = , hie=

,VBE = 0.7 V

FT
=
IE = IC
Assume,
VCE = VCC / 2

VE = VCC / 10

R E = VE / I E

VB = VBE + VE =
VB = VCC * R2 /( R1+R2 )
R2 /( R1+R2 )= VB / VCC
S=1+ RB / RE
RB =
R1* R2 /( R1+R2 ) = RB
R1=
R2=
Input Impedance , Zin = ( RB

hie )

Coupling and bypass capacitors can be thus found out.

Input coupling capacitor is given by
XCin = Z in/ 10 =

S=

XCin = 1/ 2fCin=
Cin = 1/ 2f XCin =
output coupling capacitor is given by ,
Zo = QL *XL

RL

As QL *XL is large
Zo = RL
Xco= Zo / 10

XCo = 1/ 2 f Co =
Co = 1/ 2 f XCo =
By-pass capacitor is given by ,
XCE = hie / 1+ hfe
XCE = 1/ 2 fCE
CE = 1/ 2 f XCE =
Theoretical frequency,
f T= 1/(2 LC)
C=0.1uF

L=

Model Graph:

Procedure:
[Link] connections are given as per the circuit diagram.
[Link] the CRO in the output and trace the waveform.
[Link] the practical frequency and compare with the theoretical frequency
[Link] the waveform obtained and calculate the bandwidth

Observation:

Vin =
Frequency(Hz)

Output Voltage,
Vo(Volts)

Gain
Av=20 log (Vo/Vi)

(dB)

Bandwidth = f 2 f

Result:
Thus the Single Tuned Amplifier is designed, constructed, tested and
the frequency response was plotted.

Theoretical bandwidth

Practical bandwidth

5a. Integrator and Differentiator

5b. Clipper and Clamper

Aim:
To construct and verify the operation of Integrator, Differentiator,
Clippers and Clampers.

Apparatus Required:
Apparatus Name
Audio Oscillator
CRO
Resistors
Capacitor
Breadboard
RPS

Theory:
Integrator and differentiator:

Clipper and Clamper:

Circuit Diagram:

Range

Quantity
1
1
1
1
1

Design for Integrator:

T<< RC
For R = 1K and C =0.1 uF
T<< 10-4 s
If T = 10us,,then the above condition is satisfied
f = 1/T = 1/ 10*10-6 = 100KHz

Design for Differentiator:

T>>RC
For R = 1K and C =0.1 uF
T>> 10-4 s
If T = 10us,,then the above condition is satisfied

f = 1/T = 1/ 10*10-6 = 100KHz

Model Graph

Integrator

Clippers
Negative Clipper

D 1
1

V in

Positive Clipper

D
2

V7
1k

CRO
V in

Model Graph

V7
1k

CRO

Positive Clipper
Clipper

Negative

Clampers
Negative Clamper

Positive Clamper.

0.1 F

Model Graph

0.1 F

Positive Clamper

Negative Clamper

Procedure:
[Link] are given as per the circuit diagram.
[Link] resistance Rcomp is also connected to the (+) input terminal
to minimize the effect of the input bias circuit.
[Link] is noted that the gain of the integrator decreases with
increasing frequency.
[Link] the integrator circuit does not have any high frequency
problem.

Result :

Thus the integrator, differentiator, clipper and clamper circuits were

constructed and their outputs were observed.

[Link] Multivibrator
Aim :
To design, construct and test an astable multivibrator for the given frequency
and to obtain its output waveforms.

Apparatus Required :
[Link]

Item

Range

Qty

Transistor

BC107

Resistor

2
2

Capacitor

RPS

(0-30) V

CRO

Theory :

+VCC

Circuit Diagram:

RC

R
C

VC1

BC147

Design Specification:

RC
C
BC147 V C2

Given VCC = ; IC = ; h FE =

;f=

VCE(sat) = 0.2 V
RC =

VCC VCE(sat) / IC

RC =

T= 1/f =

Choose C = 0.01f
T = 1.38 RC =

R=

Procedure:
1. The connections are given as per the circuit diagram.
2. Switch on the power supply.
3. Observe the waveform both at bases and collectors of Q1 and Q2.
4. Connect the CRO in the output of Q1 and Q2 and trace the square waveform .

Model Graph :

Result:
Thus the Astable multivibrator circuit is designed, constructed,
tested, Simulated using Pspice and the output waveforms are drawn

Theoretical frequency

Practical frequency

[Link] and stagger tuned amplifier

Aim :

To simulate Double and stagger tuned amplifier using PSPICE and to study

its frequency response.

Apparatus required:
PC with ORCAD suite

Theory:

Circuit diagram for Double tuned amplifier

V3
15Vdc

TX1

C 6

C 4

12k
C 1
10u

5m Vac
0Vdc

0 .0 1 u

0 .0 1 u

R 1

Q 1

C 2
0 .1 u

BC 107A

V4
R 8
100k
R 2
2 .2 k

R 3

C 7

150

220u

Simulation output

Circuit diagram for stagger tuned amplifier

V2
10Vdc
TX1

TX2

C4

C5

0 .1 u

C6

0 .1 u

0 .0 1 u

0 .0 1 u

R1

C7

R3

12k

12k

C3
Q1

C1

C2
Q2

10u
BC 107A

0 .1 u
BC 107A

10u
R7
2m Vac
0Vdc

V1

100k
R2
2 .2 k

R5
150

C8

R4

220u

2 .2 k

Simulation output

Procedure:

R6
150

C9
220u

1.
2.
3.
4.
5.
6.

Open a new project in capture CIS.

Draw the schematic.
Do AC sweep analysis.
Assign start and end frequencies.
Run simulation
Observe the frequency response

Result:
Thus the Double and stagger tuned amplifier using PSPICE was simulated
and its frequency response was observed.

8. Schmitt trigger with predictable hysteresis

Aim :
To simulate Schmitt trigger with predictable hysteresis using PSPICE
and to study its time response.
Apparatus required:
PC with ORCAD suite

Theory:

Circuit diagram for Schmitt Trigger:

V1
15Vdc
R 1
3 .3 k

C 1
R 2

0 .0 1 u

3k

R 6
Q 1

Q 2
4 .7 k

BC 107A
VO F F = 0
VAM PL = 5V
F R EQ = 1kH z

BC 107A

V3

R 4

R 3

3 .3 k

1k

LTP = [ VCC + R1 / R3 (VBEcut in ]*R4

- VBE cut in + VBE

[[R12R4/R3] + R3+R4]

UTP =

[R4 /(R1+R3 +R4 )] *VCC- VBE cut in + VBE

Hysteresis = UTP - LTP

OUTPUT

Procedure:

1.
2.
3.
4.
5.
6.

Open a new project in capture CIS.

Draw the schematic.
Do transient analysis.
Assign run time and step size.
Run simulation.
Observe the transient response.

Result:
Thus the Schmitt Trigger using PSPICE was simulated and its output was
observed.

9. Voltage and Current time base generators

Aim :

To simulate Voltage and Current timebase generators using PSPICE

and to study its time response.
Apparatus required:
PC with ORCAD suite

Theory:

Circuit diagram for Voltage time base generators:

15Vdc

V1

R 1

R 2

10k

470
X1
2N 2646

C 1

R 3

0 .1 u

47

OUTPUT

Circuit diagram for Current time base generators:

15Vdc

V1

R 2

L1

5
1

10m H

D 1
B Y 2 4 9 -3 0 0
3

1
I

R 1

Q 1
BC 107A

68k

V1 = 5v
V 2 = -5 v
TD =
TR = 0
TF = 0
P W = 0 .5 m s
PER = 1m s

V2

OUTPUT

Procedure:

1.
2.
3.
4.
5.
6.

Open a new project in capture CIS.

Draw the schematic.
Do transient analysis.
Assign run time and step size.
Run simulation.
Observe the transient response.

Result:
Thus the Voltage and Current timebase generators using PSPICE was
simulated and its output was observed.