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Arithmetic Circuits
Design of Digital Circuits 2014
Srdjan Capkun
Frank K. Gürkaynak
[Link]
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Adapted from Digital Design and Computer Architecture, David Money Harris & Sarah L. Harris ©2007 Elsevier
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In This Lecture
Why are arithmetic circuits so important
Adders
Adding two binary numbers
Adding more than two binary numbers
Circuits Based on Adders
Multipliers
Functions that do not use adders
Arithmetic Logic Units
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Motivation: Arithmetic Circuits
Core of every digital circuit
Everything else is side-dish, arithmetic circuits are the heart of the digital
system
Determines the performance of the system
Dictates clock rate, speed, area
If arithmetic circuits are optimized performance will improve
Opportunities for improvement
Novel algorithms require novel combinations of arithmetic circuits, there
is always room for improvement
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Example: ARM Microcontroller
Most popular embedded
micro controller.
Contains:
Multiplier
Accumulator
ALU/Adder
Shifter
Incrementer
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Example: ARM Instructions
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Arithmetic Based Instructions of ARM
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Types of Arithmetic Circuits
In order of complexity:
Shift / Rotate
Compare
Increment / Decrement
Negation
Addition / Subtraction
Multiplication
Division
Square Root
Exponentation
Logarithmic / Trigonometric Functions
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Relation Between Arithmetic Operators
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Addition
Addition is the most important operation in computer
arithmetic. Our topics will be:
Adding 1-bit numbers : Counting bits
Adding two numbers : Basics of addition
Circuits based on adders : Subtractors, Comparators
Adding multiple numbers : Chains of Adders
Later we will also talk about fast adder architectures
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Half-Adder (2,2) Counter
The Half Adder (HA) is the simplest arithmetic block
It can add two 1-bit numbers, result is a 2-bit number
Can be realized easily
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Full-Adder (3,2) Counter
The Full Adder (FA) is the essential
arithmetic block
It can add three 1-bit numbers, result
is a 2-bit number
There are many realizations both at
gate and transistor level.
Since it is used in building many
arithmetic operations, the
performance of one FA influences the
overall performance greatly.
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Adding Multiple 1-bit Numbers
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Adding Multiple Digits
Similar to decimal addition
Starting from the right, each digit is added
The carry from one digit is added to the digit to the left
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Adding Multiple Digits
Similar to decimal addition
Starting from the right, each digit is added
The carry from one digit is added to the digit to the left
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Ripple Carry Adder (RCA)
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Curse of the Carry
The most significant outputs of the adder
depends on the least significant inputs
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Adding Multiple Numbers
Multiple fast adders not a good idea
If more than 2 numbers are to be added, multiple fast adders are not
really efficient
Use an array of ripple carry adders
Popular and efficient solution
Use carry save adder trees
Instead of using carry propagate adders (the adders we have seen so far),
carry save adders are used to reduce multiple inputs to two, and then a
single carry propagate adder is used to sum up.
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Array of Ripple Carry Adders
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Carry Save Principle
Reduces three numbers to two with a single gate delay
C + S = E + F + G
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Carry Save Principle
Z = D + E + F + G + H
An array of carry save
adders reduce the inputs to
two
A final (fast) carry propagate
adder (CPA) merges the two
numbers
Performance mostly
dictated by CPA
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Multipliers
Largest common arithmetic block
Requires a lot of calculation
Has three parts
Partial Product Generation
Carry Save Tree to reduce partial products
Carry Propagate Adder to finalize the addition
Adder performance (once again) is important
Many optimization alternatives
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Decimal Multiplication
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Binary Multiplication
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For n-bit Multiplier m-bit Multiplicand
Generate Partial Products
For each bit of the multiplier the partial product is either
when ‘0’: all zeroes
when ‘1’: the multiplicand
achieved easily by AND gates
Reduce Partial Products
This is the job of a carry save adder
Generate the Result (n + m bits)
This is a large, fast Carry Propagate Adder
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Parallel Multiplier
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Parallel Multiplier
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Operations Based on Adders
Several well-known arithmetic operation are based on adders:
Negator
Incrementer
Subtracter
Adder Subtracter
Comparator
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Negating Two’s Complement Numbers
To negate a two’s
complement number
-A = A + 1
All bits are inverted
One is added to the result
Can be realized easily by an
adder.
B input is optimized away
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Incrementer
B input is zero
Carry In (Cin) of the adder
can be used as the
Increment (Inc) input
Decrementer similar in
principle
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Subtracter
B input is inverted
Cin of the adder is used to
complement B
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Subtracter
B input is inverted
Cin of the adder is used to
complement B
It can be made
programmable so that both
additions and subtractions
can be performed at the
same time
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Comparator
Based on a Subtractor
(A = B) = EQ
(A != B) = EQ
(A > B) = GE EQ
(A >= B) = GE
(A < B) = GE
(A <= B) = GE + EQ
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Functions Realized Without Adders
Not all arithmetic functions are realized by using adders
Shift / Rotate Units
Binary Logic functions are also used by processors
AND
OR
XOR
NOT
These are implemented very easily
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Shifters
Logical shifter: shifts value to left or right and fills empty
spaces with 0’s
Ex: 11001 >> 2 = ??
Ex: 11001 << 2 = ??
Arithmetic shifter: same as logical shifter, but on right shift,
fills empty spaces with the old most significant bit (msb).
Ex: 11001 >>> 2 = ??
Ex: 11001 <<< 2 = ??
Rotator: rotates bits in a circle, such that bits shifted off one
end are shifted into the other end
Ex: 11001 ROR 2 = ??
Ex: 11001 ROL 2 = ??
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Shifters
Logical shifter: shifts value to left or right and fills empty
spaces with 0’s
Ex: 11001 >> 2 = 00110
Ex: 11001 << 2 = 00100
Arithmetic shifter: same as logical shifter, but on right shift,
fills empty spaces with the old most significant bit (msb).
Ex: 11001 >>> 2 = 11110
Ex: 11001 <<< 2 = 00100
Rotator: rotates bits in a circle, such that bits shifted off one
end are shifted into the other end
Ex: 11001 ROR 2 = 01110
Ex: 11001 ROL 2 = 00111
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Shifter Design
A 3 A 2 A1 A0 shamt1:0
2
00 S1:0
01
10
Y3
11
00
S1:0
shamt1:0 01
Y2
2 10
11
A3:0 4 >> 4 Y3:0 00
S1:0
01
10
Y1
11
00
S1:0
01
10
Y0
11
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Shifters as Multipliers and Dividers
A left shift by N bits multiplies a number by 2N
Ex: 00001 << 2 = 00100 (1 × 22 = 4)
Ex: 11101 << 2 = 10100 (-3 × 22 = -12)
The arithmetic right shift by N divides a number by 2N
Ex: 01000 >>> 2 = 00010 (8 ÷ 22 = 2)
Ex: 10000 >>> 2 = 11100 (-16 ÷ 22 = -4)
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Other Functions
We have covered 90% of the arithmetic functions commonly
used in a CPU
Division
Dedicated architectures not very common
Mostly implemented by existing hardware (multipliers, subtractors
comparators) iteratively
Exponential, Logarithmic, Trigonometric Functions
Dedicated hardware (less common)
Numerical approximations:
exp(x) = 1 + x2/2! + x3/3! + …
Look-up tables (more common)
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Arithmetic Logic Unit
The reason why we study digital circuits:
the part of the CPU that does something (other than copying data)
Defines the basic operations that the CPU can perform directly
Other functions can be realized using the existing ones iteratively. (i.e.
multiplication can be realized by shifting and adding)
Mostly, a collection of resources that work in parallel.
Depending on the operation one of the outputs is selected
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Example: Arithmetic Logic Unit (ALU), pg243
F2:0 Function
000 A&B
A B
001 A|B
N N
010 A+B
ALU 3F 011 not used
N 100 A & ~B
Y 101 A | ~B
110 A-B
111 SLT
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Example: ALU Design
F2:0 Function
000 A&B
A
N
B
N 001 A|B
N
010 A+B
1
F2
N
011 not used
Cout +
[N-1] S
100 A & ~B
Extend
Zero
N N N N
101 A | ~B
1
0
3
2 F1:0
N
Y
110 A-B
111 SLT
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Set Less Than (SLT) Example
A B
N N Configure a 32-bit ALU for the set if
less than (SLT) operation. Suppose
A = 25 and B = 32.
N
A is less than B, so we expect Y to be the
1
F2 32-bit representation of 1
N
(0x00000001).
Cout +
[N-1] S
Extend
Zero
N N N N
1
0
3
2 F1:0
N
Y
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Set Less Than (SLT) Example
A B
N N Configure a 32-bit ALU for the set if
less than (SLT) operation. Suppose
A = 25 and B = 32.
N
A is less than B, so we expect Y to be the
1
F2 32-bit representation of 1
N
(0x00000001).
For SLT, F2:0 = 111.
F2 = 1 configures the adder unit as a
Cout +
[N-1] S
subtracter. So 25 - 32 = -7.
The two’s complement representation of
Extend
Zero
-7 has a 1 in the most significant bit, so
N N N N S31 = 1.
1
0
3
2 F1:0 With F1:0 = 11, the final multiplexer
N selects
Y Y = S31 (zero extended) = 0x00000001
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What Did We Learn?
How can we add, subtract, multiply binary numbers
What other circuits depend on adders
Subtracter
Incrementer
Comparator
Important part of Multiplier
Other functions (shifting)
How is an Arithmetic Logic Unit constructed
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