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PrimeTime PX Tutorials

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2K views14 pages

PrimeTime PX Tutorials

Uploaded by

Chandan Mallesh
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd

Synopsys®

PrimeTime PX Tutorials
Version 000-1, June 2013
Copyright Notice and Proprietary Information
 2013 Synopsys, Inc. All rights reserved. This software and documentation contain confidential and proprietary
information that is the property of Synopsys, Inc. The software and documentation are furnished under a license
agreement and may be used or copied only in accordance with the terms of the license agreement. No part of the
software and documentation may be reproduced, transmitted, or translated, in any form or by any means, electronic,
mechanical, manual, optical, or otherwise, without prior written permission of Synopsys, Inc., or as expressly provided
by the license agreement.

Destination Control Statement


All technical data contained in this publication is subject to the export control laws of the United States of America.
Disclosure to nationals of other countries contrary to United States law is prohibited. It is the reader’s responsibility to
determine the applicable regulations and to comply with them.

Disclaimer
SYNOPSYS, INC., AND ITS LICENSORS MAKE NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH
REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.

Trademarks
Synopsys and certain Synopsys product names are trademarks of Synopsys, as set forth at
[Link]
All other product or company names may be trademarks of their respective owners.

Third Party Links


Any links to third-party websites included in this document are for your convenience only. Synopsys does not endorse
and is not responsible for such websites and their practices, including privacy practices, availability, and content.

Synopsys, Inc.
700 E. Middlefield Road
Mountain View, CA 94043
[Link]

ii
Contents
Introduction ...................................................................................................................... 4
Averaged Power Analysis Mode Tutorial ......................................................................... 4
Related Files .......................................................................................................................... 4
PrimeTime PX Script File ....................................................................................................... 5
Gate-Level Netlist ................................................................................................................................. 6
Technology Library ............................................................................................................................... 6
SDC File ............................................................................................................................................... 6
Parasitic File ......................................................................................................................................... 6
Switching Activity ................................................................................................................................. 6
Steps for Analyzing Power ..................................................................................................... 6
Changing Your Working Directory........................................................................................................ 7
Running PrimeTime PX ........................................................................................................................ 7
Viewing the Power Report .................................................................................................................... 7
Vector-Free Power Analysis Mode Tutorial ..................................................................... 8
Related Files .......................................................................................................................... 8
PrimeTime PX Script .............................................................................................................. 8
Steps for Analyzing Power ..................................................................................................... 9
Running PrimeTime PX ........................................................................................................................ 9
Viewing the Power Report .................................................................................................................... 9
Time-Based Power Analysis Mode Tutorial ................................................................... 10
Related Files ........................................................................................................................ 10
PrimeTime PX Script ............................................................................................................ 10
Steps for Analyzing Power ................................................................................................... 11
Running PrimeTime PX ...................................................................................................................... 11
Reviewing the Power Report and Waveforms ................................................................................... 12
Viewing Power Waveforms Using nWave Waveform Viewer ............................................................ 12

iii
Introduction
PrimeTime PX supports two modes of power analysis: the averaged and the time-based
power analysis mode. The tool installation directory contains tutorials for both modes of
power analysis. To use the tutorial, copy the tutorial file to your own directory and follow
the instructions in this chapter. The design used in the tutorials consists of a multiplier,
an adder, and logic to connect them. The design example, the activity data files, the
scripts, and the steps you complete to run the examples are described in the following
sections:
 Averaged Power Analysis Mode Tutorial
 Vector-Free Power Analysis Mode Tutorial
 Time-Based Power Analysis Mode Tutorial

Averaged Power Analysis Mode Tutorial


The install_dir/doc/pt/tutpx/averaged directory contains the examples for averaged
power analysis. The averaged power analysis mode is selected when you set the
variable to . This variable must be set before
specifying any power analysis command.
The following sections describe the various files used in the tutorial, the commands used
in the PrimeTime PX scripts, how you run the examples in the tool and how to view the
generated report.

Related Files
In the tutorial directory, the files listed in Table 1 are related to averaged power analysis.
Table 1 Files for the Averaged Power Analysis Tutorial
File name Description
./sim/[Link] Value Change Dump (VCD) file
./src/hdl/gate/[Link] Gate-level netlist of the design
./src/lib/snps/core_typ.db Technology library file
./src/hdl/gate/[Link] Synopsys Design Constraints (SDC) file
./src/annotate/[Link] Parasitic file
./src/annotate/[Link] VCD file
./sim/[Link] SAIF file with switching activity
./averaged/ave_saif.tcl Averaged power analysis using switching activity
from the Switching Activity Interchange Format
(SAIF) file
./averaged/ave_vcd.tcl Averaged power analysis using switching activity

4
from the VCD file
./averaged/ave_vf.tcl Averaged power analysis using the default switching
activity

PrimeTime PX Script File


The tutorial contains three examples of Tcl scripts for the averaged power analysis mode.
Example 1 shows one such script.
Example 1 PrimeTime PX Script in the Tutorial For Averaged Power Analysis
#####################################################
# Set the Power Analysis Mode
#####################################################
set power_enable_analysis TRUE
set power_analysis_mode averaged
#####################################################
# Read and link the Gate Level Netlist
#####################################################
set search_path "../src/hdl/gate ../src/lib/snps . "
set link_library " * core_typ.db"
read_verilog [Link]
current_design mac
link
#####################################################
# Read SDC and set transition time or annotate parasitics
#####################################################
read_sdc ../src/hdl/gate/[Link]
set_disable_timing [get_lib_pins ssc_core_typ/*/G]
read_parasitics ../src/annotate/[Link]
#####################################################
# check, update, or report the timing
#####################################################
check_timing
update_timing
report_timing
#####################################################
# read switching activity file
#####################################################
read_vcd -strip_path tb/macinst ../sim/[Link]
report_switching_activity -list_not_annotated
#####################################################
# check or update or report power
#####################################################
check_power
update_power
report_power -hierarchy
quit

For more information about each command, review the remaining sections of this
chapter or check the man pages.
The commands in the script are grouped into different sections, which represent the
basic steps of power analysis. These steps are common for all types of power analysis:

5
1. Set the power analysis mode.
2. Read and link the design.
3. Set input transition and annotate parasitics.
4. Read the switching activity file.
5. Perform power analysis.

Gate-Level Netlist
PrimeTime PX supports a gate-level netlist only. The [Link] file is a gate-level Verilog
netlist. This netlist contains leaf-level cells that are the instantiation of the library cells.
The valid formats are Verilog, VHDL, EDIF, .db, .ddc, or Milkyway. Verilog is used for
this tutorial. The netlist can be either flat or hierarchical.

Technology Library
The technology library file contains library cells. Each cell has timing, power, and
characterization information. Internal power and leakage power are in the library.

SDC File
The SDC file contains the design constraints. The driver cell information is used to
calculate the transition time on the primary inputs.

Parasitic File
The parasitic file contains the capacitance of the nets. Capacitance is one of the factors
in determining the dynamic power. You can unzip and view the file.

Switching Activity
In the averaged power analysis, you use either SAIF or VCD file formats to read the
switching activity.
A SAIF file is generated either from gate-level or RTL simulation. RTL SAIF captures
switching activity for only part of the design. PrimeTime PX propagates the partial
switching activity throughout the whole design.
You can also use the VCD file to specify the switching activity information. If you do not
specify switching activity information, the tool assumes certain defaults for the switching
activity.

Steps for Analyzing Power


For this tutorial, the working directory is ./tutpx/averaged. The search path is set based
on that directory. It should be your current directory. Before running the tutorial, verify
that PrimeTime PX has been installed.

6
Changing Your Working Directory
Change your current directory to ./tutpx/averaged. The search path setting is based on
this directory.

Running PrimeTime PX
You can run any of the example scripts, ave_saif.tcl, ave_vcd.tcl or ave_vf.tcl for the
averaged power analysis flow. For instance, to run the ave_saif.tcl script, enter the
following command:

PrimeTime PX runs in batch mode. The tool stops when all the commands in the Tcl
script have been executed.
Perform timing analysis before running the command. This improves
performance and avoids additional timing updates triggered by the switching activity
annotation commands.

Viewing the Power Report


In the averaged power analysis mode, using the SAIF file format for activity information,
the command generates the power report as shown in Example 2.
Example 2 Report Generated by the report_power Command

7
Vector-Free Power Analysis Mode Tutorial
When you select the averaged power analysis mode and do not specify any activity
information, the tool performs vector-free power analysis. In this mode, PrimeTime PX
applies the default toggle rate on the primary inputs and black box outputs and then
propagates them. If required, you can change the default toggle rate. This usage model is
useful for quick power estimation.

Related Files
In the tutorial directory, the files listed in Table 2 are related to the vector-free analysis
tutorial.
Table 2 Files for Vector-Free Tutorial
File Name Description
./averaged/ave_vf.tcl PrimeTime PX script for vector-free analysis
./src/hdl/gate/[Link] Gate-level netlist of the design
./src/lib/snps/core_typ.db Technology library file
./src/hdl/gate/[Link] Synopsys Design Constraints (SDC) file
./src/annotate/[Link] Parasitic file

PrimeTime PX Script
This is a Tcl script. You specify the search path, the link and the target library, the
PrimeTime PX variables and commands for power analysis, in this script.
Example 3 PrimeTime PX Script in the Tutorial For Vector-Free Power Analysis
#####################################################
Link the Design
#####################################################
set search_path "../src/hdl/gate ../src/lib/snps . "
set link_library " * core_typ.db"

set power_enable_analysis true


set power_analysis_mode averaged
set read_verilog [Link]
current_design mac
link
#####################################################
# set transition time / annotate parasitics
#####################################################
read_sdc ../src/hdl/gate/[Link]
read_parasitics ../src/annotate/[Link]
#####################################################
# power analysis
#####################################################
check_timing
update_timing

8
report_timing
update_power
report_power -hierarchy

Steps for Analyzing Power


The current working directory should be ./tutpx/averaged.

Running PrimeTime PX
To run the ave_vf.tcl script in PrimeTime PX, enter the following command:

PrimeTime PX runs in batch mode and stops when all the commands in the script have
been executed.
Perform timing analysis before running the command. This improves
performance and avoids additional timing updates triggered by the switching activity
annotation commands.

Viewing the Power Report


The power report from vector-free power analysis has the same format as the SAIF-
based report. The report shows only averaged power but not peak power.

9
Time-Based Power Analysis Mode Tutorial
The install_dir/doc/pt/tutpx/time_based contains the examples for time-based power
analysis. The time-based power analysis mode is selected when you set the
variable to . This variable must be set before
specifying any power analysis command.
The following sections describe the various files used in the tutorial, the commands used
in the PrimeTime PX scripts, how you run the examples in the tool and how to view the
generated report.

Related Files
In the tutorial directory, the files listed in Table 3 are related to the time-based power
analysis tutorial.
Table 3 Files for the Time-Based Power Analysis Tutorial
File name Description
./time_based/tim_gatevcd.tcl Script for gate-level time-based power analysis
./time_based/tim_rtlvcd.tcl Script for RTL VCD time-based power analysis
./src/hdl/gate/[Link] Gate-level netlist of the design
./src/lib/snps/core_typ.db Technology library file
./src/hdl/gate/[Link] Synopsys Design Constraints (SDC) file
./src/annotate/[Link] Parasitic file
./sim/[Link] RTL VCD file
./sim/[Link] Gate-level VCD file

PrimeTime PX Script
The tutorial contains two Tcl script examples for the time-based power analysis mode.
Example 4 shows the various steps in time-based power analysis:
Example 4 Script Example for Time-Based Power Analysis
#####################################################
# Set the Power Analysis Mode
#####################################################
set power_enable_analysis TRUE
set power_analysis_mode time_based
#####################################################
# link design
##############################################
set search_path "../src/hdl/gate ../src/lib/snps . "
set link_library " * core_typ.db"
read_verilog [Link]
current_design mac
link

10
#####################################################
# set transition time / annotate parasitics
#####################################################
read_sdc ../src//hdl/gate/[Link]
set_disable_timing [get_lib_pins ssc_core_typ/*/G]
read_parasitics ../src/annotate/[Link]
#####################################################
check_timing
update_timing
report_timing
#####################################################
# read switching activity file
#####################################################
read_vcd ../sim/[Link] -strip_path tb/macinst
#####################################################
# analyze power
#####################################################
check_power
set_power_analysis_options -waveform_format out -waveform_output vcd
update_power
report_power
quit

The commands in the script are grouped into different sections, which represent the
basic steps of power analysis. These steps are common for all types of power analysis:
1. Set the power analysis mode.
2. Read and link the design.
3. Set input transition and annotate parasitics.
4. Read the switching activity file.
Perform power analysis.

Steps for Analyzing Power


Set the current working directory to ./tutpx/time_based.

Running PrimeTime PX
The tutorial contains two example scripts for time-based power analysis using
PrimeTime PX. You use the tim_gatevcd.tcl to run the gate-level time-based analysis
and tim_rtlvcd.tcl to run the RTL VCD time-based analysis.
To run the tim_gatevcd.tcl script, use the following command:

PrimeTime PX runs in batch mode. The tool halts when all the commands in the script
have been executed.
Perform timing analysis before running the command. This improves
performance and avoids additional timing updates triggered by the switching activity
annotation commands.

11
Reviewing the Power Report and Waveforms
At the end of the run, PrimeTime PX prints out the power report. Example 5 shows the
report which itemizes the power consumption on each hierarchical instance.
Example 5 Power Report Showing Itemized Power Consumption on Each Hierarchical Instance

Viewing Power Waveforms Using nWave Waveform Viewer


After the power analysis, a power .fsdb waveform file is saved in the current directory.
To view the file, use the waveform viewer called nWave. In the UNIX shell, enter
to start the viewer. Specify to view the usage options and their descriptions.
This viewer requires a snps_fs_nwave license.
Alternatively, in the GUI, choose Power > View Waveforms to open nWave. Figure 1
shows the waveforms for peak power analysis.

12
Figure 1 Peak Power Analysis Waveform

Figure 2 show the waveforms for and cycle accurate peak power analysis respectively.
Figure 2 Cycle Accurate Peak Power Analysis Waveform

13
Software Compatibility
The nWave waveform viewer version 2012.01p2 supports the latest FSDB library and
the fsdb2vcd utility. The FSDB library is used to output the power waveform file in the
.fsdb format, while the fsdb2vcd utility converts the .fsdb format to the VCD format.
The nWave version 2012.01p2 is backward compatible and supports previous releases of
PrimeTime PX.

14

Common questions

Powered by AI

Setting up and running a power analysis using PrimeTime PX involves several critical steps, each significant for ensuring precise analysis. First, the power analysis mode must be set, either averaged or time-based, dictating the type and depth of power computations . Second, reading and linking the design using a gate-level netlist forms the structural foundation for the analysis . Third, setting input transition times and annotating parasitics ensures accurate timing and power estimations by simulating real-world signal transitions and loading effects . Fourth, reading switching activity files like SAIF or VCD captures the design's dynamic behavior, essential for time-accurate power analysis . Finally, executing power analysis commands, such as check_power and update_power, generates reports and performs checks that inform design decisions and optimizations . Together, these steps integrate structural, behavioral, and environmental facets of the design, crucial for comprehensive power and timing assessments.

PrimeTime PX uses Averaged and Time-Based power analysis modes to provide different insights into a design’s power consumption. In Averaged mode, the power analysis uses either SAIF or VCD file formats for switching activity, offering a generalized view over a period of time and supporting quick estimation by applying a default toggle rate if specific activity data is not provided . This mode is useful for estimating average power consumption across the entire design. Conversely, the Time-Based mode is utilized for more detailed analysis, capturing variations over time and producing waveforms for peak power and dynamic changes in switching patterns . This mode requires more specific activity data and results in more detailed reports such as time-annotated power waveforms . While Averaged mode allows fast estimation and broader insights, the Time-Based mode provides precise timing and peak power occurrence data, essential for designs with strict power constraints.

Key components described in the Synopsys PrimeTime PX for power analysis include the gate-level netlist, technology library, SDC file, and parasitic file. The gate-level netlist, such as in Verilog format, consists of leaf-level cells that represent the design's structure, serving as the basis for analysis . The technology library contains crucial timing, power, and characterization data for each cell, impacting the internal and leakage power calculations . The SDC file provides design constraints that define timing requirements, influencing transition time calculations on primary inputs . The parasitic file offers capacitance data of the nets, which is essential for estimating dynamic power consumption . Together, these components enable precise and comprehensive power analysis in the context of PrimeTime PX.

Time-Based Power Analysis mode in Synopsys PrimeTime PX offers significant benefits for detailed design evaluations by capturing and analyzing power variation over time, allowing for precise identification of peak power occurrences and dynamic switching activities . This mode uses detailed timing and activity data, such as VCD files, to produce power waveforms and itemized consumption reports per hierarchical instance . It is especially beneficial for designs with strict power budgets or thermal constraints, as it supports waveform viewing and peak power identification using tools like nWave . However, the limitations include increased data and computational requirements compared to Averaged analysis. The need for specific switching activity data can lead to longer setup and execution times . This complexity, while providing richer insights, might also necessitate additional expertise and resources for implementation and interpretation.

To conduct a Vector-Free Power Analysis using PrimeTime PX, one must set the power analysis mode to averaged without specifying any switching activity information, leading the tool to apply a default toggle rate across primary inputs and outputs. This method eliminates the need for activity files such as SAIF or VCD, simplifying the estimation process by providing a quick, generalized power estimation . The primary file involved is the ./averaged/ave_vf.tcl script, which adjusts the power analysis to default settings and thereby allows users to efficiently obtain power estimations without intricate setup . This mode is practical for scenarios requiring fast power estimations where detailed switching activity is not readily available.

Using a Switching Activity Interchange Format (SAIF) file versus a Value Change Dump (VCD) file in averaged power analysis mode in PrimeTime PX has distinct practical implications. A SAIF file typically generates from either gate-level or RTL simulation and captures switching activity for portions of the design, which PrimeTime PX then propagates to estimate activity throughout the entire design . This makes SAIF useful when focusing on specific design segments while still needing an overall measurement. On the other hand, a VCD file directly records signal changes and is more comprehensive, capturing detailed state transitions . While the VCD format may offer more granularity, it can result in larger file sizes and potentially more complex analysis setups compared to SAIF. Both formats, when read by PrimeTime PX, enable nuanced power estimations, but VCD files might be preferred when complete, detailed switching states are necessary for precise analysis .

Parasitic files play a pivotal role in power analysis within PrimeTime PX by providing detailed capacitance information needed to compute dynamic power. The capacitance values of the nets, detailed in parasitic files such as mac.spef.gz, affect how a circuit's power consumption is calculated when signals switch states . Compared to the gate-level netlist, which supplies the structural blueprint, and the technology library file, which offers timing and characterization data, parasitic files are unique in capturing real-world effects on power from interconnects between components . These files complement the SDC files by enabling accurate prediction of resistive and capacitive loads, essential for precise power and timing analysis. Their integration ensures that PrimeTime PX's estimations consider physical layout intricacies, which is crucial for low-power and high-frequency designs .

Synopsys PrimeTime PX ensures confidentiality and compliance with export control laws through several measures embedded in its software and documentation licensing agreements. The documentation is clearly marked as containing confidential and proprietary information of Synopsys, Inc., restricted under a specific license agreement that prohibits reproduction or transmission without proper authorization . Additionally, there is a statement highlighting that the technical data is subject to U.S. export control laws, indicating that disclosure to nationals of foreign countries is prohibited unless in compliance with these regulations . It is noted that responsibility for adhering to applicable regulations rests with the reader, reinforcing user accountability for legal compliance when using the software and documentation .

In Synopsys PrimeTime PX, the gate-level netlist and the design constraints file (SDC) are interrelated components crucial for precise power and timing analysis. The gate-level netlist, such as mac.vg in Verilog format, represents the structural configuration of the design with instantiated cells from the library . The SDC file specifies design constraints like timing requirements, determining input signal transition timings . These constraints are essential for accurate static timing analysis, which is a prerequisite for reliable power analysis. Together, they provide a complete framework where the netlist defines the structural basis, and SDC constraints ensure that the design operates within specified limits, affecting timing and power accuracy such as power consumption estimates and timing margins . Their integration allows Synopsys PrimeTime PX to deliver comprehensive analysis outputs that reflect real-world conditions.

Using Synopsys PrimeTime PX’s default toggle rate in Vector-Free Power Analysis mode presents both advantages and limitations. The default toggle rate serves as a quick estimate for power consumption by assuming typical input activity levels across the design, thus expediting analysis when specific switching data is unavailable . This approach is beneficial for rapid evaluations, helping identify power issues early in the design cycle with minimal setup overhead . However, the absence of design-specific activity data can result in less accurate power estimations, particularly for designs with non-standard or variable toggle rates. It risks overlooking power spikes or underreporting power usage in logic blocks with atypical activity patterns. Consequently, while the default toggle rate can help streamline analysis in resource-limited scenarios, it may not always provide sufficient precision for designs requiring thorough power-activity correlation .

Synopsys ® PrimeTime PX Tutorials Version 000-1, June 2013
ii Copyright Notice and Proprietary Information  2013 Synopsys, Inc. All rights reserved. This software and documentatio
iii Contents Introduction ...............................................................................................
4 Introduction PrimeTime PX supports two modes of power analysis: the averaged and the time-based power analysis mode. T
5 from the VCD file ./averaged/ave_vf.tcl Averaged power analysis using the default switching activity PrimeTime PX Sc
6 1. Set the power analysis mode. 2. Read and link the design. 3. Set input transition and annotate parasitics. 4. Read
7 Changing Your Working Directory Change your current directory to ./tutpx/averaged. The search path setting is based on
8 Vector-Free Power Analysis Mode Tutorial When you select the averaged power analysis mode and do not specify any activi
9 report_timing update_power report_power -hierarchy Steps for Analyzing Power The current working directory should be
10 Time-Based Power Analysis Mode Tutorial The install_dir/doc/pt/tutpx/time_based contains the examples for time-based p

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