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3-Bit Asynchronous Counter Overview

This document describes a 3-bit asynchronous counter circuit. It consists of 3 flip-flops wired such that the clock signal is only connected to the least significant bit flip-flop, and the outputs of the flip-flops are chained together. This causes the counter to increment asynchronously, without all flip-flops changing state simultaneously. The counter progresses through 8 total states as represented by the 3-bit output and follows the timing diagram shown. It works similarly to a 2-bit asynchronous counter but has an additional flip-flop, allowing it to count up to 7.

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Mishra Sushil
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0% found this document useful (0 votes)
295 views5 pages

3-Bit Asynchronous Counter Overview

This document describes a 3-bit asynchronous counter circuit. It consists of 3 flip-flops wired such that the clock signal is only connected to the least significant bit flip-flop, and the outputs of the flip-flops are chained together. This causes the counter to increment asynchronously, without all flip-flops changing state simultaneously. The counter progresses through 8 total states as represented by the 3-bit output and follows the timing diagram shown. It works similarly to a 2-bit asynchronous counter but has an additional flip-flop, allowing it to count up to 7.

Uploaded by

Mishra Sushil
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as DOCX, PDF, TXT or read online on Scribd

INNOVA

TION
in
Digital
Circuits
Topic: 3 Bit Asynchronus
and Counter
Systems
-I

Made by:-

Sushil Kumar Mishra (ECE-I)

Roll no. – 05311502809


Asynchronous Counters

Introduction

A counter is a very simple device. It usually counts from 0 to N (treating them as UB).
Some counters allow you to hold the value or to increment one at a time.

We're going to build a very simple counter using T flip flops.

This counter is called asynchronous because not all flip flops are hooked to the same
clock.

2-Bit Asynchronous Counter


A two-bit asynchronous
counter is shown on the
left.  The external clock is
connected to the clock
input of the first flip-flop
(FF0) only.  So, FF0 changes
state at the falling edge of
each clock pulse, but FF1
changes only when
triggered by the falling
edge of the Q output of
FF0.  Because of the
inherent propagation delay
through a flip-flop, the
transition of the input clock
pulse and a transition of
the Q output of FF0 can
never occur at exactly the
same time.  Therefore, the
flip-flops cannot be
triggered simultaneously,
producing an asynchronous
operation.
•The clock input of an asynchronous counter is always connected only to the
LSB (Least Significant Bit) flip-flops.

•Asynchronous Counter is a digital circuit in which flip-flops (FF) within the


counter do not change states at exactly the same time because they do not have a
common clock pulse.

•Clock signal is applied to the clock input “C” of LSB flip-flop.

•Asynchronous counters are also known as ripple counters.

Note that for simplicity, the transitions of Q0, Q1 and CLK in the timing
diagram above are shown as simultaneous even though this is an asynchronous
counter.  Actually, there is some small delay between the CLK, Q0 and Q1
transitions.    

Usually, all the CLEAR inputs are connected together, so that a single pulse can
clear all the flip-flops before counting starts.  The clock pulse fed into FF0 is
rippled through the other counters after propagation delays, like a ripple on
water, hence the name Ripple Counter.

The 2-bit ripple counter circuit above has four different states, each one
corresponding to a count value.  Similarly, a counter with n flip-flops can have 2
to the power n states.  The number of states in a counter is known as itsmod
(modulo) number.  Thus a 2-bit counter is a mod-4 counter.

3-Bit Asynchronous Counter


The following is a three-bit asynchronous binary counter .and its timing diagram
for one cycle.  It works exactly the same way as a two-bit asynchronous binary
counter mentioned above, except it has eight states due to the third flip-flop.
•Operation is the same as that of a 2-Bit Counter.

•The counter has 8 states instead of 4.

•An additional FF is wired to the dual FFs of a 2- Bit Counter.

•Just like a 2 Bit Counter a Timing Diagram is used to analyze the counting
sequence of the digital circuit.

Truth Table :

Clock Pulse Q2 Q1 Q0
0 0 0 0
1 0 0 1
2 0 1 0
3 0 1 1
4 1 0 0
5 1 0 1
6 1 1 0
7 1 1 1

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