KIT

ATION
19-2548; Rev 0; 7/02 EVALU BL E
AVAILA

2-Wire Interfaced, 2.7V to 5.5V LED Display

Driver with I/O Expander and Key Scan
General Description Features

MAX6955
The MAX6955 is a compact display driver that interfaces ♦ 400kbps 2-Wire Interface Compatible with I2C
microprocessors to a mix of 7-segment, 14-segment, ♦ 2.7V to 5.5V Operation
and 16-segment LED displays through an I2C™-compati-
ble 2-wire serial interface. The MAX6955 drives up to 16 ♦ Drives Up to 16 Digits 7-Segment, 8 Digits
digits 7-segment, 8 digits 14-segment, 8 digits 16-seg- 14-Segment, 8 Digits 16-Segment, 128 Discrete
ment, or 128 discrete LEDs, while functioning from a LEDs, or a Combination of Digit Types
supply voltage as low as 2.7V. The driver includes five ♦ Drives Common-Cathode Monocolor and Bicolor
I/O expander or general-purpose I/O (GPIO) lines, some LED Displays
or all of which can be configured as a key-switch reader.
The key-switch reader automatically scans and ♦ Built-In ASCII 104-Character Font for 14-Segment
debounces a matrix of up to 32 switches. and 16-Segment Digits and Hexadecimal Font for
Included on chip are full 14- and 16-segment ASCII 7-Segment Digits
104-character fonts, a hexadecimal font for 7-segment ♦ Automatic Blinking Control for Each Segment
displays, multiplex scan circuitry, anode and cathode ♦ 10µA (typ) Low-Power Shutdown (Data Retained)
drivers, and static RAM that stores each digit. The max-
imum segment current for the display digits is set using ♦ 16-Step Digit-by-Digit Digital Brightness Control
a single external resistor. Digit intensity can be inde- ♦ Display Blanked on Power-Up
pendently adjusted using the 16-step internal digital
♦ Slew-Rate-Limited Segment Drivers for Lower EMI
brightness control. The MAX6955 includes a low-power
shutdown mode, a scan-limit register that allows the ♦ Five GPIO Port Pins Can Be Configured as Key-
user to display from 1 to 16 digits, segment blinking Switch Reader to Scan and Debounce Up to 32
(synchronized across multiple drivers, if desired), and a Switches with n-Key Rollover
test mode, which forces all LEDs on. The LED drivers ♦ IRQ Output when a Key Input is Debounced
are slew-rate limited to reduce EMI.
♦ 36-Pin SSOP and 40-Pin DIP Packages
For an SPI™-compatible version, refer to the MAX6954
data sheet. An evaluation kit* (EV kit) for the MAX6955 ♦ Automotive Temperature Range Standard
is available.
*Future product—contact factory for availability. Functional Diagram

Applications GPIO P0 TO P4
AND KEY-SCAN
Set-Top Boxes Automotive CONTROL

CURRENT PWM
Panel Meters Bar Graph Displays ISET
SOURCE BRIGHTNESS O0 TO O18
LED
CONTROL DRIVERS
White Goods Audio/Video Equipment
DIGIT
OSC DIVIDER/ MULTIPLEXER
COUNTER
Ordering Information OSC_OUT NETWORK
CHARACTER
GENERATOR
PART TEMP RANGE PIN-PACKAGE MAX6955 ROM

MAX6955AAX -40°C to +125°C 36 SSOP

BLINK
MAX6955APL -40°C to +125°C 40 PDIP BLINK
CONTROL

Pin Configurations and Typical Operating Circuits appear CONFIGURATION

at end of data sheet. RAM REGISTER

SCL
I2C is a trademark of Philips Corp. AD0 2-WIRE SERIAL INTERFACE
SPI is a trademark of Motorola, Inc. AD1
SDA

________________________________________________________________ Maxim Integrated Products 1

For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at [Link].
 2-Wire Interfaced, 2.7V to 5.5V LED Display
Driver with I/O Expander and Key Scan
ABSOLUTE MAXIMUM RATINGS
MAX6955

Voltage (with Respect to GND) Continuous Power Dissipation (TA = +70°C)

V+ .........................................................................-0.3V to +6V 36-Pin SSOP (derate at 11.8mW/°C above +70°C) .....941mW
SCL, SDA, AD0, AD1 ...........................................-0.3V to +6V 40-Pin PDIP (derate at 16.7mW/°C above +70°C).....1333mW
All Other Pins............................................-0.3V to (V+ + 0.3V) Operating Temperature Range
Current (TMIN to TMAX) ...............................................-40°C to +125°C
O0–O7 Sink Current ......................................................935mA Junction Temperature ......................................................+150°C
O0–O18 Source Current .................................................55mA Storage Temperature Range .............................-65°C to +150°C
SCL, SDA, AD0, AD1, BLINK, OSC, OSC_OUT, ISET ....20mA Lead Temperature (soldering, 10s) .................................+300°C
P0, P1, P2, P3, P4 ...........................................................40mA
GND .....................................................................................1A
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.

DC ELECTRICAL CHARACTERISTICS
(Typical Operating Circuit, V+ = 2.7V to 5.5V, TA = TMIN to TMAX, unless otherwise noted.) (Note 1)

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

Operating Supply Voltage V+ 2.7 5.5 V
Shutdown mode, all TA = +25°C 10 35
Shutdown Supply Current ISHDN digital inputs at V+ µA
or GND TA = TMIN to TMAX 40

All segments on, all

digits scanned, TA = +25°C 22 30
intensity set to full,
Operating Supply Current I+ mA
internal oscillator, no
display or OSC_OUT TA = TMIN to TMAX 35
load connected
OSC = RC oscillator, RSET = 56kΩ,
4
Master Clock Frequency fOSC CSET = 22pF, V+ = 3.3V MHz
OSC driven externally 1 8
Dead Clock Protection Frequency fOSC 95 kHz
OSC Internal/External Detection
VOSC 1.7 V
Threshold
OSC High Time tCH 50 ns
OSC Low Time tCL 50 ns
OSC = RC oscillator, RSET = 56kΩ,
Slow Segment Blink Period fSLOWBLINK C 1 s
SET = 22pF, V+ = 3.3V

OSC = RC oscillator, RSET = 56kΩ,

Fast Segment Blink Period fFASTBLINK 0.5 s
CSET = 22pF, V+ = 3.3V
Fast or Slow Segment Blink Duty
49.5 50.5 %
Cycle

2 _______________________________________________________________________________________
 2-Wire Interfaced, 2.7V to 5.5V LED Display
Driver with I/O Expander and Key Scan
DC ELECTRICAL CHARACTERISTICS (continued)

MAX6955
(Typical Operating Circuit, V+ = 2.7V to 5.5V, TA = TMIN to TMAX, unless otherwise noted.) (Note 1)

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

VLED = 2.2V,
V+ = 3.3V
Segment Drive Source Current ISEG TA = +25°C -32 -40 -48 mA
VLED = 2.2V,
V+ = 2.7V
Segment Current Slew Rate ∆ISEG/∆t TA = +25°C, V+ = 3.3V 11 mA/µs
Segment Drive Current Matching ∆ISEG TA = +25°C, V+ = 3.3V 5 %
LOGIC INPUTS AND OUTPUTS
Input High Voltage 0.7 x
VIH V
SDA, SCL, AD0, AD1 V+
Input Low Voltage 0.3 x
VIL V
SDA, SCL, AD0, AD1 V+

Input Leakage Current

SDA, SCL, AD0, AD1, OSC, P0, IIH, IIL -1 +1 µA
P1, P2, P3, P4
SDA Output Low Voltage VOLSDA ISINK = 6mA 0.4 V
Port Logic-High Input Voltage 0.7 x
VIHP V
P0, P1, P2, P3, P4 V+
Port Logic-Low Input Voltage 0.3 x
VILP V
P0, P1, P2, P3, P4 V+
Port Hysteresis Voltage 0.03 x
∆VIP V
P0, P1, P2, P3, P4 V+
P0 to P3 configured as key-scan inputs,
Port Input Pullup Current from V+ IIPU 75 µA
V+ = 3.3V
Port Output Low Voltage VOLP ISINK = 8mA 0.3 0.5 V
Blink Output Low Voltage VOLBK ISINK = 0.6mA 0.1 0.3 V
V+ -
OSC_OUT Output High Voltage VOHOSC ISOURCE = 1.6mA V
0.4
OSC_OUT Output Low Voltage VOLOSC ISINK = 1.6mA 0.4 V

_______________________________________________________________________________________ 3
 2-Wire Interfaced, 2.7V to 5.5V LED Display
Driver with I/O Expander and Key Scan
TIMING CHARACTERISTICS
MAX6955

(Typical Operating Circuit, V+ = 2.7V to 5.5V, TA = TMIN to TMAX, unless otherwise noted.) (Note 1)

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

TIMING CHARACTERISTICS
Serial Clock Frequency fSCL 400 kHz
Bus Free Time Between a STOP
tBUF 1.3 µs
and a START Condition
Hold Time (Repeated) START
tHD, tSTA 0.6 µs
Condition
Repeated START Condition Setup
tSU, tSTA 0.6 µs
Time
STOP Condition Setup Time tSU:STO 0.6 µs
Data Hold Time tHD, tDAT (Note 3) 0.9 µs
Data Setup Time tSU, tDAT 100 ns
SCL Clock Low Period tLOW 1.3 µs
SCL Clock High Period tHIGH 0.6 µs
Rise Time of Both SDA and SCL 20 +
tR (Notes 2, 4) 300 ns
Signals, Receiving 0.1CB
Fall Time of Both SDA and SCL 20 +
tF (Notes 2, 4) 300 ns
Signals, Receiving 0.1CB
20 +
Fall Time of SDA Transmitting t F , tX (Notes 2, 5) 300 ns
0.1CB
Pulse Width of Spike Suppressed tSP (Notes 2, 6) 0 50 ns
Capacitive Load for Each
CB (Note 2) 400 pF
Bus Line

Note 1: All parameters tested at TA = +25°C. Specifications over temperature are guaranteed by design.
Note 2: Guaranteed by design.
Note 3: A master device must provide a hold time of at least 300ns for the SDA signal (referred to VIL- of the SCL signal) in order to
bridge the undefined region of SCL’s falling edge.
Note 4: CB = total capacitance of one bus line in pF. tR and tF measured between 0.3V+ and 0.7V+.
Note 5: ISINK ≤ 6mA. CB = total capacitance of one bus line in pF. tR and tF measured between 0.3V+ and 0.7V+.
Note 6: Input filters on the SDA and SCL inputs suppress noise spikes less than 50ns.

4 _______________________________________________________________________________________
 2-Wire Interfaced, 2.7V to 5.5V LED Display
Driver with I/O Expander and Key Scan
Typical Operating Characteristics

MAX6955
(V+ = 3.3V, LED forward voltage = 2.4V, Typical Application Circuit, TA = +25°C, unless otherwise noted.)

INTERNAL OSCILLATOR FREQUENCY INTERNAL OSCILLATOR FREQUENCY INTERNAL OSCILLATOR WAVEFORM

vs. TEMPERATURE vs. SUPPLY VOLTAGE AT OSC AND OSC_OUT PINS
MAX6954 toc03
4.4 4.4

MAX6955 toc01
RSET = 56kΩ

MAX6955 toc02
RSET = 56kΩ RSET = 56kΩ CSET = 22pF
CSET = 22pF CSET = 22pF
OSCILLATOR FREQUENCY (MHz)

OSCILLATOR FREQUENCY (MHz)

4.2 4.2 OSC

4.0 4.0 0V

3.8 3.8 OSC_OUT

0V

3.6 3.6
-40 -10 20 50 80 110 2.5 3.0 3.5 4.0 4.5 5.0 5.5 100ns/div
TEMPERATURE (°C) SUPPLY VOLTAGE (V) OSC: 500mV/div
OSC_OUT: 2V/div
DEAD CLOCK OSCILLATOR FREQUENCY SEGMENT SOURCE CURRENT WAVEFORM AT PINS O0 AND O18,
vs. SUPPLY VOLTAGE vs. SUPPLY VOLTAGE MAXIMUM INTENSITY
MAX6954 toc06
110 1.02

MAX6955 toc05
MAX6955 toc04

RSET = 56kΩ
105 CSET = GND
CURRENT NORMALIZED TO 40mA
OSCILLATOR FREQUENCY (MHz)

1.00
O0
100
0.98
95 0V
0.96
90

0.94 O18
85
VLED = 1.8V
80 0.92 0V
2.5 3.0 3.5 4.0 4.5 5.0 5.5 2.5 3.0 3.5 4.0 4.5 5.0 5.5 1V/div
SUPPLY VOLTAGE (V) SUPPLY VOLTAGE (V) 200µs/div

GPIO SINK CURRENT PORT INPUT PULLUP CURRENT KEY-SCAN OPERATION

vs. TEMPERATURE vs. TEMPERATURE (KEY_A AND IRQ)
MAX6954 toc09
45 0.5
MAX6955 toc08
MAX 6955 toc07

OUTPUT = LOW OUTPUT = HIGH

40 VPORT = 0.6V VPORT = 1.4V
KEY-SCAN SOURCE CURRENT (mA)

VCC = 5.5V
35 0.4
GPIO SINK CURRENT (mA)

30 VCC = 5.5V
0.3 KEY_A
25

20
VCC = 3.3V 0.2 0V
15 VCC = 3.3V
VCC = 2.5V
10 0.1 VCC = 2.5V IRQ
5 0V

0 0
-40 -10 20 50 80 110 -40 -10 20 50 80 110 400µs/div
TEMPERATURE (°C) TEMPERATURE (°C) KEY_A: 1V/div
IRQ: 2V/div

_______________________________________________________________________________________ 5
 2-Wire Interfaced, 2.7V to 5.5V LED Display
Driver with I/O Expander and Key Scan
Pin Description
MAX6955

PIN
NAME FUNCTION
SSOP PDIP
General-Purpose I/O Ports (GPIOs). GPIO can be configured as logic inputs or open-drain
1, 2, 1, 2,
P0–P4 outputs. Enabling key scanning configures some or all ports P0–P3 as key-switch matrix
34, 35, 36 38, 39, 40
inputs with internal pullup and port P4 as IRQ output.

Address Input 0. Sets device slave address. Connect to GND, V+, SCL, or SDA to give four
3 3 AD0
logic combinations. See Table 5.
4 4 SDA I2C-Compatible Serial Data I/O
5 5 SCL I2C-Compatible Serial Clock Input
Address Input 1. Sets device slave address. Connect to GND, V+, SCL, or SDA to give four
6 6 AD1
logic combinations. See Table 5.

Digit/Segment Drivers. When acting as digit drivers, outputs O0 to O7 sink current from the
7–15, 7–15, display common cathodes. When acting as segment drivers, O0 to O18 source current to the
O0–O18
22–31 26–35 display anodes. O0 to O18 are high impedance when not being used as digit or segment
drivers.
16, 18 17, 18, 20 GND Ground
Segment Current Setting. Connect ISET to GND through series resistor RSET to set the peak
17 19 ISET
current.
Positive Supply Voltage. Bypass V+ to GND with a 47µF bulk capacitor and a 0.1µF ceramic
19, 21 21, 23, 24 V+
capacitor.
Multiplex Clock Input. To use internal oscillator, connect capacitor CSET from OSC to GND.
20 22 OSC
To use external clock, drive OSC with a 1MHz to 8MHz CMOS clock.
32 36 BLINK Blink Clock Output. Output is open drain.
Clock Output. OSC_OUT is a buffered clock output to allow easy blink synchronization of
33 37 OSC_OUT
multiple MAX6955s. Output is push-pull.
— 16, 25 N.C. Not Internally Connected

Detailed Description ment control allows the MAX6955 to be used to drive

bar graphs and discrete LED indicators.
The MAX6955 is a serially interfaced display driver that
can drive up to 16 digits 7-segment, 8 digits 14-seg- Tables 2, 3, and 4 list the connection schemes for 16-,
ment, 8 digits 16-segment, 128 discrete LEDs, or a 14-, and 7-segment digits, respectively. The letters in
combination of these display types. Table 1 shows the Tables 2, 3, and 4 correspond to the segment labels
drive capability of the MAX6955 for monocolor and shown in Figure 1. (For applications that require mixed
bicolor displays. display types, see Tables 38–41.)
The MAX6955 includes 104-character ASCII font maps Serial Interface
for 14-segment and 16-segment displays, as well as Serial Addressing
the hexadecimal font map for 7-segment displays. The The MAX6955 operates as a slave that sends and
characters follow the standard ASCII font, with the addi- receives data through an I2C-compatible 2-wire inter-
tion of the following common symbols: £, , ¥, °, µ, ±, face. The interface uses a serial data line (SDA) and a
↑, and ↓. Seven bits represent the 104-character font serial clock line (SCL) to achieve bidirectional commu-
map; an 8th bit is used to select whether the decimal nication between master(s) and slave(s). A master (typ-
point (DP) is lit. Seven-segment LED digits can be con- ically a microcontroller) initiates all data transfers to and
trolled directly or use the hexadecimal font. Direct seg-

6 _______________________________________________________________________________________
 2-Wire Interfaced, 2.7V to 5.5V LED Display
Driver with I/O Expander and Key Scan

MAX6955
1a 2a a a1 a2

1f 1b 2f 2b f h i j b
f h i j b

1g 2g g1 g2 g1 g2

1e 1c 2e 2c e m l k c e m l k c

1dp 2dp dp dp
1d 2d d d1 d2

Figure 1. Segment Labeling for 7-Segment Display, 14-Segment Display, and 16-Segment Display

Table 1. MAX6955 Drive Capability

7 SEGMENT 14 SEGMENT/
DISCRETE LEDs
DISPLAY TYPE (16-CHARACTER 16 SEGMENT
(DIRECT CONTROL)
HEXADECIMAL FONT) (104-CHARACTER ASCII FONT MAP)
Monocolor 16 8 128
Bicolor 8 4 64

from the MAX6955, and generates the SCL clock that Acknowledge
synchronizes the data transfer (Figure 2). The acknowledge bit is a clocked 9th bit that the recipi-
The MAX6955 SDA line operates as both an input and ent uses to handshake receipt of each byte of data
an open-drain output. A pullup resistor, typically 4.7kΩ, (Figure 6). Thus, each byte transferred effectively
is required on the SDA. The MAX6955 SCL line oper- requires 9 bits. The master generates the 9th clock
ates only as an input. A pullup resistor, typically 4.7kΩ, pulse, and the recipient pulls down SDA during the
is required on SCL if there are multiple masters on the acknowledge clock pulse, such that the SDA line is sta-
2-wire interface, or if the master in a single-master sys- ble low during the high period of the clock pulse. When
tem has an open-drain SCL output. the master is transmitting to the MAX6955, the
MAX6955 generates the acknowledge bit because the
Each transmission consists of a START condition MAX6955 is the recipient. When the MAX6955 is trans-
(Figure 3) sent by a master, followed by the MAX6955 mitting to the master, the master generates the
7-bit slave address plus R/W bit (Figure 4), a register acknowledge bit because the master is the recipient.
address byte, 1 or more data bytes, and finally a STOP
condition (Figure 3). Slave Address
The MAX6955 has a 7-bit-long slave address (Figure
Start and Stop Conditions 4). The eighth bit following the 7-bit slave address is the
Both SCL and SDA remain high when the interface is R/W bit. It is low for a write command, high for a read
not busy. A master signals the beginning of a transmis- command.
sion with a START (S) condition by transitioning SDA
from high to low while SCL is high. When the master The first 3 bits (MSBs) of the MAX6955 slave address
has finished communicating with the slave, it issues a are always 110. Slave address bits A3, A2, A1, and A0
STOP (P) condition by transitioning the SDA from low to are selected by the address input pins AD1 and AD0.
high while SCL is high. The bus is then free for another These two input pins can be connected to GND, V+,
transmission (Figure 3). SDA, or SCL. The MAX6955 has 16 possible slave
addresses (Table 5) and therefore a maximum of 16
Bit Transfer MAX6955 devices can share the same interface.
One data bit is transferred during each clock pulse.
The data on the SDA line must remain stable while SCL
is high (Figure 5).
_______________________________________________________________________________________ 7
 2-Wire Interfaced, 2.7V to 5.5V LED Display
Driver with I/O Expander and Key Scan
Table 2. Connection Scheme for Eight 16-Segment Digits
MAX6955

DIGIT O0 O1 O2 O3 O4 O5 O6 O7 O8 O9 O10 O11 O12 O13 O14 O15 O16 O17 O18
0 CCO — a1 a2 b c d1 d2 e f g1 g2 h i j k l m dp
1 — CC1 a1 a2 b c d1 d2 e f g1 g2 h i j k l m dp
2 a1 a2 CC2 — b c d1 d2 e f g1 g2 h i j k l m dp
3 a1 a2 — CC3 b c d1 d2 e f g1 g2 h i j k l m dp
4 a1 a2 b c CC4 — d1 d2 e f g1 g2 h i j k l m dp
5 a1 a2 b c — CC5 d1 d2 e f g1 g2 h i j k l m dp
6 a1 a2 b c d1 d2 CC6 — e f g1 g2 h i j k l m dp
7 a1 a2 b c d1 d2 — CC7 e f g1 g2 h i j k l m dp

Table 3. Connection Scheme for Eight 14-Segment Digits

DIGIT O0 O1 O2 O3 O4 O5 O6 O7 O8 O9 O10 O11 O12 O13 O14 O15 O16 O17 O18
0 CCO — a — b c d — e f g1 g2 h i j k l m dp
1 — CC1 a — b c d — e f g1 g2 h i j k l m dp
2 a — CC2 — b c d — e f g1 g2 h i j k l m dp
3 a — — CC3 b c d — e f g1 g2 h i j k l m dp
4 a — b c CC4 — d — e f g1 g2 h i j k l m dp
5 a — b c — CC5 d — e f g1 g2 h i j k l m dp
6 a — b c d — CC6 — e f g1 g2 h i j k l m dp
7 a — b c d — — CC7 e f g1 g2 h i j k l m dp

Table 4. Connection Scheme for Sixteen 7-Segment Digits

DIGIT O0 O1 O2 O3 O4 O5 O6 O7 O8 O9 O10 O11 O12 O13 O14 O15 O16 O17 O18
0, 0a CC0 — 1a — 1b 1c 1d 1dp 1e 1f 1g 2a 2b 2c 2d 2e 2f 2g 2dp
1, 1a — CC1 1a — 1b 1c 1d 1dp 1e 1f 1g 2a 2b 2c 2d 2e 2f 2g 2dp
2, 2a 1a — CC2 — 1b 1c 1d 1dp 1e 1f 1g 2a 2b 2c 2d 2e 2f 2g 2dp
3, 3a 1a — — CC3 1b 1c 1d 1dp 1e 1f 1g 2a 2b 2c 2d 2e 2f 2g 2dp
4, 4a 1a — 1b 1c CC4 — 1d 1dp 1e 1f 1g 2a 2b 2c 2d 2e 2f 2g 2dp
5, 5a 1a — 1b 1c — CC5 1d 1dp 1e 1f 1g 2a 2b 2c 2d 2e 2f 2g 2dp
6, 6a 1a — 1b 1c 1d 1dp CC6 — 1e 1f 1g 2a 2b 2c 2d 2e 2f 2g 2dp
7, 7a 1a — 1b 1c 1d 1dp — CC7 1e 1f 1g 2a 2b 2c 2d 2e 2f 2g 2dp

Message Format for Writing Any bytes received after the command byte are data
A write to the MAX6955 comprises the transmission of bytes. The first data byte goes into the internal register of
the MAX6955’s slave address with the R/W bit set to the MAX6955 selected by the command byte (Figure 8).
zero, followed by at least 1 byte of information. The first If multiple data bytes are transmitted before a STOP
byte of information is the command byte, which deter- condition is detected, these bytes are generally stored
mines which register of the MAX6955 is to be written by in subsequent MAX6955 internal registers because the
the next byte, if received. If a STOP condition is detect- command byte address generally autoincrements
ed after the command byte is received, then the (Table 6) (Figure 9).
MAX6955 takes no further action (Figure 7) beyond
storing the command byte.

8 _______________________________________________________________________________________
 2-Wire Interfaced, 2.7V to 5.5V LED Display
Driver with I/O Expander and Key Scan

MAX6955
SDA

tSU, DAT tSU, STA tBUF

tLOW tHD, STA tSU, STO
tHD, DAT

SCL
tHIGH
tHD, STA

tR tF

START REPEATED START STOP START

CONDITION CONDITION CONDITION CONDITION

Figure 2. 2-Wire Serial Interface Timing Details

SDA

SCL
S P

START CONDITION STOP CONDITION

Figure 3. Start and Stop Conditions

SDA
1 1 0 A3 A2 A1 A0 R/W ACK

START MSB LSB

SCL

Figure 4. Slave Address

_______________________________________________________________________________________ 9
 2-Wire Interfaced, 2.7V to 5.5V LED Display
Driver with I/O Expander and Key Scan
Table 5. MAX6955 Address Map Operation with Multiple Masters
MAX6955

If the MAX6955 is operated on a 2-wire interface with

PIN CONNECTION DEVICE ADDRESS multiple masters, a master reading the MAX6955
AD1 AD0 A6 A5 A4 A3 A2 A1 A0
should use a repeated start between the write, which
sets the MAX6955’s address pointer, and the read(s)
GND GND 1 1 0 0 0 0 0 that takes the data from the location(s). This is because
GND V+ 1 1 0 0 0 0 1 it is possible for master 2 to take over the bus after
GND SDA 1 1 0 0 0 1 0 master 1 has set up the MAX6955’s address pointer but
GND SCL 1 1 0 0 0 1 1 before master 1 has read the data. If master 2 subse-
quently changes the MAX6955’s address pointer, then
V+ GND 1 1 0 0 1 0 0
master 1’s delayed read may be from an unexpected
V+ V+ 1 1 0 0 1 0 1 location.
V+ SDA 1 1 0 0 1 1 0
Command Address Autoincrementing
V+ SCL 1 1 0 0 1 1 1 Address autoincrementing allows the MAX6955 to be
SDA GND 1 1 0 1 0 0 0 configured with the shortest number of transmissions
SDA V+ 1 1 0 1 0 0 1 by minimizing the number of times the command byte
needs to be sent. The command address or the font
SDA SDA 1 1 0 1 0 1 0
pointer address stored in the MAX6955 generally incre-
SDA SCL 1 1 0 1 0 1 1 ments after each data byte is written or read (Table 6).
SCL GND 1 1 0 1 1 0 0
Digit Type Registers
SCL V+ 1 1 0 1 1 0 1
The MAX6955 uses 32 digit registers to store the char-
SCL SDA 1 1 0 1 1 1 0 acters that the user wishes to display. These digit regis-
SCL SCL 1 1 0 1 1 1 1 ters are implemented with two planes, P0 and P1. Each
digit is represented by 2 bytes of memory, 1 byte in
plane P0 and the other in plane P1. The digit registers
Message Format for Reading are mapped so that a digit’s data can be updated in
The MAX6955 is read using the MAX6955’s internally plane P0, plane P1, or both planes at the same time
stored command byte as address pointer, the same (Table 7).
way the stored command byte is used as address
pointer for a write. The pointer generally autoincre- If the blink function is disabled through the Blink Enable
ments after each data byte is read using the same rules Bit E (Table 20) in the configuration register, then the
as for a write (Table 6). Thus, a read is initiated by first digit register data in plane P0 is used to multiplex the
configuring the MAX6955’s command byte by perform- display. The digit register data in P1 is not used. If the
ing a write (Figure 7). The master can now read n con- blink function is enabled, then the digit register data in
secutive bytes from the MAX6955, with the first data both plane P0 and plane P1 are alternately used to mul-
byte being read from the register addressed by the ini- tiplex the display. Blinking is achieved by multiplexing
tialized command byte (Figure 9). When performing the LED display using data plane P0 and plane P1 on
read-after-write verification, reset the command byte’s alternate phases of the blink clock (Table 21).
address because the stored byte address generally is The data in the digit registers does not control the digit
autoincremented after the write (Table 6). segments directly for 14- and 16-segment displays.
Instead, the register data is used to address a charac-
ter generator that stores the data for the 14- and 16-

Table 6. Command Address Autoincrement Rules

COMMAND BYTE
AUTOINCREMENT BEHAVIOR
ADDRESS RANGE
x0000000 to x0001100 Command byte address autoincrements after byte read or written.
x0001101 Factory reserved; do not write this register.
x0001111 to x1111110 Command byte address autoincrements after byte read or written.
x1111111 Command byte address remains at x1111111 after byte read or written.

10 ______________________________________________________________________________________
 2-Wire Interfaced, 2.7V to 5.5V LED Display
Driver with I/O Expander and Key Scan
segment fonts (Tables 8 and 9). The lower 7 bits of the data for any digit is different in the two planes, then that

MAX6955
digit data (D6 to D0) select the character from the font. digit appears to flip between two characters. To make a
The most significant bit of the register data (D7) con- character appear to blink on or off, write the character
trols the DP segment of the digits; it is set to 1 to light to one plane, and use the blank character (0x20) for the
DP, and to zero to leave DP unlit (Table 10). other plane. Once blinking has been configured, it con-
For 7-segment displays, the digit plane data register tinues automatically without further intervention.
can be used to address a character generator, which Blink Speed
contains the data of a 16-character font containing the The blink speed is determined by the frequency of the
hexadecimal font. The decode mode register can be multiplex clock, OSC, and by the setting of the Blink
used to disable the character generator and allow the Rate Selection Bit B (Table 19) in the configuration reg-
segments to be controlled directly. Table 11 shows the ister. The Blink Rate Selection Bit B sets either fast or
one-to-one pairing of each data bit to the appropriate slow blink speed for the whole display.
segment line in the digit plane data registers. The hexa-
decimal font is decoded according to Table 12. Initial Power-Up
The digit-type register configures the display driver for On initial power-up, all control registers are reset, the
various combinations of 14-segment digits, 16-segment display is blanked, intensities are set to minimum, and
digits, and/or pairs, or 7-segment digits. The function of shutdown is enabled (Table 16).
this register is to select the appropriate font for each
Configuration Register
digit and route the output of the font to the appropriate
The configuration register is used to enter and exit shut-
MAX6955 driver output pins. The MAX6955 has four
down, select the blink rate, globally enable and disable
digit drive slots. A slot can be filled with various combi-
the blink function, globally clear the digit data, select
nations of monocolor and bicolor 16-segment displays,
between global or digit-by-digit control of intensity, and
14-segment displays, or two 7-segment displays. Each
reset the blink timing (Tables 17–20 and 22–25).
pair of bits in the register corresponds to one of the four
digit drive slots, as shown in Table 13. Each bit also cor- The configuration register contains 7 bits:
responds to one of the eight common-cathode digit • S bit selects shutdown or normal operation
drive outputs, CC0 to CC7. When using bicolor digits, (read/write).
the anode connections for the two digits within a slot are
• B bit selects the blink rate (read/write).
always the same. This means that a slot correctly drives
two monocolor or one bicolor 14- or 16-segment digit. • E bit globally enables or disables the blink function
The digit type register can be written, but cannot be (read/write).
read. Examples of configuration settings required for • T bit resets the blink timing (data is not stored—tran-
some display digit combinations are shown in Table 14. sient bit).
7-Segment Decode-Mode Register • R bit globally clears the digit data for both planes P0
In 7-segment mode, the hexadecimal font can be dis- and P1 for ALL digits (data is not stored—transient bit).
abled (Table 15). The decode-mode register selects • I bit selects between global or digit-by-digit control
between hexadecimal code or direct control for each of of intensity (read/write).
eight possible pairs of 7-segment digits. Each bit in the • P bit returns the current phase of the blink timing
register corresponds to one pair of digits. The digit (read only—a write to this bit is ignored).
pairs are {digit 0, digit 0a} through {digit 7, digit 7a}.
Disabling decode mode allows direct control of the 16 Character Generator Font Mapping
LEDs of a dual 7-segment display. Direct control mode The font is composed of 104 characters in ROM. The
can also be used to drive a matrix of 128 discrete LEDs. lower 7 bits of the 8-bit digit register represent the char-
A logic high selects hexadecimal decoding, while a acter selection. The most significant bit, shown as x in
logic low bypasses the decoder. When direct control is the ROM map of Tables 8 and 9, is 1 to light the DP
selected, the data bits D7 to D0 correspond to the seg- segment and zero to leave the DP segment unlit.
ment lines of the MAX6955. The character map follows the standard ASCII font for
96 characters in the x0101000 through x1111111
Display Blink Mode range. The first 16 characters of the 16-segment ROM
The display blinking facility, when enabled, makes the map cover 7-segment displays. These 16 characters
driver flip automatically between displaying the digit are numeric 0 to 9 and characters A to F (i.e., the hexa-
register data in planes P0 and P1. If the digit register decimal set).
______________________________________________________________________________________ 11
 2-Wire Interfaced, 2.7V to 5.5V LED Display
Driver with I/O Expander and Key Scan
Multiplex Clock and Blink Timing Intensity Registers
MAX6955

The OSC pin can be fitted with capacitor CSET to GND Digital control of display brightness is provided and
to use the internal RC multiplex oscillator, or driven by can be managed in one of two ways: globally or indi-
an external clock to set the multiplex clock frequency vidually. Global control adjusts all digits together.
and blink rate. The multiplex clock frequency deter- Individual control adjusts the digits separately.
mines the frequency that the complete display is updat- The default method is global brightness control, which
ed. With OSC at 4MHz, each display digit is enabled is selected by clearing the global intensity bit (I data bit
for 200µs. D6) in the configuration register. This brightness setting
The internal RC oscillator uses an external resistor, applies to all display digits. The pulse-width modulator
RSET, and an external capacitor, CSET, to set the oscil- is then set by the lower nibble of the global intensity
lator frequency. The suggested values of RSET (56kΩ) register, address 0x02. The modulator scales the aver-
and C SET (22pF) set the oscillator at 4MHz, which age segment current in 16 steps from a maximum of
makes the blink frequency 0.5Hz or 1Hz. 15/16 down to 1/16 of the peak current. The minimum
The external clock is not required to have a 50:50 duty interdigit blanking time is set to 1/16 of a cycle. When
cycle, but the minimum time between transitions must using bicolor digits, 256 color/brightness combinations
be 50ns or greater and the maximum time between are available.
transitions must be 750ns. Individual brightness control is selected by setting the
The on-chip oscillator may be accurate enough for global intensity bit (I data bit D6) in the configuration
applications using a single device. If an exact blink rate register. The pulse-width modulator is now no longer
is required, use an external clock ranging between set by the lower nibble of the global intensity register,
1MHz and 8MHz to drive OSC. The OSC inputs of multi- address 0x02, and the data is ignored. Individual digi-
ple MAX6955s can be connected to a common external tal control of display brightness is now provided by a
clock to make the devices blink at the same rate. The separate pulse-width modulator setting for each digit.
relative blink phasing of multiple MAX6955s can be syn- Each digit is controlled by a nibble of one of the four
chronized by setting the T bit in the control register for intensity registers: intensity10, intensity32, intensity54,
all the devices in quick succession. If the serial inter- and intensity76 for all display types, plus intensity10a,
faces of multiple MAX6955s are daisy-chained by con- intensity32a, intensity54a, and intensity76a for the extra
necting the DOUT of one device to the DIN of the next, eight digits possible when 7-segment displays are
then synchronization is achieved automatically by used. The data from the relevant register is used for
updating the configuration register for all devices simul- each digit as it is multiplexed. The modulator scales the
taneously. Figure 10 is the multiplex timing diagram. average segment current in 16 steps in exactly the
same way as global intensity adjustment.
OSC_OUT Output Table 27 shows the global intensity register format.
The OSC_OUT output is a buffered copy of either the Table 28 shows individual segment intensity registers.
internal oscillator clock or the clock driven into the OSC Table 29 shows the even individual segment intensity
pin if the external clock has been selected. The feature format. Table 30 shows the odd individual segment
is useful if the internal oscillator is used, and the user intensity format.
wishes to synchronize other MAX6955s to the same
blink frequency. GPIO and Key Scanning
The MAX6955 features five general-purpose input/out-
Scan-Limit Register put (GPIO) ports: P0 to P4. These ports can be individ-
The scan-limit register sets how many 14-segment dig- ually enabled as logic inputs or open-drain logic
its or 16-segment digits or pairs of 7-segment digits are outputs. The GPIO ports are not debounced when con-
displayed, from 1 to 8. A bicolor digit is connected as figured as inputs. The ports can be read and the out-
two monocolor digits. The scan register also limits the puts set using the 2-wire interface.
number of keys that can be scanned.
Some or all of the five ports can be configured to per-
Since the number of scanned digits affects the display form key scanning of up to 32 keys. Ports P0 to P4 are
brightness, the scan-limit register should not be used to renamed Key_A, Key_B, Key_C, Key_D, and IRQ,
blank portions of the display (such as leading-zero sup- respectively, when used for key scanning. The full key-
pression). Table 26 shows the scan-limit register format. scanning configuration is shown in Figure 11. Table 31
is the GPIO data register.

12 ______________________________________________________________________________________
 2-Wire Interfaced, 2.7V to 5.5V LED Display
Driver with I/O Expander and Key Scan
Table 7. Register Address Map

MAX6955
ADDRESS (COMMAND BYTE)
REGISTER HEX CODE
D15 D14 D13 D12 D11 D10 D9 D8
No-Op X 0 0 0 0 0 0 0 0x00
Decode Mode X 0 0 0 0 0 0 1 0x01
Global Intensity X 0 0 0 0 0 1 0 0x02
Scan Limit X 0 0 0 0 0 1 1 0x03
Configuration X 0 0 0 0 1 0 0 0x04
GPIO Data X 0 0 0 0 1 0 1 0x05
Port Configuration X 0 0 0 0 1 1 0 0x06
Display Test X 0 0 0 0 1 1 1 0x07
Write KEY_A Mask
X 0 0 0 1 0 0 0 0x08
Read KEY_A Debounce
Write KEY_B Mask
X 0 0 0 1 0 0 1 0x09
Read KEY_B Debounce
Write KEY_C Mask
X 0 0 0 1 0 1 0 0x0A
Read KEY_C Debounce
Write KEY_D Mask
X 0 0 0 1 0 1 1 0x0B
Read KEY_D Debounce
Write Digit Type
X 0 0 0 1 1 0 0 0x0C
Read KEY_A Pressed
Read KEY_B Pressed* X 0 0 0 1 1 0 1 0x0D
Read KEY_C Pressed* X 0 0 0 1 1 1 0 0x0E
Read KEY_D Pressed* X 0 0 0 1 1 1 1 0x0F
Intensity 10 X 0 0 1 0 0 0 0 0x10
Intensity 32 X 0 0 1 0 0 0 1 0x11
Intensity 54 X 0 0 1 0 0 1 0 0x12
Intensity 76 X 0 0 1 0 0 1 1 0x13
Intensity 10a (7 Segment Only) X 0 0 1 0 1 0 0 0x14
Intensity 32a (7 Segment Only) X 0 0 1 0 1 0 1 0x15
Intensity 54a (7 Segment Only) X 0 0 1 0 1 1 0 0x16
Intensity 76a (7 Segment Only) X 0 0 1 0 1 1 1 0x17
Digit 0 Plane P0 X 0 1 0 0 0 0 0 0x20
Digit 1 Plane P0 X 0 1 0 0 0 0 1 0x21
Digit 2 Plane P0 X 0 1 0 0 0 1 0 0x22
Digit 3 Plane P0 X 0 1 0 0 0 1 1 0x23
Digit 4 Plane P0 X 0 1 0 0 1 0 0 0x24
Digit 5 Plane P0 X 0 1 0 0 1 0 1 0x25
Digit 6 Plane P0 X 0 1 0 0 1 1 0 0x26
Digit 7 Plane P0 X 0 1 0 0 1 1 1 0x27
Digit 0a Plane P0 (7 Segment Only) X 0 1 0 1 0 0 0 0x28
Digit 1a Plane P0 (7 Segment Only) X 0 1 0 1 0 0 1 0x29
Digit 2a Plane P0 (7 Segment Only) X 0 1 0 1 0 1 0 0x2A
Digit 3a Plane P0 (7 Segment Only) X 0 1 0 1 0 1 1 0x2B
*Do NOT write to register.

______________________________________________________________________________________ 13
 2-Wire Interfaced, 2.7V to 5.5V LED Display
Driver with I/O Expander and Key Scan
Table 7. Register Address Map (continued)
MAX6955

ADDRESS (COMMAND BYTE)

REGISTER HEX CODE
D15 D14 D13 D12 D11 D10 D9 D8
Digit 4a Plane P0 (7 Segment Only) X 0 1 0 1 1 0 0 0x2C
Digit 5a Plane P0 (7 Segment Only) X 0 1 0 1 1 0 1 0x2D
Digit 6a Plane P0 (7 Segment Only) X 0 1 0 1 1 1 0 0x2E
Digit 7a Plane P0 (7 Segment Only) X 0 1 0 1 1 1 1 0x2F
Digit 0 Plane P1 X 1 0 0 0 0 0 0 0x40
Digit 1 Plane P1 X 1 0 0 0 0 0 1 0x41
Digit 2 Plane P1 X 1 0 0 0 0 1 0 0x42
Digit 3 Plane P1 X 1 0 0 0 0 1 1 0x43
Digit 4 Plane P1 X 1 0 0 0 1 0 0 0x44
Digit 5 Plane P1 X 1 0 0 0 1 0 1 0x45
Digit 6 Plane P1 X 1 0 0 0 1 1 0 0x46
Digit 7 Plane P1 X 1 0 0 0 1 1 1 0x47
Digit 0a Plane P1 (7 Segment Only) X 1 0 0 1 0 0 0 0x48
Digit 1a Plane P1 (7 Segment Only) X 1 0 0 1 0 0 1 0x49
Digit 2a Plane P1 (7 Segment Only) X 1 0 0 1 0 1 0 0x4A
Digit 3a Plane P1 (7 Segment Only) X 1 0 0 1 0 1 1 0x4B
Digit 4a Plane P1 (7 Segment Only) X 1 0 0 1 1 0 0 0x4C
Digit 5a Plane P1 (7 Segment Only) X 1 0 0 1 1 0 1 0x4D
Digit 6a Plane P1 (7 Segment Only) X 1 0 0 1 1 1 0 0x4E
Digit 7a Plane P1 (7 Segment Only) X 1 0 0 1 1 1 1 0x4F
Write Digit 0 Planes P0 and P1 with Same
X 1 1 0 0 0 0 0 0x60
Data, Reads as 0x00
Write Digit 1 Planes P0 and P1 with Same
X 1 1 0 0 0 0 1 0x61
Data, Reads as 0x00
Write Digit 2 Planes P0 and P1 with Same
X 1 1 0 0 0 1 0 0x62
Data, Reads as 0x00
Write Digit 3 Planes P0 and P1 with Same
X 1 1 0 0 0 1 1 0x63
Data, Reads as 0x00
Write Digit 4 Planes P0 and P1 with Same
X 1 1 0 0 1 0 0 0x64
Data, Reads as 0x00
Write Digit 5 Planes P0 and P1 with Same
X 1 1 0 0 1 0 1 0x65
Data, Reads as 0x00
Write Digit 6 Planes P0 and P1 with Same
X 1 1 0 0 1 1 0 0x66
Data, Reads as 0x00
Write Digit 7 Planes P0 and P1 with Same
X 1 1 0 0 1 1 1 0x67
Data, Reads as 0x00
Write Digit 0a Planes P0 and P1 with Same
X 1 1 0 1 0 0 0 0x68
Data (7 Segment Only), Reads as 0x00
Write Digit 1a Planes P0 and P1 with Same
X 1 1 0 1 0 0 1 0x69
Data (7 Segment Only), Reads as 0x00

14 ______________________________________________________________________________________
 2-Wire Interfaced, 2.7V to 5.5V LED Display
Driver with I/O Expander and Key Scan
Table 7. Register Address Map (continued)

MAX6955
ADDRESS (COMMAND BYTE)
REGISTER HEX CODE
D15 D14 D13 D12 D11 D10 D9 D8
Write Digit 2a Planes P0 and P1 with Same
X 1 1 0 1 0 1 0 0x6A
Data (7 Segment Only), Reads as 0x00
Write Digit 3a Planes P0 and P1 with Same
X 1 1 0 1 0 1 1 0x6B
Data (7 Segment Only), Reads as 0x00
Write Digit 4a Planes P0 and P1 with Same
X 1 1 0 1 1 0 0 0x6C
Data (7 Segment Only), Reads as 0x00
Write Digit 5a Planes P0 and P1 with Same
X 1 1 0 1 1 0 1 0x6D
Data (7 Segment Only), Reads as 0x00
Write Digit 6a Planes P0 and P1 with Same
X 1 1 0 1 1 1 0 0x6E
Data (7 Segment Only), Reads as 0x00
Write Digit 7a Planes P0 and P1 with Same
X 1 1 0 1 1 1 1 0x6F
Data (7 Segment Only), Reads as 0x00

Note: Unused register bits read as zero.

START CONDITION CLOCK PULSE FOR ACKNOWLEDGMENT

SCL
1 2 8 9

SDA
SDA
BY TRANSMITTER

SCL S
DATA LINE STABLE, CHANGE OF DATA SDA
DATA VALID ALLOWED BY RECEIVER

Figure 5. Bit Transfer Figure 6. Acknowledge

One diode is required per key switch. These diodes regardless of the number of keys being scanned, P4 is
can be common-anode dual diodes in SOT23 pack- always configured as IRQ (Table 32).
ages, such as the BAW56. Sixteen diodes would be The key-scanning circuit utilizes the LEDs’ common-
required for the maximum 32-key configuration. cathode driver outputs as the key-scan drivers. O0 to
The MAX6955 can only scan the maximum 32 keys if O7 go low for nominally 200µs (with OSC = 4MHz) in
the scan-limit register is set to scan the maximum eight turn as the displays are multiplexed. By varying the
digits. If the MAX6955 is driving fewer digits, then a oscillator frequency, the debounce time changes,
maximum of (4 x n) switches can be scanned, where n though key scanning still functions. Key_x inputs have
is the number of digits set in the scan-limit register. For internal pullup resistors that allow the key condition to
example, if the MAX6955 is driving four 14-segment be tested. The Key_x input is low during the appropri-
digits, cathode drivers O0 to O3 are used. Only 16 keys ate digit multiplex period when the key is pressed. The
can be scanned in this configuration; the switches timing diagram of Figure 12 shows the normal situation
shown connected to O4 through O7 are not read. where all eight LED cathode drivers are used.
If the user wishes to scan fewer than 32 keys, then
fewer scan lines can be configured for key scanning.
The unused Key_x ports are released back to their orig-
inal GPIO functionality. If key scanning is enabled,

______________________________________________________________________________________ 15
 2-Wire Interfaced, 2.7V to 5.5V LED Display
Driver with I/O Expander and Key Scan
MAX6955

COMMAND BYTE IS STORED ON RECEIPT OF STOP CONDITION D15 D14 D13 D12 D11 D10 D9 D8

ACKNOWLEDGE FROM MAX6955

S SLAVE ADDRESS 0 A COMMAND BYTE A P

R/W ACKNOWLEDGE FROM MAX6955

Figure 7. Command Byte Received

ACKNOWLEDGE FROM MAX6955 ACKNOWLEDGE FROM MAX6955

HOW CONTROL BYTE AND DATA BYTE MAP INTO D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
MAX6955's REGISTERS

ACKNOWLEDGE FROM MAX6955

S SLAVE ADDRESS 0 A COMMAND BYTE A DATA BYTE A P

R/W 1 BYTE

AUTOINCREMENT MEMORY WORD ADDRESS

Figure 8. Command and Single Data Byte Received

ACKNOWLEDGE FROM MAX6955 ACKNOWLEDGE FROM MAX6955

HOW CONTROL BYTE AND DATA BYTE MAP INTO D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
MAX6955's REGISTERS

ACKNOWLEDGE FROM MAX6955

S SLAVE ADDRESS 0 A COMMAND BYTE A DATA BYTE A P

R/W n BYTE

AUTOINCREMENT MEMORY WORD ADDRESS

Figure 9. n Data Bytes Received

The timing in Figure 12 loops over time, with 32 keys Key Mask Registers
experiencing a full key-scanning debounce over typi- The Key_A Mask, Key_B Mask, Key_C Mask, and
cally 25.6ms. Four keys are sampled every 1.6ms, or Key_D Mask write-only registers (Table 34) configure
every multiplex cycle. If at least one key that was not the key-scanning circuit to cause an interrupt only when
previously pressed is found to have been pressed dur- selected (masked) keys have been debounced. Each
ing both sampling periods, then that key press is bit in the register corresponds to one key switch. The bit
debounced, and an interrupt is issued. The key-scan is clear to disable interrupt for the switch, and set to
circuit detects any combination of keys being pressed enable interrupt. Keys are always scanned (if enabled
during each debounce cycle (n-key rollover). through the port configuration register), regardless of
the setting of these interrupt bits, and the key status is
Port Configuration Register stored in the appropriate Key_x pressed register.
The port configuration register selects how the five port
pins are used. The port configuration register format is
described in Table 33.

16 ______________________________________________________________________________________
 2-Wire Interfaced, 2.7V to 5.5V LED Display
Driver with I/O Expander and Key Scan

MAX6955
ONE COMPLETE 1.6ms MULTIPLEX CYCLE AROUND 8 DIGITS START OF
NEXT CYCLE
200µs

DIGIT 0 DIGIT 1 DIGIT 2 DIGIT 3 DIGIT 4 DIGIT 5 DIGIT 6 DIGIT 7

DIGIT 0 CATHODE
DRIVER INTENSITY
SETTINGS
DIGIT 0's 200µs MULTIPLEX TIMESLOT
1/16TH HIGH-Z
(MIN ON)

2/16TH HIGH-Z

LOW

3/16TH HIGH-Z

LOW

4/16TH HIGH-Z

LOW

5/16TH HIGH-Z

LOW

6/16TH HIGH-Z

LOW

7/16TH HIGH-Z

LOW

8/16TH HIGH-Z

LOW

9/16TH HIGH-Z

LOW

10/16TH HIGH-Z

LOW

11/16TH HIGH-Z

LOW

12/16TH HIGH-Z

LOW

13/16TH HIGH-Z

LOW

14/16TH HIGH-Z

LOW

15/16TH HIGH-Z

LOW

15/16TH HIGH-Z
(MAX ON)
LOW

ANODE (LIT) CURRENT SOURCE ENABLED MINIMUM 12.5µs INTERDIGIT BLANKING INTERVAL

HIGH-Z HIGH-Z

ANODE (UNLIT)
HIGH-Z

Figure 10. Multiplex Timing Diagram (OSC = 4MHz)

______________________________________________________________________________________ 17
 2-Wire Interfaced, 2.7V to 5.5V LED Display
Driver with I/O Expander and Key Scan
MAX6955

LED OUTPUT O0
SW A0 SW B0 SW C0 SW D0

LED OUTPUT O1
SW A1 SW B1 SW C1 SW D1

LED OUTPUT O2
SW A2 SW B2 SW C2 SW D2

LED OUTPUT O3
SW A3 SW B3 SW C3 SW D3

LED OUTPUT O4
SW A4 SW B4 SW C4 SW D4

LED OUTPUT O5
SW A5 SW B5 SW C5 SW D5

LED OUTPUT O6
SW A6 SW B6 SW C6 SW D6

LED OUTPUT O7
VCC SW A7 SW B7 SW C7 SW D7

KEY_A

KEY_B

KEY_C

KEY_D

IRQ MICROCONTROLLER INTERRUPT

Figure 11. Key-Scanning Configuration

THE FIRST HALF OF A 25.6ms KEY-SCAN CYCLE THE SECOND HALF OF A 25.6ms KEY-SCAN CYCLE
1.6ms MULTIPLEX CYCLE 1 1.6ms MULTIPLEX CYCLE 2 1.6ms MULTIPLEX CYCLE 8 1.6ms MULTIPLEX CYCLE 1 1.6ms MULTIPLEX CYCLE 8

12.5µs TO 187.5µs DIGIT PERIOD

LED OUTPUT O0

LED OUTPUT O1

LED OUTPUT O2

LED OUTPUT O3
LED OUTPUT O4

LED OUTPUT O5

LED OUTPUT O6

LED OUTPUT O7

A B C D E

A
FIRST TEST OF KEY SWITCHES SECOND TEST OF KEY SWITCHES INTERRUPT ASSERTED IF REQUIRED
DEBOUNCE REGISTER UPDATED
START OF NEXT KEY-SCAN CYCLE

Figure 12. Key-Scan Timing Diagram

18 ______________________________________________________________________________________
 2-Wire Interfaced, 2.7V to 5.5V LED Display
Driver with I/O Expander and Key Scan
Key Debounced Registers Selecting External Components RSET and

MAX6955
The Key_A debounced, Key_B debounced, Key_C CSET to Set Oscillator Frequency and
debounced, and Key_D debounced read-only registers Peak Segment Current
(Table 35) show which keys have been detected as The RC oscillator uses an external resistor, RSET, and
debounced by the key-scanning circuit. an external capacitor, CSET, to set the frequency, fOSC.
Each bit in the register corresponds to one key switch. The allowed range of fOSC is 1MHz to 8MHz. RSET also
The bit is set if the switch has been correctly sets the peak segment current. The recommended val-
debounced since the register was read last. Reading a ues of RSET and CSET set the oscillator to 4MHz, which
debounced register clears that register (after the data makes the blink frequencies selectable between 0.5Hz
has been read) so that future keys pressed can be and 1Hz. The recommended value of RSET also sets the
identified. If the debounced registers are not read, the peak current to 40mA, which makes the segment cur-
key-scan data accumulates. However, as there is no rent adjustable from 2.5mA to 37.5mA in 2.5mA steps.
FIFO in the MAX6955, the user is not able to determine ISEG = KL / RSET mA
key order, or whether a key has been pressed more
fOSC = KF / (RSET x CSET) MHz
than once, unless the debounced key status registers
are read after each interrupt, and before the next key- where:
scan cycle. KL = 2240
Reading any of the four debounced registers clears the KF = 5376
IRQ output. If a key is pressed and held down, the key is
RSET = external resistor in kΩ
reported as debounced (and IRQ issued) only once. The
key must be detected as released by the key-scanning CSET = external capacitor in pF
circuit, before it debounces again. If the debounced reg- CSTRAY = stray capacitance from OSC pin to GND in
isters are being read in response to the IRQ being pF, typically 2pF
asserted, then the user should generally read all four
The recommended value of RSET is 56kΩ and the rec-
registers to ensure that all the keys that were detected by
ommended value of CSET is 22pF.
the key-scanning circuit are discovered.
The recommended value of R SET is the minimum
Key Pressed Registers allowed value, since it sets the display driver to the
The Key_A pressed, Key_B pressed, Key_C pressed, maximum allowed peak segment current. RSET can be
and Key_D pressed read-only registers (Table 36) set to a higher value to set the segment current to a
show which keys have been detected as pressed by lower peak value where desired. The user must also
the key-scanning circuit during the last test. ensure that the peak current specifications of the LEDs
Each bit in the register corresponds to one key switch. connected to the driver are not exceeded.
The bit is set if the switch has been detected as The effective value of CSET includes not only the actual
pressed by the key-scanning circuit during the last test. external capacitor used, but also the stray capacitance
The bit is cleared if the switch has not been detected from OSC to GND. This capacitance is usually in the
as pressed by the key-scanning circuit during the last 1pF to 5pF range, depending on the layout used.
test. Reading a pressed register does not clear that
register or clear the IRQ output. Applications Information
Display Test Register Driving Bicolor LEDs
The display test register (Table 37) operates in two Bicolor digits group a red and a green die together for
modes: normal and display test. Display test mode each display element, so that the element can be lit red
turns all LEDs on (including DPs) by overriding, but not or green (or orange), depending on which die (or both)
altering, all controls and digit registers (including the is lit. The MAX6955 allows each segment’s current to
shutdown register), except for the digit-type register be set individually from the 1/16th (minimum current
and the GPIO configuration register. The duty cycle, and LED intensity) to 15/16th (maximum current and
while in display test mode, is 7/16 (see the Choosing LED intensity), as well as off (zero current). Thus, a
Supply Voltage to Minimize Power Dissipation section). bicolor (red-green) segment pair can be set to 256
color/intensity combinations.

______________________________________________________________________________________ 19
 2-Wire Interfaced, 2.7V to 5.5V LED Display
Driver with I/O Expander and Key Scan
Choosing Supply Voltage to Minimize age, the driver output stages can brown out, and be
MAX6955

Power Dissipation unable to regulate the current correctly. As the supply

The MAX6955 drives a peak current of 40mA into LEDs voltage drops further, the LED segment drive current
with a 2.2V forward-voltage drop when operated from a becomes effectively limited by the output driver's on-
supply voltage of at least 3.0V. The minimum voltage resistance, and the LED drive current drops. The char-
drop across the internal LED drivers is therefore (3.0V - acteristics of each individual LED in a display digit are
2.2V) = 0.8V. If a higher supply voltage is used, the dri- well matched, so the result is that the display intensity
ver absorbs a higher voltage, and the driver’s power dims uniformly as supply voltage drops out of regula-
dissipation increases accordingly. However, if the LEDs tion and beyond.
used have a higher forward-voltage drop than 2.2V, the
supply voltage must be raised accordingly to ensure Computing Power Dissipation
that the driver always has at least 0.6V of headroom. The upper limit for power dissipation (P D ) for the
MAX6955 is determined from the following equation:
The voltage drop across the drivers with a nominal 5V
supply (5.0V - 2.2V) = 2.8V is nearly 3 times the drop PD = (V+ x 35mA) + (V+ - VLED) (DUTY x ISEG x N)
across the drivers with a nominal 3.3V supply (3.3V - where:
2.2V) = 1.1V. In most systems, consumption is an V+ = supply voltage
important design criterion, and the MAX6955 should be
operated from the system’s 3.3V nominal supply. In DUTY = duty cycle set by intensity register
other designs, the lowest supply voltage may be 5V. N = number of segments driven (worst case is 17)
The issue now is to ensure the dissipation limit for the VLED = LED forward voltage at ISEG
MAX6955 is not exceeded. This can be achieved by
inserting a series resistor in the supply to the MAX6955, ISEG = segment current set by RSET
ensuring that the supply decoupling capacitors are still PD = Power dissipation, in mW if currents are in mA
on the MAX6955 side of the resistor. For example, con- Dissipation example:
sider the requirement that the minimum supply voltage
to a MAX6955 must be 3.0V, and the input supply ISEG = 30mA, N = 17, DUTY = 15/16,
range is 5V ±5%. Maximum supply current is 35mA + VLED = 2.4V at 30mA, V+ = 3.6V
(40mA x 17) = 715mA. Minimum input supply voltage is PD = 3.6V (35mA) + (3.6V - 2.4V)(15/16 x
4.75V. Maximum series resistor value is (4.75V - 30mA x 17) = 0.700W
3.0V)/0.715A = 2.44Ω. We choose 2.2Ω ±5%. Worst- Thus, for a 36-pin SSOP package (TJA = 1 / 0.0118 =
case resistor dissipation is at maximum toleranced +85°C/W from Operating Ratings), the maximum
resistance, i.e., (0.715A) 2 x (2.2Ω x 1.05) = 1.18W. The allowed ambient temperature TA is given by:
maximum MAX6955 supply voltage is at maximum
input supply voltage and minimum toleranced resis- TJ(MAX) = TA + (PD x TJA) = +150°C
tance, i.e., 5.25V - (0.715A x 2.2Ω x 0.95) = 3.76V. = TA + (0.700 x +85°C/W)
So TA = +90.5°C. Thus, the part can be operated safely
Low-Voltage Operation at a maximum package temperature of +85°C.
The MAX6955 works over the 2.7V to 5.5V supply
range. The minimum useful supply voltage is deter- Power Supplies
mined by the forward-voltage drop of the LEDs at the The MAX6955 operates from a single 2.7V to 5.5V
peak current ISEG, plus the 0.8V headroom required by power supply. Bypass the power supply to GND with a
the driver output stages. The MAX6955 correctly regu- 0.1µF capacitor as close to the device as possible. Add
lates ISEG with a supply voltage above this minimum a 47µF capacitor if the MAX6955 is not close to the
voltage. If the supply drops below this minimum volt- board’s input bulk decoupling capacitor.

20 ______________________________________________________________________________________
 2-Wire Interfaced, 2.7V to 5.5V LED Display
Driver with I/O Expander and Key Scan
Table 8. 16-Segment Display Font Map Table 9. 14-Segment Display Font Map

MAX6955
MSB MSB
x000 x001 x010 x011 x100 x101 x110 x111 x000 x001 x010 x011 x100 x101 x110 x111
LSB LSB

0000 0000

0001 0001

0010 0010

0011 0011

0100 0100

0101 0101

0110 0110

0111 0111

1000 1000

1001 1001

1010 1010

1011 1011

1100 1100

1101 1101

1110 1110

1111 1111

______________________________________________________________________________________ 21
 2-Wire Interfaced, 2.7V to 5.5V LED Display
Driver with I/O Expander and Key Scan
Table 10. Digit Plane Data Register Format
MAX6955

ADDRESS REGISTER DATA

MODE CODE
(HEX) D7 D6 D5 D4 D3 D2 D1 D0

0x20 to 0x2F
14-segment or 16-segment mode, writing digit data
0x40 to 0x4F 0 Bits D6 to D0 select font characters 0 to 127
to use font map data with decimal place unlit
0x60 to 0x6F

0x20 to 0x2F
14-segment or 16-segment mode, writing digit data
0x40 to 0x4F 1 Bits D6 to D0 select font characters 0 to 127
to use font map data with decimal place lit
0x60 to 0x6F

0x20 to 0x2F
7-segment decode mode, DP unlit 0x40 to 0x4F 0 0 0 0 D3 to D0
0x60 to 0x6F

0x20 to 0x2F
7-segment decode mode, DP lit 0x40 to 0x4F 1 0 0 0 D3 to D0
0x60 to 0x6F

0x20 to 0x2F
7-segment no-decode mode 0x40 to 0x4F Direct control of 8 segments
0x60 to 0x6F

Table 11. Segment Decoding for 7-Segment Displays

ADDRESS CODE REGISTER DATA
MODE
(HEX) D7 D6 D5 D4 D3 D2 D1 D0

0x20 to 0x2F
Segment Line 0x40 to 0x4F dp a b c d e f g
0x60 to 0x6F

22 ______________________________________________________________________________________
 2-Wire Interfaced, 2.7V to 5.5V LED Display
Driver with I/O Expander and Key Scan
Table 12. 7-Segment Segment Mapping Decoder for Hexadecimal Font

MAX6955
REGISTER
ON SEGMENTS = 1
7-SEGMENT DATA
CHARACTER D6, D5,
D7* D3 D2 D1 D0 DP* A B C D E F G
D4
0 — X 0 0 0 0 — 1 1 1 1 1 1 0
1 — X 0 0 0 1 — 0 1 1 0 0 0 0
2 — X 0 0 1 0 — 1 1 0 1 1 0 1
3 — X 0 0 1 1 — 1 1 1 1 0 0 1
4 — X 0 1 0 0 — 0 1 1 0 0 1 1
5 — X 0 1 0 1 — 1 0 1 1 0 1 1
6 — X 0 1 1 0 — 1 0 1 1 1 1 1
7 — X 0 1 1 1 — 1 1 1 0 0 0 0
8 — X 1 0 0 0 — 1 1 1 1 1 1 1
9 — X 1 0 0 1 — 1 1 1 1 0 1 1
A — X 1 0 1 0 — 1 1 1 0 1 1 1
B — X 1 0 1 1 — 0 0 1 1 1 1 1
C — X 1 1 0 0 — 1 0 0 1 1 1 0
D — X 1 1 0 1 — 0 1 1 1 1 0 1
E — X 1 1 1 0 — 1 0 0 1 1 1 1
F — X 1 1 1 1 — 1 0 0 0 1 1 1
*The decimal point is set by bit D7 = 1.

Table 13. Digit-Type Register

DIGIT-TYPE ADDRESS REGISTER DATA
REGISTER CODE (HEX)
D7 D6 D5 D4 D3 D2 D1 D0
Output Drive Line CC7 CC6 CC5 CC4 CC3 CC2 CC1 CC0
0x0C
Slot Identification Slot 4 Slot 3 Slot 2 Slot 1

______________________________________________________________________________________ 23
 2-Wire Interfaced, 2.7V to 5.5V LED Display
Driver with I/O Expander and Key Scan
Table 14. Example Configurations for Display Digit Combinations
MAX6955

DIGIT-TYPE ADDRESS REGISTER DATA

REGISTER SETTING CODE (HEX) D7 D6 D5 D4 D3 D2 D1 D0
Digits 7 to 0 are 16-segment or 7-
0x0C 0 0 0 0 0 0 0 0
segment digits.

Digit 0 is a 14-segment digit,

digits 7 to 1 are 16-segment or 7- 0x0C 0 0 0 0 0 0 0 1
segment digits.

Digits 2 to 0 are 14-segment

digits, digits 7 to 3 are 16- 0x0C 0 0 0 0 0 1 1 1
segment or 7-segment digits.

Digits 7 to 0 are 14-segment

0x0C 1 1 1 1 1 1 1 1
digits.

Table 15. Decode-Mode Register Examples

ADDRESS REGISTER DATA
DECODE HEX
CODE
MODE CODE
(HEX) D7 D6 D5 D4 D3 D2 D1 D0
No decode for digit pairs 7 to 0. 0x01 0 0 0 0 0 0 0 0 0x00
Hexadecimal decode for digit pair 0,
0x01 0 0 0 0 0 0 0 1 0x01
no decode for digit pairs 7 to 1.
Hexadecimal decode for digit pairs 2 to 0,
0x01 0 0 0 0 0 1 1 1 0x07
no decode for digit pairs 7 to 3.
Hexadecimal decode for digit pairs 7 to 0. 0x01 1 1 1 1 1 1 1 1 0xFF

24 ______________________________________________________________________________________
 2-Wire Interfaced, 2.7V to 5.5V LED Display
Driver with I/O Expander and Key Scan
Table 16. Initial Power-Up Register Status

MAX6955
ADDRESS REGISTER DATA
POWER-UP
REGISTER CODE
CONDITION D7 D6 D5 D4 D3 D2 D1 D0
(HEX)
Decode Mode Decode mode enabled 0x01 1 1 1 1 1 1 1 1
Global Intensity 1/16 (min on) 0x02 X X X X 0 0 0 0
Scan Limit Display 8 digits: 0, 1, 2, 3, 4, 5, 6, 7 0x03 X X X X X 1 1 1
Shutdown enabled, blink speed is
Control Register 0x04 0 0 X X 0 0 0 0
slow, blink disabled
GPIO Data Outputs are low 0x05 X X X 0 0 0 0 0
No key scanning, P0 to P4 are all
Port Configuration 0x06 0 0 0 1 1 1 1 1
inputs
Display Test Normal operation 0x07 X X X X X X X 0
Key_A Mask None of the keys cause interrupt 0x08 0 0 0 0 0 0 0 0
Key_B Mask None of the keys cause interrupt 0x09 0 0 0 0 0 0 0 0
Key_C Mask None of the keys cause interrupt 0x0A 0 0 0 0 0 0 0 0
Key_D Mask None of the keys cause interrupt 0x0B 0 0 0 0 0 0 0 0
Digit Type All are 16 segment or 7 segment 0x0C 0 0 0 0 0 0 0 0
Intensity10 1/16 (min on) 0x10 0 0 0 0 0 0 0 0
Intensity32 1/16 (min on) 0x11 0 0 0 0 0 0 0 0
Intensity54 1/16 (min on) 0x12 0 0 0 0 0 0 0 0
Intensity76 1/16 (min on) 0x13 0 0 0 0 0 0 0 0
Intensity10a 1/16 (min on) 0x14 0 0 0 0 0 0 0 0
Intensity32a 1/16 (min on) 0x15 0 0 0 0 0 0 0 0
Intensity54a 1/16 (min on) 0x16 0 0 0 0 0 0 0 0
Intensity76a 1/16 (min on) 0x17 0 0 0 0 0 0 0 0
Digit 0 Blank digit, both planes 0x60 0 0 1 0 0 0 0 0
Digit 1 Blank digit, both planes 0x61 0 0 1 0 0 0 0 0
Digit 2 Blank digit, both planes 0x62 0 0 1 0 0 0 0 0
Digit 3 Blank digit, both planes 0x63 0 0 1 0 0 0 0 0
Digit 4 Blank digit, both planes 0x64 0 0 1 0 0 0 0 0
Digit 5 Blank digit, both planes 0x65 0 0 1 0 0 0 0 0
Digit 6 Blank digit, both planes 0x66 0 0 1 0 0 0 0 0
Digit 7 Blank digit, both planes 0x67 0 0 1 0 0 0 0 0
Digit 0a Blank digit, both planes 0x68 0 0 0 0 0 0 0 0
Digit 1a Blank digit, both planes 0x69 0 0 0 0 0 0 0 0
Digit 2a Blank digit, both planes 0x6A 0 0 0 0 0 0 0 0
Digit 3a Blank digit, both planes 0x6B 0 0 0 0 0 0 0 0
Digit 4a Blank digit, both planes 0x6C 0 0 0 0 0 0 0 0
Digit 5a Blank digit, both planes 0x6D 0 0 0 0 0 0 0 0
Digit 6a Blank digit, both planes 0x6E 0 0 0 0 0 0 0 0
Digit 7a Blank digit, both planes 0x6F 0 0 0 0 0 0 0 0
Key_A Debounced No key presses have been detected 0x08 0 0 0 0 0 0 0 0
Key_B Debounced No key presses have been detected 0x09 0 0 0 0 0 0 0 0
Key_C Debounced No key presses have been detected 0x0A 0 0 0 0 0 0 0 0
Key_D Debounced No key presses have been detected 0x0B 0 0 0 0 0 0 0 0
Key_A Pressed Keys are not pressed 0x0C 0 0 0 0 0 0 0 0
Key_B Pressed Keys are not pressed 0x0D 0 0 0 0 0 0 0 0
Key_C Pressed Keys are not pressed 0x0E 0 0 0 0 0 0 0 0
Key_D Pressed Keys are not pressed 0x0F 0 0 0 0 0 0 0 0

______________________________________________________________________________________ 25
 2-Wire Interfaced, 2.7V to 5.5V LED Display
Driver with I/O Expander and Key Scan
Table 17. Configuration Register Format Table 18. Shutdown Control (S Data Bit DO)
MAX6955

REGISTER DATA Format

MODE
D7 D6 D5 D4 D3 D2 D1 D0 REGISTER DATA
MODE
Configuration D7 D6 D5 D4 D3 D2 D1 D0
P I R T E B X S
Register Shutdown P I R T E B X 0
Normal
P I R T E B X 1
Operation

Table 19. Blink Rate Selection (B Data Bit D2) Format

REGISTER DATA
MODE
D7 D6 D5 D4 D3 D2 D1 D0
Slow blinking. Segments blink on for 1s, off for 1s with fOSC = 4MHz. P I R T E 0 X S
Fast blinking. Segments blink on for 0.5s, off for 0.5s with fOSC = 4MHz. P I R T E 1 X S

Table 20. Global Blink Enable/Disable (E Data Bit D3) Format

REGISTER DATA
MODE
D7 D6 D5 D4 D3 D2 D1 D0
Blink function is disabled. P I R T 0 B X S
Blink function is enabled. P I R T 1 B X S

Table 21. Digit Register Mapping with Blink Globally Enabled

SEGMENT’S BIT SETTING SEGMENT’S BIT SETTING SEGMENT
IN PLANE P1 IN PLANE P0 BEHAVIOR
0 0 Segment off.
Segment on only during the 1st half of each
0 1
blink period.
Segment on only during the 2nd half of each
1 0
blink period.
1 1 Segment on.

Table 22. Global Blink Timing Synchronization (T Data Bit D4) Format
REGISTER DATA
MODE
D7 D6 D5 D4 D3 D2 D1 D0
Blink timing counters are unaffected. P I R 0 E B X S
Blink timing counters are reset during the I2C acknowledge. P I R 1 E B X S

Table 23. Global Clear Digit Data (R Data Bit D5) Format
REGISTER DATA
MODE
D7 D6 D5 D4 D3 D2 D1 D0
Digit data for both planes P0 and P1 are unaffected. P I 0 T E B X S
Digit data for both planes P0 and P1 are cleared during the I2C acknowledge. P I 1 T E B X S

26 ______________________________________________________________________________________
 2-Wire Interfaced, 2.7V to 5.5V LED Display
Driver with I/O Expander and Key Scan
Table 24. Global Intensity (I Data Bit D6) Format

MAX6955
REGISTER DATA
MODE
D7 D6 D5 D4 D3 D2 D1 D0
Intensity for all digits is controlled by one setting in the global intensity register. P 0 R T E B X S
Intensity for digits is controlled by the individual settings in the intensity10 and
P 1 R T E B X S
intensity76 registers.

Table 25. Blink Phase Readback (P Data Bit D7) Format

REGISTER DATA
MODE
D7 D6 D5 D4 D3 D2 D1 D0
P1 Blink Phase 0 I R T E B X S
P0 Blink Phase 1 I R T E B X S

Table 26. Scan-Limit Register Format

SCAN ADDRESS CODE REGISTER DATA HEX
LIMIT (HEX) D7 D6 D5 D4 D3 D2 D1 D0 CODE
Display Digit 0 only 0x03 X X X X X 0 0 0 0x00
Display Digits 0 and 1 0x03 X X X X X 0 0 1 0x01
Display Digits 0 1 2 0x03 X X X X X 0 1 0 0x02
Display Digits 0 1 2 3 0x03 X X X X X 0 1 1 0x03
Display Digits 0 1 2 3 4 0x03 X X X X X 1 0 0 0x04
Display Digits 0 1 2 3 4 5 0x03 X X X X X 1 0 1 0x05
Display Digits 0 1 2 3 4 5 6 0x03 X X X X X 1 1 0 0x06
Display Digits 0 1 2 3 4 5 6 7 0x03 X X X X X 1 1 1 0x07
Table 27. Global Intensity Register Format
TYPICAL REGISTER DATA
DUTY ADDRESS HEX
SEGMENT
CYCLE CODE (HEX) CODE
CURRENT (mA) D7 D6 D5 D4 D3 D2 D1 D0
1/16 (min on) 2.5 0x02 X X X X 0 0 0 0 0xX0
2/16 5 0x02 X X X X 0 0 0 1 0xX1
3/16 7.5 0x02 X X X X 0 0 1 0 0xX2
4/16 10 0x02 X X X X 0 0 1 1 0xX3
5/16 12.5 0x02 X X X X 0 1 0 0 0xX4
6/16 15 0x02 X X X X 0 1 0 1 0xX5
7/16 17.5 0x02 X X X X 0 1 1 0 0xX6
8/16 20 0x02 X X X X 0 1 1 1 0xX7
9/16 22.5 0x02 X X X X 1 0 0 0 0xX8
10/16 25 0x02 X X X X 1 0 0 1 0xX9
11/16 27.5 0x02 X X X X 1 0 1 0 0xXA
12/16 30 0x02 X X X X 1 0 1 1 0xXB
13/16 32.5 0x02 X X X X 1 1 0 0 0xXC
14/16 35 0x02 X X X X 1 1 0 1 0xXD
15/16 37.5 0x02 X X X X 1 1 1 0 0xXE
15/16 (max on) 37.5 0x02 X X X X 1 1 1 1 0xXF

______________________________________________________________________________________ 27
 2-Wire Interfaced, 2.7V to 5.5V LED Display
Driver with I/O Expander and Key Scan
Table 28. Individual Segment Intensity Registers
MAX6955

REGISTER ADDRESS REGISTER DATA

FUNCTION CODE (HEX) D7 D6 D5 D4 D3 D2 D1 D0
Intensity10 Register 0x10 Digit 1 Digit 0
Intensity32 Register 0x11 Digit 3 Digit 2
Intensity54 Register 0x12 Digit 5 Digit 4
Intensity76 Register 0x13 Digit 7 Digit 6
Intensity10a Register 0x14 Digit 1a (7 segment only) Digit 0a (7 segment only)
Intensity32a Register 0x15 Digit 3a (7 segment only) Digit 2a (7 segment only)
Intensity54a Register 0x16 Digit 5a (7 segment only) Digit 4a (7 segment only)
Intensity76a Register 0x17 Digit 7a (7 segment only) Digit 6a (7 segment only)

Table 29. Even Individual Segment Intensity Format

TYPICAL ADDRESS REGISTER DATA
DUTY HEX
SEGMENT CODE
CYCLE CODE
CURRENT (mA) (HEX) D7 D6 D5 D4 D3 D2 D1 D0

1/16 (min on) 2.5 0x10 to 0x17 0 0 0 0 0xX0

2/16 5 0x10 to 0x17 0 0 0 1 0xX1
3/16 7.5 0x10 to 0x17 0 0 1 0 0xX2
4/16 10 0x10 to 0x17 0 0 1 1 0xX3
5/16 12.5 0x10 to 0x17 0 1 0 0 0xX4
6/16 15 0x10 to 0x17 0 1 0 1 0xX5
7/16 17.5 0x10 to 0x17 0 1 1 0 0xX6
8/16 20 0x10 to 0x17 0 1 1 1 0xX7
See Table 30.
9/16 22.5 0x10 to 0x17 1 0 0 0 0xX8
10/16 25 0x10 to 0x17 1 0 0 1 0xX9
11/16 27.5 0x10 to 0x17 1 0 1 0 0xXA
12/16 30 0x10 to 0x17 1 0 1 1 0xXB
13/16 32.5 0x10 to 0x17 1 1 0 0 0xXC
14/16 35 0x10 to 0x17 1 1 0 1 0xXD
15/16 37.5 0x10 to 0x17 1 1 1 0 0xXE
15/16 (max on) 37.5 0x10 to 0x17 1 1 1 1 0xXF

28 ______________________________________________________________________________________
 2-Wire Interfaced, 2.7V to 5.5V LED Display
Driver with I/O Expander and Key Scan
Table 30. Odd Individual Segment Intensity Format

MAX6955
TYPICAL ADDRESS REGISTER DATA
DUTY HEX
SEGMENT CODE
CYCLE CODE
CURRENT (mA) (HEX) D7 D6 D5 D4 D3 D2 D1 D0
1/16 (min on) 2.5 0x10 to 0x17 0 0 0 0 0x0X
2/16 5 0x10 to 0x17 0 0 0 1 0x1X
3/16 7.5 0x10 to 0x17 0 0 1 0 0x2X
4/16 10 0x10 to 0x17 0 0 1 1 0x3X
5/16 12.5 0x10 to 0x17 0 1 0 0 0x4X
6/16 15 0x10 to 0x17 0 1 0 1 0x5X
7/16 17.5 0x10 to 0x17 0 1 1 0 0x6X
8/16 20 0x10 to 0x17 0 1 1 1 0x7X
See Table 29.
9/16 22.5 0x10 to 0x17 1 0 0 0 0x8X
10/16 25 0x10 to 0x17 1 0 0 1 0x9X
11/16 27.5 0x10 to 0x17 1 0 1 0 0xAX
12/16 30 0x10 to 0x17 1 0 1 1 0xBX
13/16 32.5 0x10 to 0x17 1 1 0 0 0xCX
14/16 35 0x10 to 0x17 1 1 0 1 0xDX
15/16 37.5 0x10 to 0x17 1 1 1 0 0xEX
15/16 (max on) 37.5 0x10 to 0x17 1 1 1 1 0xFX

Table 31. GPIO Data Register

ADDRESS REGISTER DATA
MODE
CODE (HEX) D7 D6 D5 D4 D3 D2 D1 D0
Write GPIO Data 0x05 X X X P4 P3 P2 P1 P0
Read GPIO Data 0x05 0 0 0 P4 or IRQ status P3 P2 P1 P0

Table 32. Port Scanning Function Allocation

KEYS PORTS
P0 P1 P2 P3 P4
SCANNED AVAILABLE
None 5 pins GPIO GPIO GPIO GPIO GPIO
1 to 8 3 pins Key_A GPIO GPIO GPIO IRQ
9 to 16 2 pins Key_A Key_B GPIO GPIO IRQ
17 to 24 1 pin Key_A Key_B Key_C GPIO IRQ
25 to 36 None Key_A Key_B Key_C Key_D IRQ

______________________________________________________________________________________ 29
 2-Wire Interfaced, 2.7V to 5.5V LED Display
Driver with I/O Expander and Key Scan
Table 33. Port Configuration Register Format
MAX6955

ADDRESS REGISTER DATA

MODE
CODE (HEX) D7 D6 D5 D4 D3 D2 D1 D0
GPIO
Set port direction for ports P0 to P4:
Configuration 0x06 Set number of keys scanned
0 = output, 1 = input
Register
PORT ALLOCATION OPTIONS
0 Keys Scanned 0x06 0 0 0 P4 P3 P2 P1 P0
8 Keys Scanned 0x06 0 0 1 IRQ P3 P2 P1 Key_A
16 Keys Scanned 0x06 0 1 0 IRQ P3 P2 Key_B Key_A
24 Keys Scanned 0x06 0 1 1 IRQ P3 Key_C Key_B Key_A
32 Keys Scanned 0x06 1 X X IRQ Key_D Key_C Key_B Key_A
EXAMPLE PORT CONFIGURATION SETTINGS
No Keys
Scanned, P4 and
0x06 0 0 0 0 1 0 1 1
P2 Are Outputs,
Others Are Inputs
8 Keys Scanned,
P3 and P1 Are
0x06 0 1 0 X 0 1 0 X
Outputs, P2 Is an
Input
32 Keys
Scanned, No 0x06 1 X X X X X X X
GPIO Ports

Table 34. Key Mask Register Format (Write Only)

KEY ADDRESS REGISTER DATA
MASK CODE WITH APPROPRIATE SWITCH NAMED BELOW
REGISTER (HEX D7 D6 D5 D4 D3 D2 D1 D0
Key_A Mask
0x08 SW_A7 SW_A6 SW_A5 SW_A4 SW_A3 SW_A2 SW_A1 SW_A0
Register
Key_B Mask
0x09 SW_B7 SW_B6 SW_B5 SW_B4 SW_B3 SW_B2 SW_B1 SW_B0
Register
Key_C Mask
0x0A SW_C7 SW_C6 SW_C5 SW_C4 SW_C3 SW_C2 SW_C1 SW_C0
Register
Key_D Mask
0x0B SW_ D7 SW_D6 SW_D5 SW_D4 SW_D3 SW_D2 SW_D1 SW_D0
Register

30 ______________________________________________________________________________________
 2-Wire Interfaced, 2.7V to 5.5V LED Display
Driver with I/O Expander and Key Scan
Table 35. Key Debounced Register Format (Read Only)

MAX6955
KEY ADDRESS
REGISTER DATA
DEBOUNCED CODE
REGISTER (HEX) D7 D6 D5 D4 D3 D2 D1 D0
Key_A
Debounced 0x08 SW_A7 SW_A6 SW_A5 SW_A4 SW_A3 SW_A2 SW_A1 SW_A0
Register

Key_B
Debounced 0x09 SW_B7 SW_B6 SW_B5 SW_B4 SW_B3 SW_B2 SW_B1 SW_B0
Register

Key_C
Debounced 0x0A SW_C7 SW_C6 SW_C5 SW_C4 SW_C3 SW_C2 SW_C1 SW_C0
Register

Key_D
Debounced 0x0B SW_D7 SW_D6 SW_D5 SW_D4 SW_D3 SW_D2 SW_D1 SW_D0
Register

Table 36. Key Pressed Register Format (Read Only)

KEY ADDRESS
REGISTER DATA
PRESSED CODE
REGISTER (HEX D7 D6 D5 D4 D3 D2 D1 D0
Key_A
Pressed 0x0C SW_A7 SW_A6 SW_A5 SW_A4 SW_A3 SW_A2 SW_A1 SW_A0
Register

Key_B
Pressed 0x0D SW_B7 SW_B6 SW_B5 SW_B4 SW_B3 SW_B2 SW_B1 SW_B0
Register

Key_C
Pressed 0x0E SW_C7 SW_C6 SW_C5 SW_C4 SW_C3 SW_C2 SW_C1 SW_C0
Register

Key_D
Pressed 0x0F SW_D7 SW_D6 SW_D5 SW_D4 SW_D3 SW_D2 SW_D1 SW_D0
Register

Table 37. Display Test Register

ADDRESS REGISTER DATA
MODE CODE
(HEX) D7 D6 D5 D4 D3 D2 D1 D0

Normal Operation 0x07 X X X X X X X 0

Display Test 0x07 X X X X X X X 1

______________________________________________________________________________________ 31
 2-Wire Interfaced, 2.7V to 5.5V LED Display
Driver with I/O Expander and Key Scan
Table 38. Slot 1 Configuration
MAX6955

CC0: (2) 7-seg monocolor*

CC1: (2) 7-seg monocolor*

and (2) 7-seg monocolor*

CC0 and CC1: (2) 14-seg

CC0: 16-seg monocolor

CC1: 16-seg monocolor

CC0: 16-seg monocolor

CC1: 14-seg monocolor

CC0: 14-seg monocolor

CC1: 16-seg monocolor

or (4) 7-seg monocolor

monocolor or 14-seg
or (1) 7-seg bicolor
CONFIGURATION

(1)16-seg bicolor
(2) 7-seg bicolor

or 7-seg bicolor

or 7-seg bicolor
CHOICE CC0 and CC1:

CC0 and CC1:

Common-Cathode
Drive: Digit Type

bicolor
00 CC0 — CC0 CC0 CC0 CC0 — CC0 — — CC0
01 — CC1 CC1 CC1 — — CC1 — CC1 CC1 CC1
02 a1 a1 1a a1 a1 1a a a a1 1a a
03 a2 a2 — a2 a2 — — — a2 — —
04 b b 1b b b 1b b b b 1b b
05 c c 1c c c 1c c c c 1c c
06 d1 d1 1d d1 d1 1d d d d1 1d d
07 d2 d2 1dp d2 d2 1dp — — d2 1dp —
08 e e 1e e e 1e e e e 1e e
09 f f 1f f f 1f f f f 1f f
010 g1 g1 1g g1 g1 1g g1 g1 g1 1g g1
011 g2 g2 2a g2 g2 2a g2 g2 g2 2a g2
012 h h 2b h h 2b h h h 2b h
013 i i 2c i i 2c i i i 2c i
014 j j 2d j j 2d j j j 2d k
015 k k 2e k k 2e k k k 2e l
016 l l 2f l l 2f l l l 2f l
017 m m 2g m m 2g m m m 2g m
018 dp dp 2dp dp dp 2dp dp dp dp 2dp dp
ADDRESS
CODE (HEX) 0x0C

D7
See Table 41.
D6
REGISTER DATA

D5
See Table 40.
D4
D3
See Table 39.
D2
D1 0 1 0 1
D0 0 0 1 1
*7-segment digits can be replaced by directly controlled discrete LEDs according to settings in decode mode register (Table 11).
**The highlighted row is used in Typical Operating Circuit 1 for display digits 0 and 1.

32 ______________________________________________________________________________________
 2-Wire Interfaced, 2.7V to 5.5V LED Display
Driver with I/O Expander and Key Scan
Table 39. Slot 2 Configuration

MAX6955
CC2: (2) 7-seg monocolor*

CC3: (2) 7-seg monocolor*

CC2 and CC3: (2) 14-seg

and (2) 7-seg monocolor*
CC2: 16-seg monocolor

CC3: 16-seg monocolor

CC2: 16-seg monocolor

CC3: 14-seg monocolor

CC2: 14-seg monocolor

CC3: 16-seg monocolor

or (4) 7-seg monocolor

monocolor or 14-seg
or (1) 7-seg bicolor
CONFIGURATION

(1)16-seg bicolor
(2) 7-seg bicolor

or 7-seg bicolor

or 7-seg bicolor
CHOICE CC2 and CC3:

CC2 and CC3:

Common-Cathode
Drive: Digit Type

bicolor
00 a1 a1 1a a1 a1 1a a a a1 1a a
01 a2 a2 — a2 a2 — — — a2 — —
02 CC2 — CC2 CC2 CC2 CC2 — CC2 — — CC2
03 — CC3 CC3 CC3 — — CC3 — CC3 CC3 CC3
04 b b 1b b b 1b b b b 1b b
05 c c 1c c c 1c c c c 1c c
06 d1 d1 1d d1 d1 1d d d d1 1d d
07 d2 d2 1dp d2 d2 1dp — — d2 1dp —
08 e e 1e e e 1e e e e 1e e
09 f f 1f f f 1f f f f 1f f
010 g1 g1 1g g1 g1 1g g1 g1 g1 1g g1
011 g2 g2 2a g2 g2 2a g2 g2 g2 2a g2
012 h h 2b h h 2b h h h 2b h
013 i i 2c i i 2c i i i 2c i
014 j j 2d j j 2d j j j 2d k
015 k k 2e k k 2e k k k 2e l
016 l l 2f l l 2f l l l 2f l
017 m m 2g m m 2g m m m 2g m
018 dp dp 2dp dp dp 2dp dp dp dp 2dp dp
ADDRESS
CODE (HEX) 0x0C

D7
See Table 41.
D6
REGISTER DATA

D5
See Table 40.
D4
D3 0 1 0 1
D2 0 0 1 1
D1
See Table 38.
D0
*7-segment digits can be replaced by directly controlled discrete LEDs according to settings in decode mode register (Table 11).
**The highlighted row is used in Typical Operating Circuit 1 for display digits 2 and 3.

______________________________________________________________________________________ 33
 2-Wire Interfaced, 2.7V to 5.5V LED Display
Driver with I/O Expander and Key Scan
Table 40. Slot 3 Configuration
MAX6955

CC4: (2) 7-seg monocolor*

CC5: (2) 7-seg monocolor*

CC4 and CC5: (2) 14-seg

and (2) 7-seg monocolor*
CC4: 16-seg monocolor

CC5: 16-seg monocolor

CC4: 16-seg monocolor

CC5: 14-seg monocolor

CC4: 14-seg monocolor

CC5: 16-seg monocolor

or (4) 7-seg monocolor

monocolor or 14-seg
or (1) 7-seg bicolor
CONFIGURATION

(1)16-seg bicolor
(2) 7-seg bicolor

or 7-seg bicolor

or 7-seg bicolor
CHOICE CC4 and CC5:

CC4 and CC5:

Common-Cathode
Drive: Digit Type

bicolor
00 a1 a1 1a a1 a1 1a a a a1 1a a
01 a2 a2 — a2 a2 — — — a2 — —
02 b b 1b b b 1b b b b 1b b
03 c c 1c c c 1c c c c 1c c
04 CC4 — CC4 CC4 CC4 CC4 — CC4 — — CC4
05 — CC5 CC5 CC5 — — CC5 — CC5 CC5 CC5
06 d1 d1 1d d1 d1 1d d d d1 1d d
07 d2 d2 1dp d2 d2 1dp — — d2 1dp —
08 e e 1e e e 1e e e e 1e e
09 f f 1f f f 1f f f f 1f f
010 g1 g1 1g g1 g1 1g g1 g1 g1 1g g1
011 g2 g2 2a g2 g2 2a g2 g2 g2 2a g2
012 h h 2b h h 2b h h h 2b h
013 i i 2c i i 2c i i i 2c i
014 j j 2d j j 2d j j j 2d k
015 k k 2e k k 2e k k k 2e l
016 l l 2f l l 2f l l l 2f l
017 m m 2g m m 2g m m m 2g m
018 dp dp 2dp dp dp 2dp dp dp dp 2dp dp
ADDRESS
CODE (HEX) 0x0C

D7
See Table 41.
D6
REGISTER DATA

D5 0 1 0 1
D4 0 0 1 1
D3
See Table 39.
D2
D1
See Table 38.
D0
*7-segment digits can be replaced by directly controlled discrete LEDs according to settings in decode mode register (Table 11).
**The highlighted row is used in Typical Operating Circuit 1 for display digits 4 and 5.

34 ______________________________________________________________________________________
 2-Wire Interfaced, 2.7V to 5.5V LED Display
Driver with I/O Expander and Key Scan
Table 41. Slot 4 Configuration

MAX6955
CC6: (2) 7-seg monocolor*

CC7: (2) 7-seg monocolor*

CC6 and CC7: (2) 14-seg

and (2) 7-seg monocolor*
CC6: 16-seg monocolor

CC7: 16-seg monocolor

CC6: 16-seg monocolor

CC7: 14-seg monocolor

CC6: 14-seg monocolor

CC7: 16-seg monocolor

or (4) 7-seg monocolor

monocolor or 14-seg
or (1) 7-seg bicolor
CONFIGURATION

(1)16-seg bicolor
(2) 7-seg bicolor

or 7-seg bicolor

or 7-seg bicolor
CHOICE CC6 and CC7:

CC6 and CC7:

Common-Cathode
Drive: Digit Type

bicolor
00 a1 a1 1a a1 a1 1a a a a1 1a a
01 a2 a2 — a2 a2 — — — a2 — —
02 b b 1b b b 1b b b b 1b b
03 c c 1c c c 1c c c c 1c c
04 d1 d1 1d d1 d1 1d d d d1 1d d
05 d2 d2 1dp d2 d2 1dp — — d2 1dp —
06 CC6 — CC6 CC6 CC6 CC6 — CC6 — — CC6
07 — CC7 CC7 CC7 — — CC7 — CC7 CC7 CC7
08 e e 1e e e 1e e e e 1e e
09 f f 1f f f 1f f f f 1f f
010 g1 g1 1g g1 g1 1g g1 g1 g1 1g g1
011 g2 g2 2a g2 g2 2a g2 g2 g2 2a g2
012 h h 2b h h 2b h h h 2b h
013 i i 2c i i 2c i i i 2c i
014 j j 2d j j 2d j j j 2d k
015 k k 2e k k 2e k k k 2e l
016 l l 2f l l 2f l l l 2f l
017 m m 2g m m 2g m m m 2g m
018 dp dp 2dp dp dp 2dp dp dp dp 2dp dp
ADDRESS
CODE (HEX) 0x0C

D7 0 1 0 1
D6 0 0 1 1
REGISTER DATA

D5
See Table 40.
D4
D3
See Table 39.
D2
D1
See Table 38.
D0
*7-segment digits can be replaced by directly controlled discrete LEDs according to settings in the decode mode register (Table 11).
**The highlighted row is used in Typical Operating Circuit 1 for display digits 6 and 7.

______________________________________________________________________________________ 35
 2-Wire Interfaced, 2.7V to 5.5V LED Display
Driver with I/O Expander and Key Scan
MAX6955

Typical Operating Circuits

3.3V O11 a O2 a
O0 O12 b O4 b
V+
O1 O13 c O5 c
V+ d d
O14 O6
V+ O2 O15 e O8 e
47µF 100nF
GND O3 O16 f O9 f
GND O4 O17 g O10 g
O18 dp O7 dp
GND O5
O0 Rcc
O6 O1 Gcc
MAX6955 O7 DIGIT 0b (RED), DIGIT 1b (GREEN)
O8 7-SEGMENT BICOLOR LED

O9
O10
O0 a
SCL O11 O4 b O1 CC1
AD0 O12 O5 c O0 CC0
O6 d
AD1 O13 DIGITS 0a AND 1a
O8 e
SDA O14 7-SEGMENT MONOCOLOR
O9 f
O15 O10 g1
O11 g2 a1
BLINK O16 O0
O12 h
O1 a2
O17 O13 i
O2 b
OSC_OUT O18 O14 j c
O3
O15 k
P0 O6 d1
O16 l
O7 d2
P1 O17 m
OSC O8 e
O18 dp
P2 O9 f
O2 Rcc O10 g1
ISET P3 O3 Ccc
CSET O11 g2
P4 O12 h
RSET DIGITS 2 AND 3 O13 i
14-SEGMENT BICOLOR O14 j
O15 k
O16 l
O0 O0 O17 m
O2 O2 O18 dp
O3 O3 O5 cc
O4 O4
DIGIT 5
16-SEGMENT MONOCOLOR

O5 O5 a1
O0
O8 O8
O1 a2
O9 O9
O2 b
O10 O10 c
O3
O6 d1
O7 d2
O11 O11 O8 e
O12 O12 O9 f
O13 O13 O10 g1
O14 O14 O11 g2
O12 h
O13 i
O15 O15 O14 j
O16 O16 O15 k
O17 O17 O16 l
O18 O18 O17 m
O18 dp
O6 O7 O4 cc
DIGIT 6 DIGIT 7 DIGIT 4
4 x 4 MATRIX OF DISCRETE MONOCOLOR LEDs 4 x 4 MATRIX OF DISCRETE MONOCOLOR LEDs 16-SEGMENT MONOCOLOR

36 ______________________________________________________________________________________
 2-Wire Interfaced, 2.7V to 5.5V LED Display
Driver with I/O Expander and Key Scan

MAX6955
Typical Operating Circuits (continued)

3.3V O2 a O2 a
O0 O3 a2 O3 a2
V+
O1 O4 b O4 b
V+ c c
O5 O5
V+ O2 O6 d1 O6 d1
47µF 100nF
GND O3 O7 d2 O7 d2
GND O4 O8 e O8 e
O9 f O9 f
GND O5
O10 g1 O10 g1
O6 O11 g2 O11 g2
O7 O12 h O12 h
MAX6955 O13 i O13 i
O8
O14 j O14 j
O9 O15 k O15 k
O10 O16 l O16 l
O17 m O17 m
SCL O11
O18 dp O18 dp
AD0 O12 O0 cc O1 cc
AD1 O13 DIGIT 0 DIGIT 1
SDA O14
O0 a O0 a
O15
O1 a2 O1 a2
BLINK O16 O4 b O4 b
O5 c O5 c
O17
O6 d1 O6 d1
OSC_OUT O18
O7 d2 O7 d2
P0 O8 e O8 e
O9 f O9 f
OSC P1
O10 g1 O10 g1
P2 O11 g2 O11 g2
P3 O12 h O12 h
CSET ISET
O13 i O13 i
P4
O14 j O14 j
RSET
O15 k O15 k
O16 l O16 l
O17 m O17 m
O18 dp O18 dp
O2 cc O3 cc
DIGIT 2 DIGIT 3

O0 a O0 a O0 a O0 a
O1 a2 O1 a2 O1 a2 O1 a2
O2 b O2 b O2 b O2 b
O3 c O3 c O3 c O3 c
O6 d1 O6 d1 O4 d1 O4 d1
O6 d2 O7 d2 O5 d2 O5 d2
O8 e O8 e O8 e O8 e
O9 f O9 f O9 f O9 f
O10 g1 O10 g1 O10 g1 O10 g1
O11 g2 O11 g2 O11 g2 O11 g2
O12 h O12 h O12 h O12 h
O13 i O13 i O13 i O13 i
O14 j O14 j O14 j O14 j
O15 k O15 k O15 k O15 k
O16 l O16 l O16 l O16 l
O17 m O17 m O17 m O17 m
O18 dp O18 dp O18 dp O18 dp
O4 cc O5 cc O6 cc O7 cc
DIGIT 4 DIGIT 5 DIGIT 6 DIGIT 7

______________________________________________________________________________________ 37
 2-Wire Interfaced, 2.7V to 5.5V LED Display
Driver with I/O Expander and Key Scan
Pin Configurations
MAX6955

TOP VIEW

P0 1 36 P4 P0 1 40 P4
P1 2 35 P3 P1 2 39 P3
AD0 3 34 P2 AD0 3 38 P2
SDA 4 33 OSC_OUT SDA 4 37 OSC_OUT
SCL 5 32 BLINK SCL 5 36 BLINK
AD1 6 31 O18 AD1 6 35 O18
O0 7 30 O17 O0 7 34 O17
O1 8 29 O16 O1 8 33 O16
O2 9 28 O15 O2 9 32 O15
MAX6955AAX
O3 10 27 O14 O3 10 31 O14
MAX6955APL
O4 11 26 O13 O4 11 30 O13
O5 12 25 O12 O5 12 29 O12
O6 13 24 O11 O6 13 28 O11
O7 14 23 O10 O7 14 27 O10
O8 15 22 O9 O8 15 26 O9
GND 16 21 V+ N.C. 16 25 N.C.
ISET 17 20 OSC GND 17 24 V+
GND 18 19 V+ GND 18 23 V+

ISET 19 22 OSC
SSOP
GND 20 21 V+

PDIP

Chip Information
TRANSISTOR COUNT: 55,529
PROCESS: CMOS

38 ______________________________________________________________________________________
 2-Wire Interfaced, 2.7V to 5.5V LED Display
Driver with I/O Expander and Key Scan
Package Information

MAX6955
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to [Link]/packages.)

[Link]

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implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.

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