Adding Code in Latex
Sairam K
January 2022
Contents
1 Introduction 1
2 Code used 1
3 Custom style 2
4 Setting Parameters in lstlistings 3
5 Final Output 3
1 Introduction
Here is a small tutorial on how to add Code and Make it look neat and clean.
This example is based on a simple Verilog HDL program which is very similar
to C programming language
2 Code used
We consider the following code for the demonstration of this tutorial
RTL Code
module ( din , c l k , r s t , dout ) ; // d e f i n i n g t h e module
i n p u t din , c l k , r s t ;
output r e g dout ;
task i n i t i a l i z e ; // d e f i n i n g t h e t a s k
i f ( reset )
dout <= 0 ;
else
dout <= d i n ;
endtask
endmodule
All we are now going to do is to use some custom style and define our required
commands in that style.
1
3 Custom style
We define our custom style as chstyle by use of the command
\lstlisting{chstyle}{ }
inside which we use the following commands for desiging and aligning the code
in order to make it readable:
\lstlisting{chstyle}{
backgroundcolor = \color{gray!6} - setting the color of background.
commentstyle = \color{green!80} - setting comments color
keywordstyle = \color{Magenta} - setting keywords color
stringstyle = \color{blue!60!red} - setting strings’ color
captionpos = t - setting the position of captions t- for top and b- for bottom
numbers = left - setting numbers for code lines count
numberstyle = \footnotesize\color{orange!96} - setting color of number count
frame = tblr - full border one line frame
frame = L - setting frame as two line with caps L (or any combinations of T,B,L,R)
framerule = 1pt - setting frame gap
rulecolor = \color{brown} - frame color
breaklines = true
commandstyle = \color{violet}
}
2
4 Setting Parameters in lstlistings
Now in the \begin{lstlistings}{...}
include in the {...} here as the language = verilog, style = chstyle
With this we are good to go and we can further customize if the need
arises! The final edited code now looks as given below.
5 Final Output
Verilog Code 1: RTL Code
1 module ( din , c l k , r s t , dout ) ; // d e f i n i n g t h e module
2 i n p u t din , c l k , r s t ;
3 output r e g dout ;
4 task i n i t i a l i z e ; // d e f i n i n g t h e t a s k
5 i f ( reset )
6 dout <= 0 ;
7 else
8 dout <= d i n ;
9 endtask
10 endmodule