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AND Gate Timing Diagram Analysis

The document contains several problems involving logic gates. Problem 5 describes a 3-input AND gate with input waveforms and asks to draw the output waveform. Problem 10 describes a 5-input AND gate with input waveforms and asks to determine the output and draw a timing diagram. Problem 18 describes inputs to a NAND and NOR gate and asks if they will produce the same output.

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94 views6 pages

AND Gate Timing Diagram Analysis

The document contains several problems involving logic gates. Problem 5 describes a 3-input AND gate with input waveforms and asks to draw the output waveform. Problem 10 describes a 5-input AND gate with input waveforms and asks to determine the output and draw a timing diagram. Problem 18 describes inputs to a NAND and NOR gate and asks if they will produce the same output.

Uploaded by

kath kath
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as XLSX, PDF, TXT or read online on Scribd

Problem #5

The input waveforms applied to a 3-input AND gate are as indicated in Figure 3-78. Show the output wave
in proper relation to the inputs with a timing diagram.

0 0 1 1 1 0 0 1 1 1 0 0 1 1

0 1 1 1 1 1 0 0 0 0 0 1 1 1

0 0 0 1 0 0 0 0 1 0 0 0 0 1

0 0 0 1 0 0 0 0 0 0 0 0 0 1

Problem #6
The input waveforms applied to a 3-input AND gate as indicated in Figure 3-78. Show
the output waveform in proper relation to the inputs with a timing diagram .

0 1 1 1 1 0 0 0 1 1 1 1 0

0 0 1 1 0 0 1 0 0 1 1 0 0

0 1 1 0 0 0 1 1 1 1 0 0 0

0 1 1 1 1 1 1 0 0 0 0 0 0

0 0 1 0 0 0 0 0 0 0 0 0 0

Problem #10
For the five input waveforms in Figure 3-80, determine the output for a 5-input AND gate and the output
gate. Draw the timing diagram.

0 1 0 1 0 1 0 1 0 1 0 1 0 1

0 1 1 0 0 1 1 0 0 1 1 0 0 1

0 1 1 1 1 0 0 0 0 1 1 1 1 0

0 1 1 1 1 1 1 1 1 0 0 0 0 0

0 1 0 0 0 0 0 0 0 0 0 0 0 0

0 1 1 1 1 1 1 1 1 1 1 1 1 1

Problem #13
Determine the output waveform in Figure 3-83.
0 1 1 1 1 1 1 0 0 0 0

0 0 1 1 1 1 1 1 0 0 0

0 0 0 1 1 1 1 1 1 0 0

0 0 0 0 1 1 1 1 1 1 0

1 1 1 1 0 0 0 1 1 1 1

Problem #18

The NAND and the negative-OR symbols represent equivalent operations, but
they are functionally different. For the NOR symbol, look for at least one HIGH
on the inouts to give a LOW on the output. For the negative-AND, look for the
LOWs on the inputs to give a HIGH output. Using these two functional points of
view, show that both gates in igure 4-86 will produce the same output for the
given inputs

1 1 0 1 1 1 1 0 1 0 1

0 1 1 1 0 1 0 0 0 1 1

0 0 1 0 0 0 0 1 0 1 0

1 0 0 0 1 0 1 1 1 0 0

0 0 0 0 0 0 0 1 0 0 0

Problem #21
Repeat Problem 11 for an exclusive-NOR gate

0 1 0 1 0 1 0 0 1 0 1 0 0 1

1 1 1 1 1 1 1 0 0 0 0 0 1 1

0 0 0 0 0 0 0 1 0 1 0 1 0 0

Problem #22

Determine the output of an exclusive-OR gate for the inputs shown in Figure 3-77 and draw a timing diag
0 1 1 0 0 1 1 0 0 1 1 0 0 1

0 0 1 1 0 0 1 1 0 0 1 1 0 0

0 1 1 0 1 0 1 0 1 0 1 0 1
Show the output waveform

1 0 0

1 1 0

0 0 0

0 0 0

D gate and the output for a 5-input OR

0 1 0 1 0

1 0 0 1 1

0 0 0 1 1

0 0 0 1 1

0 0 0 1 0

1 1 0 1 1
0 1 0 1 0 0 1 0 1 0 0 1 0 1 0

1 1 1 1 1 0 0 0 0 0 1 1 1 1 1

0 0 0 0 0 1 0 1 0 1 0 0 0 0 0

and draw a timing diagram.


1 0 0

1 1 0

0 1 0

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