Digital Electronics and

Microprocessor Fundamentals

Chapter 03 : Combinational Logic Circuits

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Logic Circuits – Combinational vs Sequential
 Logic circuits can be categorized into 2 major classes:
 Combinational Logic Circuits

 consists of several logic gates interconnected and

the output depends on the combination of logic
levels present at the inputs.
 only the current inputs will affect the output
logic state
 no feedback path in the circuit

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Logic Circuits – Combinational vs Sequential
 Sequential Logic Circuits
 consists of Combinational logic circuit and storage
devices
 the output is a function of both current inputs and
present state
 the inputs can be from external or internal feedback

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Components of Combinational Circuits
 Combinational Circuit
 A logic circuit whose output or outputs are determined

by the logical states of the existing input or inputs,

independent of historical states
 Some popular combinational blocks
 Decoder 解碼器

 Encoder 編碼器

 Multiplexer 多路器

 De-multiplexer 多路分配器

 available in MSI (Medium-Scale Integration) packages

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Combinational Circuits - Decoder
 Consider the following example:

Design and implement a basic decoder circuit that

operates as follows:

- F = 1 when {A,B,C,D} = 9(10), otherwise 0

MSB A
B Basic
Decoder F
C
LSB D

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 Combinational Circuits - Decoder
 a logic circuit that converts N-bit binary input code (2N
combinations) into M (= 2N) output lines such that each
line will be activated for only one of the possible
combinations of inputs
 only 1-out-of-M output lines I0 Y0
will be active at a time I1
Y1
Y2
: :
: :
: : Decoder
N-bit code : :
: :
: :
IN-1 YM-1
N input line to generate 2n output line
EN

One of the 2N One of the 2M

input code output line active
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 Combinational Circuits - Decoder
3-to-8
 Example: 3-to-8 Decoder also called Decoder

Binary-to-Octal Decoder or 1-of-8 Decoder Y0

LSB A0
Y1
(it can be done using two 2 lines to 4 line decoders)
A1 Y2
Y3
MSB A2
Y4
Y5
Y6
EN
Y7

Note: EN is the ‘ENABLE’ input. The

‘bubble’ refers EN as an active-low input.

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 74LS138

Logic Diagram Gate-level Schematic

2023/10/10 A Commercial Example: 3-to-8 Decoder (74LS138) p.8

Combinational Circuits - Decoder
 Example: BCD-to-7-segment LED Display
Decoder/Driver
BCD-to-7-segement
LED Display Current
Decoder/Driver Limiting 7-segment
Resistor LED Display Unit
A a
LSB D0
B
D1 C f b
BCD
Input D g
D2
E
MSB D3
F e c
G
Dp
Dp d

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Combinational Circuits - Encoder
 a number of input lines, only one of which is activated at
a given time, and produces an N-bit output code,
depending on which input is activated
 If there are M input lines,
the number of output line I0 Y0
N >= log2M I1
Y1
Y2
: :
: : N-bit code
: : Encoder
: :
: :
: :
IM-1 YN-1

EN

One of the 2M One of the 2N

input line active output combinations

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Combinational Circuits - Encoder
 a number of input lines, only one of which is activated at
a given time, and produces an N-bit output code,
depending on which input is activated
 If there are M input lines,
the number of output line I0 Y0
N >= log2M I1
Y1
Y2
: :
: : N-bit code
: : Encoder
: :
: :
: :
IM-1 YN-1

EN

One of the 2M One of the 2N

input line active output combinations

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Combinational Circuits - Encoder 8-to-3
Encoder

A0
 Example: 8-to-3 Encoder A1
Binary Coded Decimal (BCD) A2
Q0 LSB
A3
Q1
A4
A5 Q2 MSB
A6
A7

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Combinational Circuits - Multiplexer
 also called data selector
 behaves like an electronic switch

D0
Data D1
Channels Output
D2
D3

Selection S1
Inputs S0

 accepts data from one of the input lines and sends it to

the single output line
 the decision of connecting which input channel to the
output is made by the ‘Selection Inputs’
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Combinational Circuits - Multiplexer
 Example: a 4:1 Multiplexer

D0

Data D1
4:1
Channels Y Output
MUX
D2

D3

S1 S0

Selection
Inputs

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Combinational Circuits – Multiplexer (MUX)
 Example:

Draw a truth table and write a simplified logic equation

for F in the multiplexer circuit in Fig 1.

1 I0
C I1 4:1
Y F
I2 MUX
0 I3

S1 S0

A
B Fig 1
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Solution:

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Combinational Circuits – De-Multiplexer (DeMUX)
 Connect a single input line to one of the output lines
 Reverse the multiplexing process

 Selection inputs are used to determine which output line

is to be connected

Y0
One to many circuit
Multiplexed Y1
Input Y2
Y3

Selection S1
Inputs S0

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Demultiplexer

A 1-bit 1:4 Demultiplexer

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Implementing Boolean Functions Using MUX
 Example:

Implement the logic function

F(A, B, C, D) = A’C’ + A’B + BC’D’ + AB’CD’

using an 8 : 1 multiplexer.

Draw a logic diagram to illustrate your implementation.

Note: Let A, B and C are to be connected to the

‘Channel Select’ inputs (S2, S1 and S0), respectively.
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Implementing Boolean Functions Using 8:1 MUX

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 Ii

I0 =

I1 =

I2 =

I3 =

I4 =

I5 =

I6 =

I7 =

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 F(A, B, C, D) = A’C’ + A’B + BC’D’ + AB’CD’
A=0, C=0 A=1, B=0, C=1, D=0

Input Output
A B C D F Ii
0 0 0 0 1 I0 =
0 0 0 1 1
0 0 1 0 0 I1=
0 0 1 1 0
0 1 0 0 1 I2=
0 1 0 1 1
0 1 1 0 1 I3=
0 1 1 1 1
1 0 0 0 0 I4=
1 0 0 1 0
1 0 1 0 1 I5=
1 0 1 1 0
1 1 0 0 1 I6=
1 1 0 1 0
1 1 1 0 0 I7=
1 1 1 1 0

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Solution:
I0
I1
I2
I3 8:1 Y F
I4 MUX
I5
I6
I7
S2 S1 S0

A
B
C

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Applications of Combinational Circuits
 Example:

In a process plant, a liquid chemical is used in the

manufacturing process. The chemical is stored in 3
different tanks. A level sensor in each tank produces a
HIGH voltage when the level of chemical in the tank
drops below a specified point.

Design an alarm processing logic that monitors the

chemical level in each tank and indicates when the level
in any 2 of the tanks drops below the specified point.
Use (i) 8 to 1 MUX, (ii) 4 to 1 MUX to implement.
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Applications of Combinational Circuits
Chemical Tanks

A B C

Low-level
Alarm Indicator
Processing
ALM
Logic

Fig 1 A Tank-level Monitoring System

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Applications of Combinational Circuits
 Example:

Design and implement a full-adder using a 3-to-8

decoder and any additional logic gate.

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Applications of Combinational Circuits
 Implement using the following 3 to 8 decoder

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 Q&A

End-of-Chapter 03

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