Chapter-9

Background
Program must be brought (from disk) into memory and placed within a process
for it to be run

Main memory and registers are only storage CPU can access directly

Memory unit only sees a stream of:

• addresses + read requests, or

• address + data and write requests

Register access is done in one CPU clock (or less)

Main memory can take many cycles, causing a stall

Cache sits between main memory and CPU registers

Protection of memory required to ensure correct operation

Chapter-9 1
 Contiguous Allocation
Main memory must support both OS and user processes

Limited resource, must allocate efficiently

Contiguous allocation is one early method

Main memory usually into two partitions:

Resident operating system, usually held in low memory with interrupt vector

User processes then held in high memory

Each process contained in single contiguous section of memory

• Relocation registers used to protect user processes from each other, and from
changing operating-system code and data

Base register contains value of smallest physical address

Limit register contains range of logical addresses – each logical address

must be less than the limit register

MMU maps logical address dynamically

Can then allow actions such as kernel code being transient and kernel
changing size

Chapter-9 2
 Variable Partition
• Multiple-partition allocation

Degree of multiprogramming limited by number of partitions

Variable-partition sizes for efficiency (sized to a given process’ needs)

Hole – block of available memory; holes of various size are scattered

throughout memory

When a process arrives, it is allocated memory from a hole large enough to

accommodate it

Process exiting frees its partition, adjacent free partitions combined

Operating system maintains information about: a) allocated partitions b) free

partitions (hole)

Dynamic Storage-Allocation Problem

How to satisfy a request of size n from a list of free holes?

First-fit: Allocate the first hole that is big enough

Best-fit: Allocate the smallest hole that is big enough; must search entire list,
unless ordered by size

Produces the smallest leftover hole

Worst-fit: Allocate the largest hole; must also search entire list

Produces the largest leftover hole

First-fit and best-fit better than worst-fit in terms of speed and storage utilization

Fragmentation
External Fragmentation – total memory space exists to satisfy a request, but it
is not contiguous

Internal Fragmentation – allocated memory may be slightly larger than

requested memory; this size difference is memory internal to a partition, but not
being used

First fit analysis reveals that given N blocks allocated, 0.5 N blocks lost to
fragmentation

Chapter-9 3
 • 1/3 may be unusable -> 50-percent rule

• Reduce external fragmentation by compaction

Shuffle memory contents to place all free memory together in one large block

Compaction is possible only if relocation is dynamic, and is done at execution

time

I/O problem

Latch job in memory while it is involved in I/O

Do I/O only into OS buffers

• Now consider that backing store has same fragmentation problems

Paging
• Physical address space of a process can be noncontiguous; process is allocated
physical memory whenever the latter is available

Avoids external fragmentation

Avoids problem of varying sized memory chunks

• Divide physical memory into fixed-sized blocks called frames

• Size is power of 2, between 512 bytes and 16 Mbytes

Divide logical memory into blocks of same size called pages

Keep track of all free frames

To run a program of size N pages, need to find N free frames and load program

Set up a page table to translate logical to physical addresses

Backing store likewise split into pages

Still have Internal fragmentation

Chapter-9 4
Chapter-9 5
 Paging -- Calculating internal
fragmentation
Page size = 2,048 bytes

Process size = 72,766 bytes

35 pages + 1,086 bytes

Internal fragmentation of 2,048 - 1,086 = 962 bytes

Worst case fragmentation = 1 frame – 1 byte

On average fragmentation = 1 / 2 frame size

So small frame sizes desirable?

But each page table entry takes memory to track

Page sizes growing over time

• Solaris supports two page sizes – 8 KB and 4 MB

Chapter-9 6
 Implementation of Page Table
• Page table is kept in main memory

Page-table base register (PTBR) points to the page table

Page-table length register (PTLR) indicates size of the page table

• In this scheme every data/instruction access requires two memory accesses

• One for the page table and one for the data / instruction
• The two-memory access problem can be solved by the use of a special fast-lookup
hardware cache called translation look-aside buffers (TLBs) (also called
associative memory).

Translation Look-Aside Buffer

• Some TLBs store address-space identifiers (ASIDs) in each TLB entry – uniquely
identifies each process to provide address-space protection for that process
• Otherwise need to flush at every context switch

TLBs typically small (64 to 1,024 entries)

On a TLB miss, value is loaded into the TLB for faster access next time

Replacement policies must be considered

Some entries can be wired down for permanent fast access

Chapter-9 7
 Effective Access Time
Hit ratio – percentage of times that a page number is found in the TLB

An 80% hit ratio means that we find the desired page number in the TLB 80% of
the time.

Suppose that 10 nanoseconds to access memory.

If we find the desired page in TLB then a mapped-memory access take 10

ns

Otherwise we need two memory access so it is 20 ns

• Effective Access Time (EAT)

EAT = 0.80 x 10 + 0.20 x 20 = 12 nanoseconds

implying 20% slowdown in access time

• Consider amore realistic hit ratio of 99%,

EAT = 0.99 x 10 + 0.01 x 20 = 10.1ns
implying only 1% slowdown in access time.

Memory Protection
• Memory protection implemented by associating protection bit with each frame to
indicate if read-only or read-write access is allowed

• Can also add more bits to indicate page execute-only, and so on

• Valid-invalid bit attached to each entry in the page table:

“valid” indicates that the associated page is in the process’ logical address
space, and is thus a legal page

“invalid” indicates that the page is not in the process’ logical address space

Or use page-table length register (PTLR)

• Any violations result in a trap to the kernel

Chapter-9 8
 Shared Pages
• Shared code

One copy of read-only (reentrant) code shared among processes (i.e., text
editors, compilers, window systems)

Similar to multiple threads sharing the same process space

Also useful for interprocess communication if sharing of read-write pages is

allowed

• Private code and data

Each process keeps a separate copy of the code and data

The pages for the private code and data can appear anywhere in the logical
address space

Shared Pages Example

Chapter-9 9
 Structure of the Page Table
• Memory structures for paging can get huge using straight-forward methods

Consider a 32-bit logical address space as on modern computers

Page size of 4 KB (212)

Page table would have 1 million entries (232 / 212)

If each entry is 4 bytes > each process 4 MB of physical address space for
the page table alone

Don’t want to allocate that contiguously in main memory

• One simple solution is to divide the page table into smaller units

Hierarchical Paging

Hashed Page Tables

Inverted Page Tables

Chapter-9 10
Chapter-9 11
 Hashed Page Tables

Chapter-9 12
 Common in address spaces > 32 bits

The virtual page number is hashed into a page table

• This page table contains a chain of elements hashing to the same location

Each element contains (1) the virtual page number (2) the value of the mapped
page frame (3) a pointer to the next element

Virtual page numbers are compared in this chain searching for a match
• If a match is found, the corresponding physical frame is extracted

• Variation for 64-bit addresses is clustered page tables

Similar to hashed but each entry refers to several pages (such as 16) rather
than 1

Especially useful for sparse address spaces (where memory references are
non-contiguous and scattered)

Inverted Page Table

Rather than each process having a page table and keeping track of all possible
logical pages, track all physical pages

One entry for each real page of memory

Entry consists of the virtual address of the page stored in that real memory
location, with information about the process that owns that page

Chapter-9 13
 Decreases memory needed to store each page table, but increases time needed
to search the table when a page reference occurs

Use hash table to limit the search to one — or at most a few — page-table
entries
• TLB can accelerate access

• But how to implement shared memory?

• One mapping of a virtual address to the shared physical address

Swapping
• A process can be swapped temporarily out of memory to a backing store, and then
brought back into memory for continued execution
• Total physical memory space of processes can exceed physical memory

Backing store – fast disk large enough to accommodate copies of all memory
images for all users; must provide direct access to these memory images

Roll out, roll in – swapping variant used for priority-based scheduling

algorithms; lower-priority process is swapped out so higher-priority process can
be loaded and executed

Chapter-9 14
 Major part of swap time is transfer time; total transfer time is directly proportional
to the amount of memory swapped

System maintains a ready queue of ready-to-run processes which have memory

images on disk

Does the swapped out process need to swap back in to same physical
addresses?

Depends on address binding method

• Plus consider pending I/O to / from process memory space

• Modified versions of swapping are found on many systems (i.e., UNIX, Linux, and
Windows)

Swapping normally disabled

Started if more than threshold amount of memory allocated

Disabled again once memory demand reduced below threshold

Context Switch Time including Swapping

Chapter-9 15
 If next processes to be put on CPU is not in memory, need to swap out a
process and swap in target process

Context switch time can then be very high

100MB process swapping to hard disk with transfer rate of 50MB/sec

Swap out time of 2000 ms

Plus swap in of same sized process

Total context switch swapping component time of 4000ms (4 seconds)

• Can reduce if reduce size of memory swapped – by knowing how much memory
really being used
• System calls to inform OS of memory use via request_memory() and
release_memory()
• Other constraints as well on swapping
• Pending I/O – can’t swap out as I/O would occur to wrong process
• Or always transfer I/O to kernel space, then to I/O device

4Known as double buffering, adds overhead

• Standard swapping not used in modern operating systems

• But modified version common

Swap only when free memory extremely low

Swapping on Mobile Systems

• Not typically supported
• Flash memory based

Small amount of space

Limited number of write cycles

Poor throughput between flash memory and CPU on mobile platform

• Instead use other methods to free memory if low

• iOS asks apps to voluntarily relinquish allocated memory

Read-only data thrown out and reloaded from flash if needed

Failure to free can result in termination

Chapter-9 16
 • Android terminates apps if low free memory, but first writes application
state to flash for fast restart

• Both OSes support paging as discussed below

Chapter-9 17