CCSE200-SECSE2003
CSE2003 ( B23+D21+D22)
COMPUTER ARCHITECTURE AND ORGANISATION
Faculty:Prof. Shweta Saxena
GROUP ACTIVITY
MADE BY : RISHI KUMAR SINGH
REG NO : 24MIP10131
Case study 1
History of Cache Memory System:
1. Origins (1940s-1950s):
◦ Early computers like ENIAC and UNIVAC used sequential memory
access techniques.
◦ Memory was slow and relied on technologies like vacuum tubes and
magnetic drums, which signi cantly slowed CPU operations.
2. Introduction of Cache (1960s):
◦ Cache memory was rst introduced to bridge the growing speed gap
between the processor (fast) and main memory (slow).
◦ The IBM System/360 Model 85 (1968) was among the rst computers to
implement cache memory. It used a small, fast storage to temporarily hold
frequently accessed data.
3. Advancements in the 1970s and 1980s:
◦ Cache memory became common in mainframes and minicomputers.
◦ Introduction of multi-level cache systems (L1 and L2) to further improve
speed.
◦ Processors began including direct-mapped and associative caches for
faster data retrieval.
4. Widespread Use in Microprocessors (1990s):
◦ Cache was integrated into CPUs, starting with Intel's Pentium processors.
◦ Multi-level cache hierarchies (L1, L2, L3) were introduced to handle
increasing CPU speeds and workload demands.
5. Modern Cache Systems (2000s-Present):
◦ Multi-core processors and advanced parallelism increased the importance
of cache systems.
◦ Smart cache systems with advanced algorithms, like prefetching and
predictive models, emerged.
◦ Development of shared caches for multi-core systems, alongside
techniques like split instruction and data caches (Harvard architecture).
Case study 2
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Need for Cache Coherency:
Cache coherence is crucial in systems with multiple processors (or cores) that share
memory. Each processor may have its own local cache. Without proper management,
inconsistencies can arise, causing incorrect program execution. Cache coherency ensures
data consistency across caches.
Reasons for Cache Coherency:
1. Shared Data Access:
◦ Multiple processors accessing the same memory location can lead to one
cache having outdated or stale data.
◦ Coherency ensures all caches see the most recent value.
2. Improved Performance:
◦ Without coherence, every data modi cation would require a direct memory
access, slowing down the system.
◦ Coherency protocols optimise performance by reducing memory access
delays.
3. Avoiding Race Conditions:
◦ In concurrent environments, race conditions can occur if caches hold
different values for the same data. Coherence avoids these issues.
4. Program Correctness:
◦ Many applications, particularly in multi-threaded systems, rely on
consistent memory states for correctness.
Cache Coherency Mechanisms:
1. Write-through Policy:
◦ All write operations are propagated to the main memory, ensuring
consistency.
2. Write-back Policy:
◦ Writes are performed in the cache and updated in memory only when data
is evicted.
3. Coherency Protocols:
◦ MESI Protocol: Maintains Modi ed, Exclusive, Shared, and Invalid states
for cache lines.
◦ MOESI Protocol: Extends MESI with an "Owned" state for shared
modi cations.
◦ Directory-based Protocols: Use centralised directories to track cache line
states.
In summary, cache coherence ensures that multi-core processors can collaborate
ef ciently and correctly, a necessity in modern high-performance computing.
Case study 3
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History of Microprocessors:
1. Early Development (1960s-1970s):
◦ 1960s: The concept of integrated circuits laid the groundwork for
microprocessors. Engineers began combining transistors onto a single chip.
◦ 1971: Intel introduced the Intel 4004, the world's rst commercial
microprocessor. It was a 4-bit processor designed for calculators.
◦ 1972: Intel released the 8008, an 8-bit microprocessor, for more advanced
applications like terminals.
◦ 1974: Intel introduced the 8080, a signi cant improvement with 8-bit
processing, used in early personal computers like the Altair 8800.
2. Advancements (Late 1970s-1980s):
◦ 1976: The Zilog Z80 was introduced, based on Intel's 8080, and became
widely popular in embedded systems.
◦ 1978: Intel launched the 8086, the rst 16-bit microprocessor, marking the
start of the x86 architecture.
◦ 1982: Intel released the 80286, a 16-bit processor with improved
performance and memory management features.
◦ 1985: The 80386 introduced 32-bit processing and multitasking
capabilities, becoming the basis for modern PCs.
3. Modern Microprocessors (1990s-Present):
◦ 1990s: Introduction of Pentium processors by Intel with superscalar
architecture and increased clock speeds.
◦ 2000s: Multi-core processors emerged to enhance parallel processing
capabilities.
◦ 2010s and beyond: Advanced architectures (like Intel Core and AMD
Ryzen) with features like hyper-threading, high-performance GPUs, and AI
accelerators.
Case study 4
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Di erence Between 8085 and
8086 Microprocessors:
Feature 8085 Microprocessor 8086 Microprocessor
Introductio
1976 1978
n Year
Architectur
8-bit microprocessor 16-bit microprocessor
e
Address 16-bit (can address 64 KB
20-bit (can address 1 MB memory)
Bus memory)
Data Bus 8-bit 16-bit
Instruction Smaller and simpler instruction More complex and versatile instruction
Set set set
8-bit general-purpose registers 16-bit general-purpose registers (AX,
Registers
(A, B, C, D, E, H, L) BX, CX, DX)
Memory
Supported (Code, Data, Stack, and Extra
Segmentati Not supported
segments)
on
Clock
Typically up to 3 MHz Typically up to 10 MHz
Speed
Mode of Operates in two modes: real mode and
Operates in single-mode (8-bit)
Operation protected mode
Interrupts 5 interrupts 256 interrupts
Co-
Supports co-processors like the 8087 for
processor No support for co-processors
oating-point operations
Support
Application Used in basic embedded systems Used in advanced computing systems,
s and early computing devices multitasking, and industrial applications
In summary, the 8085 is simpler and suited for basic tasks, while the 8086 introduced
more advanced features, including 16-bit processing and memory segmentation, marking
the evolution toward modern computing architectures.
Case study 5
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