Name:…………….
Group:……… Roll No………………
Dr B R Ambedkar National Institute of Technology, Jalandhar
B Tech 4th Semester (Computer Science &Engineering)
ECPC-252, Microprocessor and Microcontroller
Quiz 2 (Recall Type) – 24th April 2024
Total Time: 15 min (12.30 PM to 12.45 PM)
Note: Total questions are 15. All are compulsory. This quiz is of 5 marks.
1. The 8031 microcontroller has_____bytes of on-chip ROM.
2. 8051 microcontroller on power up, the stack pointer is pointing towards______memory
location
3. The value of carry flag is _____after the execution of following program.
CLR C
CPL C
4. In 8051, in the instruction LCALL the target address is limited to ___________Kbytes from
the present PC.
5. True or False. All 8051 jumps are short jumps. ______________.
6. True or False. In 8051 PUSH R0 is a legal instruction. ______________
7. Port_____of 8051 needs external pull-up resistors to function as an I/O port.
8. In 8051, SETB A is a____________(valid/invalid) instruction.
9. In 8051, _________address is assigned to R2 of bank 2.
10. What value must R4 have in order for the following 8051 instruction “CJNE R4, #53H,
OVER” not to jump?_____________.
11. ̅̅̅̅̅̅̅̅
𝑃𝑆𝐸𝑁 pin of 8051 is a___________(input/output) pin.
12. Mode______of 8253 can be used as a mono stable multi-vibrator?
13. GATE pin in 8253 is a___________(input/output) pin.
14. ___________________register in 8259 stores the bits required to mask the interrupt inputs.
15. True or False. ICW1 in 8259 is meant for issuing interrupt type no to 8086.
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Rough Work
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Dr B R Ambedkar National Institute of Technology, Jalandhar
B Tech 4th Semester (Computer Science &Engineering)
ECPC-252, Microprocessor and Microcontroller
Quiz 2 (Recall Type) 24th April 2024
Total Time: 15 min (12.30 PM to 12.45 PM)
Note: Total questions are 15. All are compulsory. This quiz is of 5 marks.
1. The program counter of 8051 is_____bits wide.
2. ______&_______bits of 8051 PSW register are used for the selection of register banks.
3. Does the stack of 8051 grows upwards or downwards? _______________.
4. In 8051, in the instruction ACALL the target address is limited to ___________Kbytes from
the present PC.
5. True or False. The target address of 8051 short jump is within -128 to +127 bytes of the
current PC. _________________
6. True or False. In 8051 POP 02H is a legal instruction. ______________
7. There are total_______ports in 8051.
8. True or False. In 8051 MOV A, @R2 is a legal instruction. ______________
9. In 8051, _________address is assigned to R2 of bank 0.
10. The status of carry flag is ___________(0/1) after the execution of following program.
CLR C
JNC OVER
CPL C
OVER:………
11. In port 3 of 8051, its ______&______pins are meant for RxD & TxD.
12. True or False. “Interrupt on start count” is the mode 0 of 8253. ______________
13. Mode________ of the Intel 8253 timer can generate a square wave?
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14. _____________________register in 8259 stores all the interrupt requests in it in order to
serve them one by one on a priority basis.
15. In a cascaded mode, a total of__________number of vectored interrupts provided by 8259.
_____________________________________________________________________________________
Rough Work
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Name: Group: Roll No
Dr B R Ambedkar National Institute of Technology, Jalandhar
B Tech 4th Semester (Computer Science &Engineering)
ECPC-252, Microprocessor and Microcontroller
Quiz - 1–5th March 2024
Total Time: 30 MIN (12.30 pm to 1.00 pm)
Note: Total questions are 30. All are compulsory.
This quiz is of 30 marks. These marks can be further scaled down to 15 or 10
1. In 8086 microprocessor, the address bus is bit wide.
A. 12bit B.10bit C.16bit D.20bit
2. The 16 bit flag of 8086 microprocessor is responsible to indicate
A. the condition of result of ALU operation
B. the condition of memory
C. the result of addition only
D. the result of subtraction only
3. The data bus of an 8085 microprocessor is_____.
A. Unidirectional
B. Bidirectional
C. Unidirectional and Bidirectional both
D. None of above
4. The register AX in 8086 is for medby grouping
A. AH&AL [Link]&BL [Link]&CL [Link]&DL
5. The number of status flags in 8085 are
A.5 B. 6 C. 8 D. 9
6. Which of the following is not a machine control flag in 8086?
A. Direction flag
B. Interrupt flag
C. Overflow flag
D. Trap flag
7. Which stack in 8085?
A. FIFO B. LIFO C. FILO D. LILO
8. Instruction Pointer (IP) of 8086 contains offset address of ________ segment.
A. Data segment
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B. Code segment
C. Stack segment
D. Extra segment
9. How many pins of 8085 microprocessor includes?
A. 28 B. 32 C. 40 D. 64
10. Direction flag is used with ____.
A. String instructions
B. Stack Instructions
C. Arithmetic Instructions
D. Branch Instructions
11. The address bus of 8085 microprocessor is____bit.
A. 8
B.20
C.16
D. 32
12. In FAR jump instruction of 8086 the following will happen
A. Only IP value is changed
B. Only CS value is changed
C. Both CS and IP values are changed
[Link] CS nor IP is changed
13. The BIU in 8086 contains FIFO register of size____bytes
A. 8 B. 6 C. 4 D. 12
14. In 8086, if_________ flag is set; the processor enters the single step execution mode.
A. Direction
B. Trap
C. Interrupt
D. Zero
15. If the status on 𝐷𝑇/𝑅̅ pin on 8086 is 1, then
A. buffers will be set up to transmit data from the 8086 to ROM, RAM, ports
B. buffers will be set up to allow data to come into 8086 from ROM, RAM, ports
C. buffers get disabled
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D. 8086 interrupts gets enabled
16. LDS instruction in 8086 copies two consecutive words from memory to register and______.
A. ES [Link] [Link] D. CS
17. SHR instruction of 8086 can be used to
A. divide unsigned byte or word by power of 2
B. divide signed byte or word by power of 2
C. multiply unsigned binary number by power of 2
D. multiply signed binary number by power of 2
18. The instruction that loads the AH register with the lower byte of the flag register is
A. SAHF
B. POPF
C. LAHF
D. PUSHF
19. The BIU prefetches the instruction from memory and store them in
A. queue B. register C. memory D. stack
20. In 8086, if segment address = 1005 H, offset address = 5555 H, then the physical address is-
_____.
A. 655A H
B. 155A5 H
C. 4550 H
D. 56555
21. In 8086 the overflow flag is set when______.
A. The sum is more than 16 bit
B. Carry and sign flags are set
C. Signed numbers go out of their range after an arithmetic operation
D. During subtraction
22. If MN/MX is low the 8086 operates in __________ mode.
A. Minimum
B. Maximum
C. Both a and b
D. Medium
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23. Upon the execution of FAR call instruction of 8086 the following will happen
A. SP is incremented by 2
B. SP is decremented by 2
C. SP is incremented by 4
D. SP is decremented by 4
24. In PUSH instruction, after each execution of the instruction, the stack pointer is
A. incremented by 1
B. decremented by 1
C. incremented by 2
D. decremented by 2
25. TheresultofMOVAL,65H istostore
A. 0100 0010 in AL
B. 42H in AL
C. 40H in AL
D. 0110 0101 in AL
26. If any interrupt will come to 8086, the following event will occur
A. IF and TF both are set
B. IF set and TF reset
C. IF reset and TF set
D. IF and TF both reset
27. BHE signal in 8086 is used to indicate
A. the transfer of data over higher order data bus (D8 – D15)
B. the transfer of data over lower order data bus (D0 – D7)
C. the transfer of address over higher order address bus (A8 – A15)
D. the transfer of address over lower order address bus (A0 –A7)
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28. In 8086, if the size of the segment is 64 kb, what will be the starting and ending off set
addresses of it
A. 0000H to 7FFFH
B. 0000H to FFFFH
C. 8000H to FFFFH
D. 00000H to FFFFFH
29. In 8086 break point interrupt is generated by
A. Setting the DF
B. Setting the TF
C. Executing INT 3 instruction
D. None of above
30. ______register is used as a default counter in case of string and loop instructions of 8086.
A. AX B. BX C. CX D. DX
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ROUGH WORK
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Name:……………. Group:……… Roll No………………
Dr B R Ambedkar National Institute of Technology, Jalandhar
B Tech 4th Semester (Computer Science &Engineering)
ECPC-252, Microprocessor and Microcontroller
Quiz - 1 – 5th March 2024
Total Time: 30 min (12.30 PM to 1.00 PM)
Note: Total questions are 30. All are compulsory.
This quiz is of 20 marks. These marks can be further scaled down to 15 or 10
1. The data bus of an 8085 microprocessor is_____.
A. Unidirectional
B. Bidirectional
C. Unidirectional and Bidirectional both
D. None of above
2. The address bus of 8085 microprocessor is____bit.
A. 8
B. 20
C. 16
D. 32
3. The number of status flags in 8085 are
A. 5 B. 6 C. 8 D. 9
4. How many pins of 8085 microprocessor includes?
A. 28 B. 32 C. 40 D. 64
5. Which stack in 8085?
A. FIFO B. LIFO C. FILO D. LILO
6. In 8086 microprocessor, the address bus is bit wide.
A. 12 bit B. 10 bit C. 16 bit D. 20 bit
7. The register AX in 8086 is formed by grouping
A. AH & AL B. BH & BL C. CH & CL D. DH & DL
8. The 16 bit flag of 8086 microprocessor is responsible to indicate
A. the condition of result of ALU operation
B. the condition of memory
C. the result of addition only
D. the result of subtraction only
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9. The BIU in 8086 contains FIFO register of size____bytes
A. 8 B. 6 C. 4 D. 12
10. The BIU prefetches the instruction from memory and store them in
A. queue B. register C. memory D. stack
11. Instruction Pointer (IP) of 8086 contains offset address of ________ segment.
A. Data segment
B. Code segment
C. Stack segment
D. Extra segment
12. Direction flag is used with ____.
A. String instructions
B. Stack Instructions
C. Arithmetic Instructions
D. Branch Instructions
13. In 8086, if_________ flag is set; the processor enters the single step execution mode.
A. Direction
B. Trap
C. Interrupt
D. Zero
14. In 8086, if segment address = 1005 H, offset address = 5555 H, then the physical address is-
_____.
A. 655A H
B. 155A5 H
C. 4550 H
D. 56555
15. In 8086, if the size of the segment is 64 kb, what will be the starting and ending off set
addresses of it
A. 0000H to 7FFFH
B. 0000H to FFFFH
C. 8000H to FFFFH
D. 00000H to FFFFFH
16. ______register is used as a default counter in case of string and loop instructions of 8086.
A. AX B. BX C. CX D. DX
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17. Which of the following is not a machine control flag in 8086?
A. Direction flag
B. Interrupt flag
C. Overflow flag
D. Trap flag
18. In 8086 the overflow flag is set when______.
A. The sum is more than 16 bit
B. Carry and sign flags are set
C. Signed numbers go out of their range after an arithmetic operation
D. During subtraction
19. In PUSH instruction, after each execution of the instruction, the stack pointer is
A. incremented by 1
B. decremented by 1
C. incremented by 2
D. decremented by 2
20. LDS instruction in 8086 copies two consecutive words from memory to register and______.
A. ES B. DS C. SS D. CS
21. The instruction that loads the AH register with the lower byte of the flag register is
A. SAHF
B. POPF
C. LAHF
D. PUSHF
22. If MN/MX is low the 8086 operates in __________ mode.
A. Minimum
B. Maximum
C. Both a and b
D. Medium
23. If any interrupt will come to 8086, the following event will occur
A. IF and TF both are set
B. IF set and TF reset
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C. IF reset and TF set
D. IF and TF both reset
24. In 8086 break point interrupt is generated by
A. Setting the DF
B. Setting the TF
C. Executing INT 3 instruction
D. None of above
25. In FAR jump instruction of 8086 the following will happen
A. Only IP value is changed
B. Only CS value is changed
C. Both CS and IP values are changed
D. Neither CS nor IP is changed
26. Upon the execution of FAR call instruction of 8086 the following will happen
A. SP is incremented by 2
B. SP is decremented by 2
C. SP is incremented by 4
D. SP is decremented by 4
27. The result of MOV AL, 65H is to store
A. 0100 0010 in AL
B. 42H in AL
C. 40H in AL
D. 0110 0101 in AL
28. BHE signal in 8086 is used to indicate
A. the transfer of data over higher order data bus (D8 – D15)
B. the transfer of data over lower order data bus (D0 – D7)
C. the transfer of address over higher order address bus (A8 – A15)
D. the transfer of address over lower order address bus (A0 –A7)
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29. If the status on 𝐷𝑇/𝑅̅ pin on 8086 is 1, then
A. buffers will be set up to transmit data from the 8086 to ROM, RAM, ports
B. buffers will be set up to allow data to come into 8086 from ROM, RAM, ports
C. buffers get disabled
D. 8086 interrupts gets enabled
30. SHR instruction of 8086 can be used to
A. divide unsigned byte or word by power of 2
B. divide signed byte or word by power of 2
C. multiply unsigned binary number by power of 2
D. multiply signed binary number by power of 2
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Rough Work
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Name:……………. Group:……… Roll No………………
Dr B R Ambedkar National Institute of Technology, Jalandhar
B Tech 4th Semester (Computer Science &Engineering)
ECPC-252, Microprocessor and Microcontroller
Quiz 3 (Recall Type) 8th May 2024
Total Time: 10 min (12.30 PM to 12.40 PM)
Note: Total questions are 10. All are compulsory. This quiz is of 5 marks.
1. What is the frequency of the clock that is being used as the clock source for the timer?
(a) some externally applied frequency f’
(b) controller’s crystal frequency f
(c) controller’s crystal frequency /12
(d) externally applied frequency/12
2. TMOD register of 8051 is__________addressable.
3. True or False. D4 and D5 bits of TMOD register are meant for selecting modes of timer 1.
_______________.
4. In mode 1 operation of timer, the counter rolls over when it goes from_______to________.
5. ___________bit of TMOD register decides how to start or stop the timers.
6. Timer______of the 8051 is used to set the baud rate in serial com port programming.
7. SMOD bit belongs to_____________register of 8051.
8. True or False. There is a single interrupt in the interrupt vector table assigned to both external
hardware interrupts of 8051.
9. What address in the interrupt vector table is assigned to serial interrupt?____________
10. True or False. Bit TI in SCON register of 8051 is raised when SBUF register is loaded
with a character for transmission.
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_____________________________________________________________________________________
Rough Work
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Name:……………. Group:……… Roll No………………
Dr B R Ambedkar National Institute of Technology, Jalandhar
B Tech 4th Semester (Computer Science &Engineering)
ECPC-252, Microprocessor and Microcontroller
Quiz 3 (Recall Type) 8th May 2024
Total Time: 10 min (12.30 PM to 12.40 PM)
Note: Total questions are 10. All are compulsory. This quiz is of 5 marks.
1. What is the clock source for the timers in 8051? Tick mark the correct option
(a) some external crystal applied to the micro-controller for executing the timer
(b)from the crystal applied to the micro-controller
(c) through the software
(d)through programming
2. What is the function of the TMOD register of 8051? Tick mark the correct option
(a) TMOD register is used to set various operation modes of timer/counter
(b) TMOD register is used to load the count of the timer
(c) Is the destination or the final register where the result is obtained after the operation of the timer
(d) Is used to interrupt the timer
3. True or false. D0 to D3 bits of TMOD register are assigned to program timer 1 of 8051.___________.
4. In mode 2 operation of 8051 timer, the counter rolls over when it goes from_______to________.
5. ___________bit of TMOD register when modified make each of the 8051 timers operate as counters.
6. Mode_______ of 8051 timer is used to set the baud rate in serial com port programming.
7. True or false. SCON register of 8051 is bit-addressable.
8. True or false. Upon reset, the external hardware interrupt of 8051 is low-level triggered.
9. What address in the interrupt vector table is assigned to timer 1 interrupt?____________
10. True or False. Bit RI in SCON register of 8051 is raised when a received character is loaded into
SBUF register.
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_____________________________________________________________________________________
Rough Work
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ECPC 252 (SECTION 2)
Assignment 1
Q1 Write and explain all the 8086 assembly language instructions in terms of
(i) working operation
(ii) addressing mode
(iii) flags affected
(iv) no. of bytes
(v) examples
Assignment 2
Q1 Write the syntax of all 8051 assembly language instructions.
Q2 Explain the working, pin diagram and architecture of DMA controller.
Q3 Explain the working, pin diagram and architecture of 8087 math co-processor.
