Solution of Assignment 2

CMOS Analog IC Design

Prepared by Sachin Kumar(S23100)
Instructor : Prof. Hitesh Shrimali
School: SCEE (IIT MANDI)
September 20, 2025

Problem Statement
[Link] all MOSFETs are in saturation, calculate
the small signal voltage gain of each circuit in Fig. 1.
Assume all devices have a gm of 2 mS, gds of 150 S, and
gmb of 0 S.
(a)
Given Data-
gm = 2 mS, gds = 150 µS, gmb = 0 S

1 1
ro = = = 6.67 × 10−3 Ω = 6.67 kΩ
gds 150 µS

Av = gm1 [ro1 ∥ (gm2 ro2 ro3 )]

gm2 ro2 ro3 = 2 mS × 6.67 kΩ × 6.67 kΩ = 88.977 kΩ

Rout = ro1 ∥ (gm2 ro2 ro3 ) = 6.67 kΩ ∥ 88.977 kΩ = 5.58 kΩ

 
1 1
Gm = gm + = 2 mS + = 2.15 mS
ro 6.67 kΩ

Av = Gm × Rout = 2.15 mS × 5.58 kΩ = 11.997

If Gm = gm1 = 2 mS,
Av = 2 mS × 5.58 kΩ = 11.16

1
(b)
 
1 1
Rout = ∥ gm2 ro2 ∥
gm3 gm1
gm1 gm2 ro2
Gm =
1 + ro2 (gm1 + gm2 )
If all transistors are identical:
gm
Gm = = 1 mS
2

Rout = 0.5 kΩ ∥ 6.67 kΩ = 0.465 kΩ

Av = Gm × Rout = 1 mS × 0.465 kΩ = 0.465

(c)
From circuit simplification: For Gm , we can simplify the circuit as:
iout
− − (iout − gm2 vin )ro2 = 0
gm3

iout
− = (iout ro2 − gm2 vin ro2 )
gm3
 
1
gm2 vin ro2 = iout ro2 +
gm3
iout gm2 ro2
Gm = = 1
vin ro2 + gm3
2 mS × 6.67 kΩ
Gm = = 1.86 mS
6.67 kΩ + 0.5 kΩ
1 1
Rout = ∥ = 0.5 kΩ ∥ 0.5 kΩ = 0.25 kΩ
gm1 gm2

Av = Gm × Rout = 1.86 mS × 0.25 kΩ = 0.465

2
 Figure 1:

(d)
Rout = ro3 ∥ (gm2 ro2 ro1 ) = 5.58 kΩ
For Gm , when Vout = 0:

Vs = Iout ro1

Figure 2:

iout ro1
gm2 (Vin − iout ro1 ) = iout +
ro2

3
  
ro1
gm2 Vin = iout gm2 ro1 + +1
ro2
iout gm2
= 
Vin 1 + gm2 ro1 + ro1
ro2

iout gm2 ro2

Gm = =
vin ro1 + ro2 + gm2 ro2 ro1

Figure 3:

If ro1 = ro2 = ro :
gm ro
Gm = = 0.1304 mS
2ro + gm ro2

Av = Gm × Rout = 0.1304 mS × 5.58 kΩ = 0.727

4
[Link] a multiplexer circuit that can select one sig-
nal out of the available four signals. The available input
signals are DC, sine wave, triangular wave and square
wave. There is only a single push-button available to
select one of the input signals.
Solution 2.

CLK 2-bit
Counter G0 -G3

G0
Sine
G1
DC
G2 Output
Square
G3
Triangle

Figure 4: Caption

Q3. Draw the equivalent circuit model of a wire at ex-

tremely high frequency (1 THz) and at extremely low
frequency ( 1 mHz).
Circuit model is composed of parasitic resistance, ca-
pacitance and inductance.

Solution 3.
At high frequency, parasitic effects will be dominant:

5
 Vin R Vout

Figure 5:

At low frequency, inductive effects can be seen:

Vin R L
+
Vout
-

Figure 6:

Q4. Explain the role of the decoupling capacitor and

the AC-coupling capacitor in different circuits.
Solution 4. Basic functionality of a capacitor:
• Passes only AC signals.

• Blocks DC signals.

Decoupling capacitor:
1. Also known as bypass capacitor.

2. Used to bypass AC signals from the main path.

3. Connected in parallel with supply rail (i.e. VDD or GND).

AC coupling capacitor:
1. Also known as DC blocking capacitor.

2. Used to block DC signals and only passes pure AC signals.

3. Connected in series with the circuit.

4. Or connected between two circuits to block DC and pass pure AC signals.

6
 Figure 7:

Q5. Draw the internal circuit of a type coupling of

an oscilloscope where the three couplings (AC, DC and
ground) are selected.

AC Coupling

GND

Figure 8:

Q6. Considering a large signal (rail-to-rail) as an in-

put for Fig. 2, draw the output response with values at
nodes; Vx, Vy and Vz. Assuming geometries of all the
transistors are identical. The transistors are of TSMC
45 nm CMOS technology (Vdd = 1 V, Vss = 0 V).

Figure 9: Circuit of Fig. 2

7
Ans6. Since the geometry of all the transistors are identical,
Let ro1 = ro2 = ro3 = ro4

Vx = 1V

ro2

Vy =0.66V

ro3

Vz =0.33V

ro4

Figure 11: Output response for Fig. 2

Figure 10: Small-signal
model for Fig. 2

Assume = VDS (SAT ) : 250 mV & VT h : 200 mV

Q7
(a) For Fig. 2, at a typical corner, determine the value of the output voltage at the node Vout .

(b) Assuming a variation in the resistor by 20% of Fig. 2, determine the value of the output
voltage at the node Vout . Draw the time response.

(c) For Fig. 3, at slow and fast corners of transistors, determine the value of the output voltage
at the node Vout . Draw the time response.

Figure 12:

8
[Link] Mode / Typical Corner:

X a b c
Typical 0.5 0.5 0.5 0.5
FF 0.5 >0.5 <0.5 >0.5

Due to which net output voltage increases, the Vth of M1 .

X a b c
Typical 0.5 0.5 0.5 0.5
SF 0.5 >0.5 <0.5 >0.5

Due to which the output voltage will increase , the Vth of M1 .

Steady State: 0.5 0.5 0.5 0.5

20
R1 and R2 increase 20%, R1 = R2 = 10 × 100 :

0.5 0.5 0.5 0.5

Now R1 and R2 decrease 20%:

0.5 0.5 0.5 0.5

If R1 increases 20% and R2 decreases 20%, then:

X a b c
0.4 >0.5 <0.5 >0.5

Due to it,Vout increase , theVth of M1.

If R1 decrease 20% and R2 increase 20% , then

X a b c
0.6 <0.5 >0.5 <0.5

Due to it , Vout decrease, the Vth of M1

9
 Figure 13:

Q8(Q5 of assignment 2 exam )Using small-signal model, determine

the impedances for the following circuit:
For MOSFET small-signal model:
vds vt
id = gm vgs + , Rout = .
ro it

Fig. 3(a) — Regulated / Wilson / Regulated-Cascode Mirror

impedence by lookinig from IREF
1
impedence@ Iref = (1)
gm3
Apply test voltage vt at the output: the impedences at the Iref branch
vt vt
it = +
ro3 gm2 ro2 ro1

10
  −1
(3a) 1 1
Rout = +
ro3 gm2 ro2 ro1
For gm2 ro2 ro1 ≫ ro3 :

(3a)
Rout ≈ gm2 ro2 ro1

Fig. 3(b) — Mirror with Explicit Amplifier

vt
it = − gm,out Avt
ro2
(3b) 1
Rout = 1
ro2 − gm,out A
Define loop gain T = gm,out ro2 A:
(3b) ro2
Rout =
1+T
For gm,a ro,a ≫ 1:

(3b)
Rout ≈ (gm,a ro,a ) ro2

Summary
(3a)
Rout ≈ gm2 ro2 ro1

(3b)
Rout ≈ (gm,a ro,a ) ro2

Derivation of Output Impedance in Current Mirrors

1. Fig. 3(a): Regulated Cascode Current Mirror
We want the impedance seen at the node where IREF is mirrored (i.e., the drain of the mirror
transistor).
Step 1: Apply a test voltage. Apply a small test voltage vx at the node and measure the
test current it :
vx
Rout = .
it
Step 2: Identify small-signal paths.
vx vx
iro1 = , iro2 = , igm2 = gm2 vx .
ro1 ro2
Step 3: Total current.
vx vx
it = + + gm2 vx .
ro1 ro2
Step 4: Output resistance.
vx 1
Rout = = .
it 1 1
+ + gm2
ro1 ro2

11
 For gm2 ro2 ≫ 1 and ro2 ≫ ro1 : impedence from IREF which is used in current mirroring :
1
impedance@Iref = (2)
gm3
—

2. Fig. 3(a): Third Branch (Final Output)

At the third branch, the regulating action cascades again through the output device M3 with
transconductance gm3 and output resistance ro3 .

Rout ≈ Rmid · (1 + gm3 ro3 )

where Rmid ≈ gm2 ro2 ro1 .
Thus,
Rout ≈ gm3 ro3 · gm2 ro2 ro1 .
—

3. Fig. 3(b): Gain-Boosted Mirror

If an amplifier with gain A enhances the regulating action, the effective impedance is multiplied by
the amplifier loop gain.

Rout ≈ A · ro1 (1 + gm2 ro2 ).

For large gm2 ro2 :
Rout ≈ A gm2 ro2 ro1 .
—

Final Results (Summary)

Fig. 3(a), mirrored node: Rout ≈ gm2 ro2 ro1 ,

Fig. 3(a), third branch: Rout ≈ gm3 ro3 gm2 ro2 ro1 ,

Fig. 3(b), gain-boosted: Rout ≈ A gm2 ro2 ro1 .

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