Ex. No.

: 1
REALISATION OF LOGIC GATES
Date:

AIM:

To verify and interpret the realisation of logic functions and truth tables of basic gates AND,
OR, NOT, NAND, NOR, XOR, and XNOR using suitable logic circuit implementations.

THEORY:

Logic gates are the basic building blocks of any digital system. Logic gates are electronic circuits
having one or more than one input and only one output. The relationship between the input
and the output is based on a certain logic. Based on this, logic gates are named as

➢ AND gate

➢ OR gate

➢ NOT gate

➢ NAND gate

➢ NOR gate

➢ Ex-OR gate

➢ Ex-NOR gate

AND GATE

The AND gate is an electronic circuit that gives a high output (1) only if all its inputs are
high. A dot (.) is used to show the AND operation i.e. A.B or can be written as AB

Y= A.B
INPUT OUTPUT
A B A.B
0 0 0
0 1 0
1 0 0
Figure 1: Logic Symbol of AND Gate
1 1 1
Table 1: Truth Table of AND Gate

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OR GATE

The OR gate is an electronic circuit that gives a high output (1) if one or more of its inputs are
high. A plus (+) is used to show the OR operation.

Y= A+B INPUT OUTPUT

A B Y=A+B
0 0 0
0 1 1

Figure 2: Logic Symbol of OR Gate 1 0 1

1 1 1
Table 2: Truth Table of OR Gate

NOT GATE

The NOT gate is an electronic circuit that produces an inverted version of the input at its
output. It is also known as an inverter. If the input variable is A, the inverted output is known
as NOT A. This is also shown as A' or A with a bar over the top, as shown at the outputs.

Y= A' INPUT OUTPUT

A Y= A'
0 1

Figure 3: Logic Symbol of NOT Gate 1 0

Table 3: Truth Table of NOT Gate

NAND GATE

This is a NOT-AND gate which is equal to an AND gate followed by a NOT gate. The outputs of
all NAND gates are high if any of the inputs are low. The symbol is an AND gate with a small
circle on the output. The small circle represents inversion.

Y= AB
INPUT OUTPUT
A B Y= AB
0 0 1

Figure 4: Logic Symbol of NAND Gate 0 1 1

1 0 1
1 1 0
Table 4: Truth Table of NAND Gate

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NOR GATE

This is a NOT-OR gate which is equal to an OR gate followed by a NOT gate. The outputs of all
NOR gates are low if any of the inputs are high. The symbol is an OR gate with a small circle
on the output. The small circle represents inversion.

Y= A+B INPUT OUTPUT

A B Y= A+B
0 0 1
0 1 0

Figure 5: Logic Symbol of NOR gate 1 0 0

1 1 0

Table 5: Truth Table of NOR gate

EX-OR GATE

The 'Exclusive-OR' gate is a circuit which will give a high output if either, but not both of its
two inputs are high. An encircled plus sign (⊕) is used to show the Ex-OR operation.

INPUT OUTPUT
Y= A⊕B
A B Y= A⊕B
0 0 0
0 1 1
1 0 1
Figure 6: Logic Symbol of Ex-OR gate
1 1 0

Table 6: Truth Table of Ex-OR gate

EX-NOR GATE

The 'Exclusive-NOR' gate circuit does the opposite to the EX-OR gate. It will give a low output
if either, but not both of its two inputs are high. The symbol is an EX-OR gate with a small circle
on the output. The small circle represents inversion.

Y= A⊕B INPUT OUTPUT

A B Y= A⊕B
0 0 1
0 1 0
1 0 0
Figure 7: Logic Symbol of Ex-NOR gate
1 1 1
Table 7: Truth Table of Ex-NOR gate

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RESULT:

Thus the Digital Logic Gates are verified by using Proteus.

Ex. No. : 2

4
 Date : REALISATION OF UNIVERSAL GATES
[NAND and NOR]

AIM:

To implement the logic functions of AND, OR, NOT, Ex-OR, Ex- NOR and a logical expression
with the help of NAND and NOR universal gates respectively.

THEORY:

Logic gates are electronic circuits that perform logical operations on input signals to produce
an output. There are seven basic logic gates. Listing every possible input combination and its
corresponding output forms a truth table.

NAND Gate as a Universal Gate

A NAND gate is an AND gate followed by a NOT gate, so its output is the inverted AND output.
With at least two inputs, it can be used to build every other logic function—AND, OR, NOT,
XOR, XNOR, and NOR. Hence, the NAND gate is called a universal gate.

NAND gates as
logic Functions Truth Tables
OR gate From DeMorgan’s theorems: INPUT OUTPUT
(A.B)’ = A’ + B’ A B Y=A+B
(A’.B’)’ = A’’ + B’’ = A + B 0 0 0
So, give the inverted inputs to a NAND gate,
0 1 1
obtain OR operation at output.
1 0 1
1 1 1

AND gate A NAND produces complement of AND gate.

So, if the output of a NAND gate is inverted, INPUT OUTPUT
overall output will be that of an AND gate. A B Y=A.B
0 0 0
Y = ((A.B)’)’
0 1 0
Y = (A.B)
1 0 0
1 1 1

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 Ex-OR gate The output of a two input Ex-OR gate is
INPUT OUTPUT
Y = A’B + AB’. Y = A’B + AB’
A B
0 0 0
0 1 1
1 0 1
1 1 0
Ex-NOR Ex-NOR gate is actually Ex-OR gate followed INPUT OUTPUT
gate by NOT gate. So, give the output of Ex-OR A B Y = AB+ A’B’
gate to a NOT gate, overall output is that of
0 0 1
an Ex-NOR gate.
0 1 0
Y = AB+ A’B’ 1 0 0
1 1 1

NOR Gate as a Universal Gate

A NOR gate is an OR gate followed by a NOT gate, so its output is the complement of the OR
gate’s output. It requires at least two inputs. Using only NOR gates, we can implement all logic
functions—AND, OR, NOT, XOR, XNOR, and NAND. Therefore, the NOR gate is also known as a
universal gate.

NOR gates as
logic Functions Truth Table
INPUT OUTPUT
OR gate A NOR produces complement of OR gate. So,
A B Y=A+B
if the output of a NOR gate is inverted, overall
output will be that of an OR gate. 0 0 0
0 1 1
Y = ((A+B)’)’
1 0 1
Y = (A+B)
1 1 1

AND gate From DeMorgan’s theorems: INPUT OUTPUT

(A+B)’ = A’B’ A B Y=A.B
(A’+B’)’ = A’’B’’ = AB 0 0 0
So, give the inverted inputs to a NOR gate,
0 1 0
obtain AND operation at output.
1 0 0
1 1 1

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Ex-OR gate Ex-OR gate is actually Ex-NOR gate followed INPUT OUTPUT
by NOT gate. So give the output of Ex-NOR Y = A’B +
A B
gate to a NOT gate, overall output is that of AB’
an Ex-OR gate. 0 0 0
0 1 1
Y = A’B+ AB’ 1 0 1
1 1 0
INPUT OUTPUT
Ex-NOR The output of a two input Ex-NOR gate is
Y = AB+
gate shown by: Y = AB + A’B’. A B
A’B’
0 0 1
0 1 0
1 0 0
1 1 1

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RESULT:

Thus the Digital Logic Gates are verified by using Proteus.

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 Ex. No. : 3 CODE CONVERSION
Date : [BCD to Gray & Gray to BCD]

AIM:

To analyze the truth tables for binary-to-Gray and Gray-to-binary converters using
NAND gate combinations, and to understand their operations.

THEORY:

Binary numbers are the standard way to store data, but in some applications they can be
difficult to use. Gray code is a modified binary system where each successive value differs
from the previous one by only one bit. This prevents errors that may occur during transitions
between binary numbers, since only a single bit changes at a time.

Because of this property, Gray code allows smooth state transitions with minimal error risk. It
is used in K-maps, error correction, communication systems, and more.

In computer science, we often need to convert Binary to Gray and Gray to Binary. These
conversions follow simple rules.

i. Binary to Gray conversion:

1. The Most Significant Bit (MSB) of the gray code is always equal to the MSB of the given
binary code.
2. Other bits of the output gray code can be obtained by Ex-ORing binary code bit at that
index and previous index.

There are four inputs and four outputs. The input variable are defined as B3, B2, B1, B0 and
the output variables are defined as G3, G2, G1, G0. From the truth table, combinational
circuit is [Link] logical expressions are defined as :

B3 = G3

B2 ⊕ B3 = G2

B1 ⊕ B2 = G1

B0 ⊕ B1 = G0

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 Natural Binary Code Gray Code
B3 B2 B1 B0 G3 G2 G1 G0
0 0 0 0 0 0 0 0
0 0 0 1 0 0 0 1
0 0 1 0 0 0 1 1
0 0 1 1 0 0 1 0
0 1 0 0 0 1 1 0
0 1 0 1 0 1 1 1
0 1 1 0 0 1 0 1
0 1 1 1 0 1 0 0
1 0 0 0 1 1 0 0
1 0 0 1 1 1 0 1
1 0 1 0 1 1 1 1
1 0 1 1 1 1 1 0
1 1 0 0 1 0 1 0
1 1 0 1 1 0 1 1
1 1 1 0 1 0 0 1
1 1 1 1 1 0 0 0
Table 1: Truth Table of Binary to Gray code converter

ii. Gray to binary conversion:

[Link] Most Significant Bit (MSB) of the binary code is always equal to the MSB of the given
binary number.

[Link] bits of the output binary code can be obtained by checking gray code bit at that index.
If current gray code bit is 0, then copy previous binary code bit, else copy invert of previous
binary code bit.

There are four inputs and four outputs. The input variable are defined as G3, G2, G1, G0 and
the output variables are defined as B3, B2, B1, B0. From the truth table, combinational circuit
is designed. The logical expressions are defined as :

G0 ⊕ G1 ⊕ G2 ⊕ G3 = B0

G1 ⊕ G2 ⊕ G3 = B1

G2 ⊕ G3 = B2

G3 = B3

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 Gray Code Natural Binary Code
G3 G2 G1 G0 B3 B2 B1 B0
0 0 0 0 0 0 0 0
0 0 0 1 0 0 0 1
0 0 1 0 0 0 1 1
0 0 1 1 0 0 1 0
0 1 0 0 0 1 1 1
0 1 0 1 0 1 1 0
0 1 1 0 0 1 0 0
0 1 1 1 0 1 0 1
1 0 0 0 1 1 1 1
1 0 0 1 1 1 1 0
1 0 1 0 1 1 0 0
1 0 1 1 1 1 0 1
1 1 0 0 1 0 0 0
1 1 0 1 1 0 0 1
1 1 1 0 1 0 1 1
1 1 1 1 1 0 1 0
Table 2: Truth Table of Gray code to Binary converter

RESULT:

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Thus the Digital Logic Gates are verified by using Proteus.

Ex. No. : 4 CONSTRUCTION AND VERIFICATION OF HALF/ FULL

Date : ADDER OPERATIONS

AIM:

To construct half adder and full adder circuits using XOR and NAND gates, and to verify their
operation by checking the correctness of their truth tables and output behaviour.

THEORY:

Adders are digital circuits designed to perform numerical addition and form a core part of the
arithmetic logic unit (ALU). They can be built for various number systems such as Binary, BCD,
Excess-3, and Gray code, though binary addition is the most commonly used. Beyond
addition, adders also play important roles in tasks like table index computation and address
decoding.

Binary addition follows principles similar to decimal addition. The basic binary addition rules
are shown below.

0 0 1 1
+ 0 + 1 + 0 + 1
_______ _______ _______ ______________

0 1 1 (Carry) 1 0
Figure 1. Schematic representation of half adder

HALF ADDER:

A half adder is a combinational circuit that adds two single-bit binary numbers. Let the inputs
be A and B, and the outputs be Sum and Carry. The block diagram and truth table reflect these
inputs and outputs.

INPUT OUTPUT
A B Sum Carry
0 0 0 0
0 1 1 0
1 0 1 0
1 1 0 1

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 Figure 2. Block diagram and truth table of half adder

The Sum output behaves like an XOR operation, and the Carry output behaves like an AND
operation. This can be confirmed using Karnaugh Maps. The truth table and K Map
simplification and logic diagram for sum output is shown below.

• Sum = A B' + A' B

• Carry = A B

INPUT OUTPUT
A B SUM= A ⊕ B

0 0 0
0 1 1
1 0 1
1 1 0

Figure 3. Truth table, K Map simplification and Logic diagram for sum output of half adder

Thus, for inputs A and B:

• Sum (S) = A ⊕ B
• Carry (C) = A · B

The truth table and K Map simplification and logic diagram for carry is shown below.

INPUT OUTPUT
A B Carry= A ⊕ B

0 0 0
0 1 1
1 0 1
1 1 0

Figure 4. Truth table, K Map simplification and Logic diagram for sum output of half adder

Using these functions, the half adder logic circuit is constructed with one XOR gate for Sum
and one AND gate for Carry.

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FULL ADDER:

A full adder is a digital circuit that adds three binary bits. Unlike a half adder, it includes an
extra input—the carry-in (CIN)—from the previous stage. The outputs are the Sum (S) and
the Carry-out (COUT).

Inputs: A, B, CIN

Outputs: S, COUT

The block diagram of a full adder with A, B and CIN as inputs and S, Carry OUT as outputs is
shown below

INPUT OUTPUT
A B Cin Sum Carry
0 0 0 0 0
0 0 1 1 0
0 1 0 1 0
0 1 1 0 1
1 0 0 1 0
1 0 1 0 1
1 1 0 0 1
1 1 1 1 1

Figure 5. Full Adder Block Diagram and Truth Table

Using the truth table, the Boolean expressions are:

• Sum (S) = A'B'Cin + A'BCin' + AB'Cin' + ABCin

• Carry-out (COUT) = AB + ACIN + BCIN

Figure 10. The K-Map simplified equation for sum and COUT

Sum (S) = A'B'Cin + A'BCin' + AB'Cin' + ABCin Carry-out (COUT) = AB + ACIN + BCIN

To implement the circuit:

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 • Sum requires four 3-input AND gates and one 4-input OR gate.
• COUT requires three 2-input AND gates and one 3-input OR gate.

RESULT:

Thus the Digital Logic Gates are verified by using Proteus.

Ex. No. : 5 CONSTRUCTION AND VERIFICATION OF

Date : HALF SUBTRACTOR AND FULL SUBTRACTOR

AIM:

To construct half subtractor and full subtractor circuits using basic logic gates and to verify
their operation by analyzing their truth tables and output behavior.

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THEORY:

A subtractor is a digital circuit that subtracts one binary number from another. Like adders,
subtractors produce two outputs: Difference and Borrow (similar to carry-in for adders). There
are two types of subtractors:

• Half Subtractor
• Full Subtractor

HALF SUBTRACTOR

A half subtractor is a combinational circuit that subtracts one single-bit value from another. It
has two inputs—A (minuend) and B (subtrahend)—and two outputs: Difference and Borrow.

From the truth table:

• Difference = A ⊕ B
• Borrow = A' B

INPUT OUTPUT
A B Difference Borrow

0 0 0 0
0 1 1 1
1 0 1 0
1 1 0 0

Figure 1. The Logic symbol and Truth Table of Half Subtractor

FULL SUBTRACTOR:

A full subtractor is a combinational circuit that performs the subtraction of three bits: A
(minuend), B (subtrahend), and Bin (borrow-in). It generates two outputs: D (Difference) and
Bout (Borrow-out).

From the truth table, the Boolean expressions are:

• D = A ⊕ B ⊕ Bin
• Bout = A'Bin + A'B + BBin

Using these equations, the full-subtractor circuit can be constructed.

A B Bin D Bout
0 0 0 0 0

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 0 0 1 1 1
0 1 0 1 1
0 1 1 0 1
1 0 0 1 0
1 0 1 0 0
1 1 0 0 0
1 1 1 1 1

Figure 2. The Logic symbol and Truth Table of Full Subtractor

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RESULT:

Thus the Digital Logic Gates are verified by using Proteus.

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