Audio Amplifier Project Documentation
Course: ____________EEC 236__________________
Name ID
Abdelrahman Shaban Saad 9413
Youssef Shawer 9685
Mohanad Amr Mohamed 9738
Moatez Ahmed 9242
Felopeeter Shokry Fekry 9294
Table of Contents
1. Introduction
2. Application and Objectives
3. Circuit Diagram and Design
4. Simulation Setup and Results
5. Circuit Analysis
6. Hardware Implementation
7. Conclusion
Appendix A: Bill of Materials (BOM)
1. Introduction
This project implements a small-signal audio amplifier using a two-stage architecture: an operational
amplifier (LM358P) for voltage gain, followed by an NPN transistor (2N2222) stage to provide
additional current drive for a low-resistance load (speaker or equivalent resistor). The report includes
the circuit diagram, simulation waveforms, a short analytical design check, and photographs of the
real hardware prototype.
2. Application and Objectives
Application
Amplify a low-amplitude AC input signal to a level suitable for driving a small speaker/load.
Objectives
• Design a stable amplifier with predictable voltage gain using an op-amp stage.
• Use coupling capacitors to block DC offsets between stages.
• Bias the transistor stage to operate around a suitable quiescent point (Class-A style) to reduce
distortion.
• Validate performance by simulation (schematic + oscilloscope waveforms).
• Build the circuit on a breadboard and compare measured results with simulation.
3. Circuit Diagram and Design
3.1 Overall Circuit Diagram
Figure 1. Complete schematic used for simulation (op-amp gain stage + BJT output stage).
3.2 Stage Description
Op-amp stage (LM358)
The LM358 is configured as an inverting amplifier. The input resistor (Ri) and feedback resistor (Rf)
set the closed-loop voltage gain approximately as: Av ≈ −Rf / Ri.
Transistor stage (2N2222)
The 2N2222 stage is biased using a resistor divider (R1 and R2) and uses emitter resistance (RE) for
stabilization. The output is AC-coupled to the load through C3 to prevent DC current from flowing in
the speaker.
4. Simulation Setup and Results
4.1 Simulation Conditions
• Supply rails: +9 V (VCC) and −9 V (VEE).
• Input: sine wave, 0.1 Vpeak, 5 kHz (as shown in the schematic).
• Load: RL ≈ 45 Ω (representing a small speaker/load).
• Oscilloscope: Channel A used for input/reference, Channel B used for the output waveform.
4.2 Oscilloscope Waveform
Figure 2. Simulated oscilloscope results (input vs. output).
Observed Results (from simulation)
The output waveform shows amplification relative to the input. Minor asymmetry or distortion can
appear depending on the transistor bias point and the load current requirement.
5. Circuit Analysis
5.1 Op-amp Gain
For an inverting op-amp configuration:
Av = Vout / Vin ≈ −Rf / Ri
Using Rf = 1 kΩ and Ri = 100 Ω, the expected voltage gain magnitude is approximately |Av| ≈ 10.
5.2 Coupling Capacitors and Low-Frequency Cutoff
The coupling capacitors (C1 and C3) form high-pass filters with the input resistance of the next stage.
A first-order estimate of the cutoff frequency is:
fc ≈ 1 / (2πRC)
Where R is the effective resistance seen by the capacitor. (Insert your computed values below.)
5.3 Hand Calculations / Analysis Image
Paste your analysis sheet (bias point calculations, small-signal model, or design math) here:
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5.4 Bias Point Check (quick estimate)
With R1 = R2 = 10 kΩ across ±9 V rails, the base DC bias is approximately 0 V (mid-supply). Assuming
VBE ≈ 0.7 V, the emitter would sit near −0.7 V, and the emitter current can be estimated by:
IE ≈ (VE − VEE) / RE
Use this section to compute the quiescent current and verify that the transistor is not forced into
saturation and that power dissipation is within safe limits.
6. Hardware Implementation
6.1 Breadboard Prototype
Figure 3. Photograph of the breadboard prototype and speaker connection.
6.2 Notes on Construction
• Ensure correct power rail polarity (VCC = +9 V, VEE = −9 V) and a common reference/ground
where required.
• Confirm electrolytic capacitor polarity (C1/C2/C3) before powering the circuit.
• Keep audio input wiring short and routed away from the output wiring to reduce noise coupling.
• Start with a low input amplitude and increase gradually while monitoring transistor temperature
and waveform clipping.
7. Conclusion
A two-stage amplifier was designed and built: an LM358-based voltage gain stage feeding a 2N2222
transistor output stage. Simulation confirmed the expected amplification and provided waveform
verification. The breadboard prototype demonstrates the same functional behavior and serves as a
hardware validation of the design.
Appendix A: Bill of Materials (BOM)
Ref. Component Qty Notes
U1 LM358 (op-amp) 1 Dual-supply used (+9 V
/ −9 V)
Q1 2N2222 (NPN BJT) 1 Output/current drive
stage
Ri 100 Ω resistor 1 Op-amp input resistor
Rf 1 kΩ resistor 1 Op-amp feedback
resistor
R1 10 kΩ resistor 1 Base bias divider (to
VEE)
R2 10 kΩ resistor 1 Base bias divider (to
VCC)
RC 100 Ω resistor 1 Collector resistor
RE 47 Ω resistor 1 Emitter resistor
C1 10 µF electrolytic 1 Interstage coupling
capacitor
C2 10 µF electrolytic 1 Collector node
capacitor bypass/decoupling (as
in schematic)
C3 100 µF electrolytic 1 Output coupling to
capacitor load
RL 45 Ω load / speaker 1 Used in simulation;
can be replaced by a
small speaker
PR1 Potentiometer (value: 1 Optional
____ Ω) trimming/level control
(if used)
VCC/VEE ±9 V supply 1 Two 9 V sources or
dual-rail supply
