CST 307: MICROPROCESSORS

AND MICROCONTROLLERS

MODULE 5
 Module 5 - Outline
1. Microcontrollers
2. 8051 Microcontroller
3. Architecture of 8051 Microcontroller
4. Register Set of 8051
5. Internal Memory of 8051
6. Interrupts in 8051 microcontroller
7. Stack in 8051
8. 8051 Addressing Modes
9. Instruction Set-8051
10. Programming of 8051
 MICROCONTROLLERS
A microcontroller (MCU for microcontroller unit) is a small computer on a
single metal-oxide-semiconductor (MOS) integrated circuit (IC) chip.
A microcontroller contain
● Central processing unit (CPU)
● RAM,ROM/EPROM
● Input/Output ports
● Timer and counters
● Serial port
● Interrupt
● Bus: Address bus & Data bus
 Applications of microcontrollers
● Cell phone
● Pager
● Watch
● Calculator
● video games
● Alarm clock
● Air conditioner
● TV remote
● Microwave oven
● Washing machines
● An electronic smart weight
 8051 Microcontroller

● 8051 microcontroller is designed by Intel in 1981.

● It is an 8-bit microcontroller.
● It is built with 40 pins DIP
8051- FEATURES

● 4 KB on chip program memory (ROM or EPROM)).

● 128 bytes on chip data memory(RAM).
● 8-bit databus
● 16-bit address bus
● 32 general purpose registers each of 8 bits
● Two -16 bit timers T0 and T1.
● Five Interrupts (3 internal and 2 external).
● Four Parallel ports each of 8-bits (PORT0, PORT1,PORT2,PORT3) with a total of 32
I/O lines.
● One 16-bit program counter and One 16-bit DPTR ( datapointer)
● One 8-bit stack pointer
PIN DIAGRAM OF 8051
MICROCONTROLLER
Pins 1 to 8 − These pins are known as Port 1. This port doesn’t serve any other functions.
It is internally pulled up, bi-directional I/O port.
Pin 9 − It is a RESET pin, which is used to reset the microcontroller to its initial values.
Pins 10 to 17 − These pins are known as Port 3. This port serves some functions like
interrupts, timer input, control signals, serial communication signals RxD and TxD, etc.
Pins 18 & 19 − These pins are used for interfacing an external crystal to get the system
clock.
Pin 20 − This pin provides the ground signal to the circuit.
Pins 21 to 28 − These pins are known as Port 2. It serves as I/O port. Higher order
address bus signals are also multiplexed using this port.
Pin 29 − This is PSEN pin which stands for Program Store Enable. It is used to read a signal
from the external program memory.
Pin 30 − The ALE (Address Latch Enable) activates the port 0 joined with port 2 to provide
16 bit external address bus to access the external memory.
Pin 31 −This is EA pin which stands for External Access input. It is used to enable/disable
the external memory interfacing.
Pins 32 to 39 − These pins are known as Port 0. It serves as I/O port. Lower order address
and data bus signals are multiplexed using this port.
Pin 40 − This pin is used to provide power supply to the circuit.
BLOCK DIAGRAM OF 8051 MICROCONTROLLER
➢ 8051 microcontroller is designed by Intel in 1981. It is an 8-bit
microcontroller. It is built with 40 pins DIP (dual inline package), 4kb of
ROM storage and 128 bytes of RAM storage, 2 16-bit timers. It Consists of
are four parallel 8-bit ports, which are programmable as well as
addressable as per the requirement. An on-chip crystal oscillator is
integrated in the microcontroller having crystal frequency frequency of 12
MHz.
➢ In the block diagram, the system bus connects all the support devices to the
CPU. The system bus consists of an 8-bit data bus, a 16-bit address bus and
bus control signals. All other devices like program memory, ports, data
memory, serial interface, interrupt control, timers, and the CPU are all
interfaced together through the system bus.
8051 Internal Architecture
System Clock and Oscillator Circuits:
❖ The 8051 requires an external oscillator circuit. The oscillator circuit
usually runs around 12MHz. The pulse is used to synchronize the system
operation in a controlled pace.
❖ 8051 machine cycle consists of 12 crystal pulses . The first 6 crystal
pulses (clock cycle) is used to fetch the opcode and the second 6 pulses
are used to perform the operation on the operands in the ALU. Pins used
are : XTAL1 , XTAL2
❖ The CPU has many important registers. The Program Counter (PC)
always holds the code memory location of next instruction.
❖ It fetches instructions from the code memory into the instruction
Register (IR), analyzes the opcode of the instruction, updates the PC to
the location of next instruction, fetches the operand from the data
memory if necessary, and finally performs the operation in the
Arithmetic-Logic Unit (ALU) within the CPU.
A-Accumulator register – an 8 bit register to save an operand for an ALU or data
transfer operation and whose most important function is to accumulate the result
after ALU operation .
B register : an 8 bit register to save a second operand for the ALU operation and
accumulate the result after ALU operation like Multiplication ( higher 8 bit of
product) and division( reminder of division).
PSW- Program Status Word
● 8-bit Processor Status Word (PSW)
● PSW register stores the important status conditions of the microcontroller. It
also stores the bank select bits (RS1 & RS0) for register bank selection.
Stack pointer (SP)
● Hold an 8-bit (1-byte) value
● In the 8051, the stack pointer (SP) points to the last used location of the stack. When
data is pushed onto the stack, the stack pointer (SP) is incremented by 1.

DPTR- Data Pointer register

A 16-bit register to hold the external data memory address of the data being currently
fetched or to be fetched in indirect addressing mode. The DPTR consist of 2 bytes.
DPH(Higher) DPL (Lower).

Port 0 to 3 Latches and Drivers

● 8051 has four ports P0,P1,P2 & p3.
● These four latches and driver pairs are allotted to each of the four on-chip I/O ports.
● The four ports are required for i/o operations.
● Each port takes 8 pins.
● The user can communicate with these ports.
Timers Register: Two 16-bit Register
Timers to generate a time delay or used as Event counters to count events
happening outside the microcontroller
Since 8051 has an 8-bit architecture, each 16-bits timer is accessed as two
separate registers of low byte and high byte
Control Registers
The special function registers IP, IE, TMOD, TCON, SCON and PCON contain
control and status information for interrupts, timers/counters and serial port.
Timing and Control Unit
This unit derives all the necessary timing and control signals required for
the internal operation of the circuit.
It also derives control signals required for controlling the external system
Oscillator
This circuit generates the basic timing clock signal for the operation
of the circuit using crystal oscillator
Instruction Register
This register decodes the opcode of an instruction to be executed and
gives information to the timing and control unit to generate necessary
signals for the execution of the instruction.
EPROM and Program Address Register
These blocks provide an on-chip EPROM and a mechanism to internally
address it. Note that EPROM is not available in all 8051 versions.
RAM and RAM Address Register
These blocks provide internal 128 bytes of RAM and a mechanism to
address it internally.
ALU
The arithmetic and logic unit performs 8-bit arithmetic and logical operations
over the operands held by the temporary registers TMP1 and TMP2.
Users cannot access these temporary registers.
SFR Register Bank
➢ This is a set of special function registers, which can be addressed using
their respective addresses which lie in the range 80H to FFH
➢ The interrupt, serial port and timer units control and perform their
specific functions under the control of the timing and control unit.
REGISTER SET OF 8051
8051 microcontrollers mainly contain two types of registers
1. General-purpose registers
2. Special function registers
General-purpose registers:
The 8051 contains 32 general-purpose, or working, registers.
These are arranged as part of internal RAM in four banks, BO-B3
Each bank has 8 registers.
Special function registers
ACCUMULATOR (A):-8 bit register
It is used for data transfer and arithmetic operations. After any operation
result is stored in A.
B REGISTER:-
It is used to store the upper 8 bit result of multiplication and divisions. It
is used as temporary register.
PROGRAM STATUS WORD (PSW):-
This special function registers and consists of different status bits that
reflect the current state of microcontroller.
It contains carry (CY), the auxiliary carry(AC), the two registers bank
select bits(RS1 and RS0), the overflow flag(OV), a parity bit(P), and
two user defined status flags.
STACK POINTER (SP):-
● The stack refers to an area in internal RAM to store and retrieve data
quickly, used by the 8051 to hold internal RAM address that is called top
of the stack.
● This is an 8 bit register. SP is incremented before the data is stored onto the
stack using PUSH/CALL instructions execution.
● During PUSH, first SP is incremented and then copy the data.
● In the POP operation, initially copy the data and then decrement the SP.

PCON (Power Control):

● The Power Control SFR is used to control the 8051’s power control modes.
● Certain operation modes of the 8051 allow going ”sleep” mode which requires
much less power.
● These modes of operation are controlled through PCON.
TCON (Timer Control, Bit-Addressable):
● The Timer Control SFR is used to configure and modify the way in which the
8051’s two timers operate.
● This SFR controls whether each of the two timers is running or stopped and
contains a flag to indicate that each timer has overflowed.
TMOD (Timer Mode):
The Timer Mode SFR is used to configure the mode of operation of each of the
two timers.
Each timer to be a 16-bit timer, an 8-bit auto reload timer, a 13-bit timer, or two
separate timers.
TL0/TH0 (Timer 0 Low/High):
These two SFRs, taken together, represent timer 0.
TL1/TH1 (Timer 1 Low/High):
These two SFRs, taken together, represent timer 1
SCON (Serial Control):
The Serial Control SFR is used to configure the behavior of the 8051’s
on-board serial port.
This SFR controls the baud rate of the serial port, whether the serial port is
activated to receive data, and also contains flags that are set when a byte is
successfully sent or received.
SBUF (Serial Control):
The Serial Buffer SFR is used to send and receive data via the on-board
serial port.
Any value written to SBUF will be sent out the serial port’s TXD pin.
Likewise, any value which the 8051 receives via the serial port’s RXD pin
will be delivered to the user program via SBUF.
IE (Interrupt Enable):
The Interrupt Enable SFR is used to enable and disable specific
interrupts.
IP (Interrupt Priority):
The Interrupt Priority SFR is used to specify the relative priority of
each interrupt.
On the 8051, an interrupt may either be of low (0) priority or high (1)
priority.
PORT0, PORT1, PORT2, PORT3
The 8051 Microcontroller four Ports which can be used as Input
and/or Output.
Each bit in these SFRs corresponds to one physical Pin in the 8051
Microcontroller.
All these Port Registers are both Bit Addressable and Byte Addressable
Data Pointer (DPTR – DPL and DPH)
➢ The Data Pointer is a 16-bit Register and is physically the
combination of DPL (Data Pointer Low) and DPH (Data
Pointer High) SFRs.
➢ The Data Pointer can be used as a single 16-bit register (as
DPTR) or two 8-bit registers (as DPL and DPH).
➢ The DPTR Register is used by the programmer addressing
external memory (Program – ROM or Data – RAM).
Program Counter (PC) : 16 bit register to hold the program
memory address of the next instruction to be executed .
 Internal memory organization of 8051

1. Internal RAM (Data Memory)

2. Internal ROM (Program Memory)
The 8051 has two types of memory and these are Program Memory and
Data Memory.

Program Memory (ROM) is used to permanently save the program being

executed, while Data Memory (RAM) is used for temporarily storing data
and intermediate results created and used during the operation of the
microcontroller.

Depending on the model in use at most a few Kb of ROM and 128 or 256 bytes of
RAM is used.

However… All 8051 microcontrollers have a 16-bit addressing bus and are
capable of addressing 64 kb memory.
Internal RAM (Data memory)
The 128-byte internal RAM shown in below fig: is organized into three distinct areas.

● The first 128 bytes of RAM (from 0000 to 0x7F) are called the direct memory,
and can be used to store data.
● It mainly contains register banks , Read/write data, bit addressable registers and
stack.
● PSEN(bar) is used to allow usage of Internal ROM or not.

➢ internal RAM divided into three section.

★ 32 bytes-Register Bank.
★ 16 Byte-bit addressable area.
★ 80 byte-General purpose RAM area
Register Banks

➢ The lowest 32 bytes of RAM (00h to 1Fh) are reserved for

4 general register banks.
➢ The register banks are numbered 0 to 3 .
➢ Each bank consists of 8 registers namely R0 to R7 with
8-bit width and the register can be addressed by its name
or by its RAM address.
➢ The default bank is bank 0.
➢ PSW determines which bank registers is currently used
16 Byte- bit addressable area.
The bit-addressable RAM locations are 20H to 2FH. These 16 bytes
provide 128 bits of RAM bit-addressability
This feature allows the programmer to change only
what needs to be altered leaving the remaining bits in that Register
Byte address: 20 H -2F H
Bit address: 00 H -7FH

80 byte-General purpose RAM area

➢ The final 80B of the internal RAM i.e., addresses from 30H to 7FH, is
the general purpose RAM area which are byte addressable.
➢ This space also used as a stack.
.
General purpose RAM area above the bit area from 30h to 7Fh. Above these 128 bytes
, the upper 128 bytes form SFRs.

RAM Area
Internal ROM (Program memory )
● The 8051 has 4K (4096 locations) of on-chip ROM. This is used for
storing the system program.

● 2^12= 4096, therefore the internal ROM address bus is 12 bits

wide and internal ROM locations go from 000H to FFFH.

Program memory accessed through EA pin.

a)If EA is high, internal program memory is accessed to 0FFFH

memory location and external program memory is accessed from
1000H to FFFFH
b) If EA is low, only external program memory accessed from
0000H to FFFFH memory locations.
 Interrupts in 8051 microcontroller
★ An interrupt is an external or internal event that interrupts the
microcontroller to inform it that a device needs its service.
★ A set of program instructions written to service an interrupt is called the
Interrupt Service Routine.
There are total 5 interrupt sources in 8051 Microcontroller as follows:
Types of interrupt in 8051 Microcontroller
1. Timer0 overflow interrupt - TF0
2. External hardware interrupt - INT0
3. Timer 1 overflow interrupt - TF1
4. External hardware interrupt - INT1
5. Serial communication interrupt - RI/T1
Internal & External interrupts
The timer and serial interrupts are internally
produced by the microcontroller,
whereas the external interrupts are produced by
additional interfacing devices or switches that are
externally connected with the microcontroller.
How 8051 services an interrupt request
➢ 8051 finishes the instruction it is currently executing, and saves
the contents of Program Counter on the stack (address of next
instruction).
➢ It jumps to the interrupt vector location corresponding to the
interrupt source
➢ Executes the interrupt service routine, until it encounters RETI
instruction.
➢ Returns back to the place where it was interrupted, by popping
the contents of stack on PC, and starts execution from that
address.
Special Function Register to handling Interrupt

➢ IE (Interrupt Enable Register)

Interrupt Enable (IE) Register, IE register is used for enabling
and disabling the interrupt. This is a bit addressable register in
which EA value must be set to one for enabling interrupts. So it
can be programmed by the user. The address is A8H.
➢ IP( Interrupt priority Register)
Priority to the interrupt can be assigned by using the interrupt priority
register (IP). This IP register can be used to store the priority levels for
each interrupt. This is also a bit addressable SFR. Its address is B8H.
When all of the five interrupts are in same priority level, and if all of the
interrupts are enabled, then the sequence of interrupts will be INT0, T0,
INT1, T1, TI/R I
➢ IP( Interrupt priority Register)
“ALL INTERRUPTS OF 8051 ARE VECTORED”
External Interrupt
The external interrupts of 8051 are INT0 and. INT1.
P3.2 & P3.3 are these interrupts. These interrupts can be
programmed to either edge-triggered or level triggered. The TCON
register can be used to program external interrupts to edge or level
triggered. The TCON is Timer Control. TCON is another bit
addressable SFR. Here the address is 88H
Serial Port Interrupt
The serial ports can be used either Transmitting mode or reception mode. Data
to be transmitted is kept is SBUF, once the complete transfer is done, SBUF will
interrupt the processor.
The interrupt status for the Transmission is provided by TI, and status for
Reception is provided by RI. These are two bits of SCON(Serial Control). This is
also a bit addressable SFR. The address is 98H
 Stack in 8051
The stack area in 8051 always can be implemented in the internal data Memory. Here the
stack pointer (SP) is an only 8-bit register, because the internal RAM area is only in range
00H to 7FH, and when all register banks are being used, the stack location will be in range
30H to 7FH. So in such a case, the SP will be initialized with 2FH.
 Stack in 8051
The stack pointer SP increases before each PUSH operation and decreases after
each pop instruction.
When the 8051 is reset, the Stack Pointer will point to 07H. It means the location
08H to 7FH can be used as a stack.
PUSH
➢ Increment sp by 1
➢ Store 8 bit data
POP
➢ Retrieve 8 bit data
➢ Decrement sp by 1
8051 Addressing Modes
An Addressing Mode is a way to locate a target Data, which is also called
as Operand.
The 8051 Instruction set supports Six types of Addressing Modes
➢ Direct Addressing
➢ Indirect Addressing
➢ Register Addressing Mode
➢ Register Specific (Register Implicit)
➢ Immediate Addressing mode
➢ Indexed Addressing
Immediate addressing mode
The data is provided in the instruction itself. The data is provided
immediately after the opcode.
MOV A, #AFH; Data AF is given to register A (8 bits)
MOV R3, #45H; Data 45 is given to register R3 (8 bits)
MOV DPTR, #FE00H; Data FE00 is given to register DPTR (16 bits)

The # symbol is used for immediate data.

The DPTR stands for Data Pointer. Using this, it points the external
data memory location.
Direct Addressing
➢ In Direct Addressing Mode, the address of the data is specified as the
Operand in the instruction
➢ Only internal data RAM and SFRs can be directly addressed

MOV 80H, R6;The instruction will send the content of register R6 to

RAM location 80H (Address of Port 0 is 80H).

MOV R2, 45H; The second one is for getting content from 45H to R2.
MOV A,25H; Contents of location 25H is copied to register A.
MOV 30H,A; Contents of register A is copied to location 30H.
MOV 30H,#30H; 30H is copied to location 30H.
MOV 01H,00H; Contents 00H is copied to location 01H.
Indirect Addressing

In the Indirect Addressing Mode or Register Indirect Addressing Mode,the

address of the Operand is specified as the content of a Register.
In this mode Data is specified in the 8-bit address field and the address
is stored in a register. This register is specified in the instruction.
By using register indirect addressing mode, the internal or external
addresses (RAM) can be accessed.
● The R0 and R1 are used for 8-bit addresses, and DPTR is used for 16-bit
addresses, no other registers can be used for addressing purposes.
Eg: MOV A, @R1
The @ symbol indicates that the addressing mode is indirect.
Eg: Contents of R1 is 56H and If the contents of the RAM location 56H is 24H, then
24H is moved into accumulator.

Eg1 : MOV A,@R0; Contents of location specified in Ro is copied to register A.

Eg2: MOV @R1,A; Contents of register A is copied to location Specified in register R1.

Eg3: MOVX A,@DPTR; Contents location specified in DPTR(external RAM) is copied

to register A.

Eg4: MOVX @DPTR,A; Contents of register is copied to location (external RAM)

specified by DPTR
Register Addressing Mode

● In this mode Data is specified in the registers R0 – R7 of the

selected register bank.
● Permitted registers are A, R7-R0 of each register bank.
Eg1 : MOV A,R0; Contents of register Ro is copied to register A.
Eg2: MOV R1,A; Contents of register A is copied to register R1.

MOV R1, R0 ; NOT ALLOWED

Register Specific (Register Implicit)
● In this type of instructions, the operand is implicitly
specified using one of the registers.
● Some of the instructions always operate only on a specific
register.
RL A; This instruction rotates accumulator left.
Indexed Addressing Mode
➢ With Indexed Addressing Mode, the effective address of the Operand
is the sum of a base register and an offset register.
➢ Only program memory can be accessed using this addressing mode.
➢ Program counter (PC) and Data pointers (DPTR) are allowed in this
mode of addressing.
➢ The destination operand is always the register A.
➢ In Indexed Addressing Mode, only MOVC and JMP instructions can
be used.
Eg1 : MOVC A,@A+DPTR; Contents of location specified in (A+DPTR)
is copied to register A.
Eg2: MOVC A,@A+PC; Contents of location specified in (A+PC) is
copied to register A.
 Instruction Set-8051
The 8051 instructions set can be categorized in the
following categories:
★ Data Transfer Instructions
★ Arithmetic Instructions
★ Logical Instructions
★ Boolean Instructions
★ Control Instructions
Data Transfer Instructions

❖ The Data Transfer Instructions are associated with transfer of data between
registers or external program memory or external data.
❖ These Instructions allows data transfer between any two internal RAM or
SFR locations (bit , byte or 16 bit data transfer operations between the
’SRC’(source) and DST ’destination’ operands)
➢ Both operands can be internal direct data memory operands
➢ Both operands cannot direct and/or indirect register operands R0-R7
➢ Immediate operand can be only a source and not a destination.
❖ Only RO and R 1 are used for indirect addressing mode.
Move the content of external memory to A or content of A to external memory .
movx A, @DPTR
movx @DPTR ,A
PUSH: copy the 8 bit data into stack after incrementing SP. Data is taken from a
direct address of either SFR or internal RAM address between 00 H to &7F H
Syntax: PUSH direct address
Eg: PUSH 00H // 00H address of register R0 so increment SP and push content
of R0 to stack top
POP : move byte to a direct internal RAM or SFR from STACK and
decrement the stack pointer .
Syntax : POP direct address
POP 00H // move stack top content to register R0 and decrement SP
POP 90H // popping into P1
XCH –type instruction
An XCH instruction is for exchanging the A register with a source
using the register ( direct or indirect addressing )

Eg: XCH A,@R0

Suppose A= 44 H , R0 = 03 H and the address of R3 is 03 H
Eg: XCHD A, @R0
Suppose A= 40H R0 is used to point R3 and R3= 95 H .
After execution exchange of lower nibbles between A and R3 is performed
A= 45 H and R3= 90 H
Arithmetic Instructions

❖ These instructions implement arithmetic operations along

with increment, decrement and decimal adjust operations.
➢ Accumulator is a compulsory destination operand for
two-operand instructions.
➢ Immediate operand can be only source and not a destination
operand.
➢ Program counter or its part cannot be an operand.
➢ Immediate data cannot be an operand for INC/DEC
instructions.
1
Logical Instructions
❖ These instructions implement basic logical operations along with
rotate and clear operations
❖ A is not a compulsory destination operand for logical instructions
excluding complement instruction CPL. However, one of the operands
must be A.
❖ Any other DST operand can be a destination operand for logical
instructions.
❖ Immediate operand can only be a source operand.
➢ Program counter or its part can’t be an operand
➢ Immediate data can’t be an operand for INC/DEC or any other single
operand instruction.
➢ There are no SUB or Compare instructions. The programmer has to
implement the subtraction without borrow and comparison instructions
using SUBB.
BYTE MANIPULATION INSTRUCTIONS:
Boolean Instructions
➢ This group implements Boolean bit operations
➢ Carry flag (C ) is the only allowed destination operand for two
operand instructions.
➢ Immediate bit is not allowed as an operand.
➢ The ’Bit flag’ indicates the respective flag of PSW, if it is operand of
the respective instruction
Control transfer instructions
The control Transfer instructions transfer the control of execution or change the
sequence of execution either conditionally or unconditionally.

The control transfer instructions of 8051 as usual can be divided into

two categories
1 Conditional control transfer
2 Unconditional control transfer.

Another classification of Control transfer instruction is

Short jump(SJMP 8-bit address)
Absolute Jump (ALMP 11-bit address)
Long Jump (LJMP 16-bit address)
Short jump(SJMP 8-bit address)
● It is a 2-byte instruction
● first byte represents an opcode byte, while the second byte represents an 8-bit
relative address of the target location
● The relative address ranges from 00H to FFH which is divided into forward and
backward jumps; that is, within –128 to +127 bytes of memory relative to the
address of the current PC (program counter). In case of forward jump, the target
address can be within a space of 127 bytes from the current PC. In case of
backward jump, the target address can be within –128 bytes from the current PC.
● ie. For jumping ahead, the range is 0 to 127 and for jumping back, the range is -1
to -128.
Absolute Jump (AJMP 11-bit address)
● It is a 2-byte instruction
● In this case only 11 bits of the absolute jump address are needed.
● This jump instruction is intended mainly for jump within a memory space
of 2 K bytes
● Thus it can provide a forward or backward jump in a total space of 4 kbytes
● Jump to next address given by : 3 lower bits of the first byte of the
instruction + second byte (total 11 bit address). Higher 5 bits of the first
byte form the opcode .
● Absolute jump to anywhere within 2k block of program memory
11000 {01111110000}- Inside the brace it represents the 11 bit address to
jump.
Long Jump (LJMP 16-bit address)
● It is a 3-byte instruction in which the first byte represents opcode,
and the second and third bytes represent the 16-bit address of the
target location.
● The 2- byte target address is to allow a jump to any memory
location from 0000 to FFFFH. (Long jump range is 64 kb)
 Call to Routine –Unconditional and Return from Routine
➢ 8051 CPU saves on a call only the PC( PCH and PCL) onto the stack .
➢ SFRs , which are expected to be changed on calling the routine , must be saved
by push and must be popped before the last return instruction from the routine
Assume before calling a routine SP =30H and return address=20F0H . While
calling a routine,
1) PUSH PC (PCH +PCL) on to stack top .increment SP by 1 and PUSH PCL ,increment SP
by 1 and PUSH PCH . {SP=32H}
2) Load PC with Routine address , transfer control to location pointed by PC now . Inside
Routine body While executing RET
3) POP data pointed by SP and place it into PCH ,decrement SP by 1. {SP=31H} POP data
pointed by SP and place it into PCL ,decrement SP by 1. {SP=30H}
ACALL addr11 ( 2 byte instruction , direct 11 bit address
operand)
This is Absolute call instruction and it unconditionally calls a
subroutine located at the indicated address( within 2K block)
[PC]←.[PC]+2
[SP]←[SP]+1
[[SP]]←[PC7-0]
[SP]←SP+1
[[SP]←[PC15-8]
[PC]←addr10-0 ( 11 bit address)
1. Write a program to Add two data bytes 50 H and 60H.
Store the result at memory location 30 H

2. Write a program to add the values of locations 50 H and

51 H and store the result in locations 52 H and 53 H

3. Write an assembly language program to find whether a

given byte is available in the given sequence or not. If it
is available, write FF in R3, otherwise write 00 in R3.

4. Write an assembly language program to perform

addition of two 2x2 matrices.
Write an assembly language program to find whether
a given byte is available in the given sequence or not.
If it is available, write FF in R3, otherwise write 00 in
R3.