UNIT I

DIGITAL LOGIC
Digital logic is the operation performing in circuite

A main component of digital logic consists of five different logic gates:

 AND
 OR
 XOR
 NAND
 NOR
POSITIVE AND NEGATIVE LOGIC
If the signal that activates the logic gate has for its high (1) level a voltage

A logic system in which logic 1 is assigned to the higher voltage and logic 0 to the
lower voltage is positive logic.

A logic system in which logic 1 is assigned to the lower voltage and logic 0 to the
higher [Link] negative logic

Low=0 high=1 positive

Low=1 high=0 negative

NOT GATE
The NOT gate is the most basic logic gate of all other logic gates. NOT gate is also known as
an inverter or an inverting Buffer. NOT gate only has one input and one output. When the
input signal is "Low", the output signal is "High" and when the input signal is "High", the
output is "Low"

Logic Design

Truth Table
OR GATE
The OR gate is a mostly used digital logic circuit. The output state of the OR gate will always
be low when both of the inputs states is low. Simply, if any input value in the OR gate is set
to 1, then it will always return high-level output(1)

Logic Design

Truth Table
AND GATE
The AND gate plays an important role in the digital logic circuit. The output state of the AND
gate will always be low when any of the inputs states is low. Simply, if any input value in the
AND gate is set to 0, then it will always return low output(0).

Logic Design

Truth Table
XOR GATE
XOR” an abbreviation for “Exclusively-OR.” The simplest XOR gate is a two-input digital
circuit that outputs a logical “1” if the two input values differ, i.e., its output is a logical “1” if
either of its inputs are 1, but not at the same time (exclusively)
XNOR GATE
The XNOR gate is the complement of the XOR gate. It is a hybrid gate. Simply, it is the
combination of the XOR gate and NOT gate. The output level of the XNOR gate is high only
when both of its inputs are the same, either 0 or 1. The symbol of the XNOR gate is the same
as XOR, only complement sign is added. Sometimes, the XNOR gate is also called
the Equivalence gate.

Input Output

A B Y
Truth Table
0 0 1

0 1 0

1 0 0

1 1 1
UNIVERSAL GATES
In addition to AND, OR, and NOT gates, other logic gates like NAND and NOR are also used in the
design of digital circuits

NAND Gate:
The NAND gate represents the complement of the AND operation. Its name is an abbreviation of
NOT AND. The graphic symbol for the NAND gate consists of an AND symbol with a bubble on the
output, denoting that a complement operation is performed on the output of the AND gate. The
truth table and the graphic symbol of NAND gate is shown in the figure. The truth table clearly shows
that the NAND operation is the complement of the AND.
NOR GATE
The below diagram is of a two input NAND gate. The first part is an AND
gate and second part is a dot after it represents a NOT gate. So it is clear
that during the operation of NAND gate, the inputs are first going through
AND gate and after that the output is reversed and we get the final
output. Now we will look at the truth table of NAND gate.

We will consider the truth table of the above NAND gate i.e. a two-input

gate. The two inputs are A and B.

COMBINATIONAL CIRCUITE
1. Half adder
2. Full adder
3. Half subtractor
4. Full subtractor
5. Look head carry adder
6. Decoders
7. BCD to 7 segment decoder
8. Encoder
9. Multiplexer
10. Demultiplexer
 HALF ADDER

A half adder is used to add two single-digit binary numbers and results
into a two-digit output. It is named as such because putting two half
adders together with the use of an OR gate results in a full adder.

Half Adder truth table:

A (input) B (input) C (output) S (output)

0 0 0 0
1 0 0 1
0 1 0 1
1 1 1 0
FULL ADDER

Full adder is a digital circuit used to calculate the sum of three binary bits.
HALF SUBTRACTOR
The half-subtractor is a combinational circuit which is used to perform subtraction of
two bits. It has two inputs, X (minuend) and Y (subtrahend) and two outputs D
(difference) and B (borrow). The logic symbol and truth table are shown below.
FULL SUBTRACTOR
A full subtractor is a combinational circuit that performs subtraction involving
three bits, namely A (minuend), B (subtrahend), and Bin (borrow-in) . It
accepts three inputs: A (minuend), B (subtrahend) and a Bin (borrow bit) and
it produces two outputs: D (difference) and Bout (borrow out).
LOOK HEAD CARRY ADDER
All carries finding at first time is called LHCA
A carry-look ahead adder (CLA) is a type of adder used in digital logic. A carry-look ahead
adder improves speed by reducing the amount of time required to determine carry bits. The
carry-look ahead adder calculates one or more carry bits before the sum, which reduces the
wait time to calculate the result of the larger value bits.

The corresponding boolean expressions are given here to construct a carry

lookahead adder. In the carry-lookahead circuit we ned to generate the two signals
carry propagator(P) and carry generator(G),
Pi = Ai ⊕ Bi
Gi = Ai · Bi
The output sum and carry can be expressed as
Sumi = Pi ⊕ Ci
Ci+1 = Gi + ( Pi · Ci)
Having these we could design the circuit. We can now write the Boolean function for
the carry output of each stage and substitute for each Ci its value from the previous
equations:
C1 = G0 + P0 · C0
C2 = G1 + P1 · C1 = G1 + P1 · G0 + P1 · P0 · C0
C3 = G2 + P2 · C2 = G2 P2 · G1 + P2 · P1 · G0 + P2 · P1 · P0 · C0
C4 = G3 + P3 · C3 = G3 P3 · G2 P3 · P2 · G1 + P3 · P2 · P1 · G0 + P3 · P2 · P1 · P0 · C0
 DECODER

Binary to decimal

The combinational circuit that change the binary information into 2N output lines is known
as Decoders. The binary information is passed in the form of N input lines. The output lines
define the 2N-bit code for the binary information. In simple words, the Decoder performs the
reverse operation of the Encoder. At a time, only one input line is activated for simplicity.
The produced 2N-bit output code is equivalent to the binary information.

The circuit diagram of 2 to 4 decoder is shown in the following figure.

BCD TO 7 SEGMENT DECODER
Creating digital clock

BCD to 7-segment display decoder is a special decoder which can convert binary
coded decimals into another form which can be easily displayed through a 7-
segment display.
BCD
BCD stands for binary coded decimal. It is a digital numbering system in which we
can represent each decimal number using 4 bits of binary numbers.
There are 10 digits in the decimal system. To represent all 10 digits we need 10
combinations of 4 binary bits.
ENCODER

Decimal to binary
An Encoder is a combinational circuit that performs the reverse operation of
Decoder.
Decimal to binary convert
MULTIPLEXURES

Train select one track from multiple

A multiplexer is a combinational circuit that has 2n input lines and a single output
line. Simply, the multiplexer is a multi-input and single-output combinational circuit.
The binary information is received from the input lines and directed to the output
line.
DEMULTIPLUXER

Train get one track train coming from multiple track

he demultiplexer takes one single input data line and then switches it to any one of a
number of individual output lines one at a time.
UNIT II
SEQUENTIAL LOGIC CIRCUITES

sequential circuit has memory so output can vary based on input.

COMBINATIONAL LOGIC CIRCUITES
The combinational circuit does not use any memory
EDGE TRIGGERING

Signal change when electricity reach at edge

if the output changes when the signal transits from a high level to a low level or from
a low level to a high level, we call it edge triggering
 PULSE TRIGGERING or LEVEL TRIGGERIMG
Signal change 0 to 1 or 1 to 0 when electricity reaches level

A output is pulsed when it changes to another level for a period of time and then
goes back to its original level. This can be either low-high-low or high-low-high.

A level-triggered circuit will become active when the clock pulse is at a certain level.
Based on which level (HIGH / LOW ) the circuit is activated level triggering is again
classified as negative level triggering circuits and positive level triggering

A clock is a signal that oscillates between a high and a low state. It is used to
coordinate the actions of a digital circuit (like a metronome).
SR LATCH
Latches are basic storage elements that store 0 or 1
SR FLIP FLOP
SR flip flop are basic storage elements that store 0 or 1

The SR flip flop is a 1-bit memory bistable device having two inputs, i.e., SET and
RESET. The SET input 'S' set the device or produce the output 1, and the RESET input
'R' reset the device or produce the output 0. The SET and RESET inputs are labeled
as S and R, respectively.
JK FLIP FLOP

JK flip flop are basic storage elements that store 0 or 1

Jack Kilby(JK) to distinguish the flip-flop design from other types
MASTER SLAVE JK FLIP FLOP
flip flop are basic storage elements that store 0 or 1
In "JK Flip Flop", when both the inputs and CLK set to 1 for a long time, then Q
output toggle until the CLK is 1. Thus, the uncertain or unreliable output produces.
This problem is referred to as a race-round condition in JK flip-flop and avoided by
ensuring that the CLK set to 1 only for a very short time.
D FLIP FLOP
flip flop are basic storage elements that store 0 or 1

D (or Delay) Flip Flop (Figure 1) is a digital electronic circuit used to delay the change
of state of its output signal (Q) until the next rising edge of a clock timing input signal
occurs.
 T FLIP FLOP
The T flip-flop is also called toggle flip-flop. It is a change of the JK flip-flop. The T flip
flop is received by relating both inputs of a JK flip-flop. The T flip-flop is received by
relating the inputs ‘J’ and ‘K’. When T = 0, both AND gates are disabled.

QN T QN+1

0 0 0

0 1 1

1 0 1

1 1 0
SHIFT REGISTER

Push the digit right or left is called shift

A group of flip flops which is used to store multiple bits of data and the data is
moved from one flip flop to another is known as Shift Register.
A Shift Register can shift the bits either to the left or to the right. A Shift Register,
which shifts the bit to the left, is known as "Shift left register", and it shifts the bit to
the right, known as "Right left register"

The shift register is classified into the following types:

Serial In Serial Out

Serial In Parallel Out
Parallel In Serial Out
Parallel In Parallel Out
Serial In Serial Out

In "Serial Input Serial Output", the data is shifted "IN" or "OUT" serially. In SISO, a
single bit is shifted at a time in either right or left direction under clock control.
Serial In Parallel Out

In the "Serial IN Parallel OUT" shift register, the data is passed serially to the flip
flop, and outputs are fetched in a parallel way. The data is passed bit by bit in the
register, and the output remains disabled until the data is not passed to the data
input. When the data is passed to the register, the outputs are enabled, and the flip
flops contain their return value
Parallel In Serial Out

In the "Parallel IN Serial OUT" register, the data is entered in a parallel way, and the
outcome comes serially. A four-bit "Parallel IN Serial OUT" register is designed
below. The input of the flip flop is the output of the previous Flip Flop. The input and
outputs are connected through the combinational circuit. Through this
combinational circuit, the binary input B0, B1, B2, B3 are passed. The shift mode and
the load mode are the two modes in which the "PISO" circuit works.
 Parallel In Parallel Out

"Parallel IN Parallel OUT", the inputs and the outputs come in a parallel way in the register.
The inputs A0, A1, A2, and A3, are directly passed to the data inputs D0, D1, D2, and D3 of the
respective flip flop. The bits of the binary input is loaded to the flip flops when the negative
clock edge is applied. The clock pulse is required for loading all the bits. At the output side,
the loaded bits appear.
 COUNTERS
A Counter is a device which stores (and sometimes displays) the number of times a
particular event or process has occurred, often in relationship to a clock signal.

Counters are broadly divided into two categories

1. Asynchronous counter
2. Synchronous counter
1. Asynchronous counter
asynchronous counter we don’t use universal clock, only first flip flop is driven by
main clock and the clock input of rest of the following flip flop is driven by output of
previous flip flops
 2. Synchronous counter

Asynchronous counter, the present counter's output passes to the input of the next
counter. So, the counters are connected like a chain. The drawback of this system is that it
creates the counting delay, and the propagation delay also occurs during the counting stage.
The synchronous counter is designed to remove this drawback.
 UP/DWON COUNTER

 Up counter: This type of counter counts from zero to the maximum number of
counts.
 Down counter: This type of counter counts from the maximum value to zero value.

.
Decade counter

A decade counter counts in decimal digits, rather than binary. A decade counter may
have each (that is, it may count in binary-coded decimal, A decade counter is a
binary counter that is designed to count to 910
MODE N COUNTERS

A Mod_N Counter is a counter in which N represents the N number of time count.

RING COUNTER
A ring counter is a typical application of the Shift register. The ring counter is almost
the same as the shift counter. The only change is that the output of the last flip-flop
is connected to the input of the first flip-flop in the case of the ring counter but in
the case of the shift resister it is taken as output
JOHNSONS COUNTERS
The Johnson counter is similar to the Ring counter. The only difference between
the Johnson counter and the ring counter is that the outcome of the last flip flop is
passed to the first flip flop as an input. But in Johnson counter, the inverted
outcome Q' of the last flip flop is passed as an input. The remaining work of
the Johnson counter is the same as a ring counter. The Johnson counter is also
referred to as the Creeping counter.

CP Q1 Q2 Q3 Q4

0 0 0 0 0

1 1 0 0 0

2 1 1 0 0

3 1 1 1 0

4 1 1 1 1

5 0 1 1 1

6 0 0 1 1

7 0 1 1 1
UNIT III
 BASIC COMPUTER ORGANISATION AND DESIGN

Computer organization refers to the operational unit and their interconnection that
realise the architectural specification.
Computer organization deals with how different part of a computer are organised
and how various operations are performed between different part to do a specific
task.
The organization of the computer is defined by its internal registers ,timing and
control structure ,and set of instruction that is uses.
Instruction:-
Computer instructions are a set of machine language instructions that a particular
processor understands and executes. A computer performs tasks on the basis of the
instruction provided.

 The Operation code (Opcode) field which specifies the operation to be performed.
 The Address field which contains the location of the operand, i.e., register or
memory location.
 The Mode field which specifies how the operand will be located.
 INSTRUCTION CODES
The operation code of an instruction is a group of bits that define operations such as
add, subtract, multiply, shift and compliment. The number of bits required for the
operation code depends upon the total number of operations available on the
computer.

An instruction comprises of groups called fields. These fields include:

o The Operation code (Opcode) field which specifies the operation to be performed.
o The Address field which contains the location of the operand, i.e., register or
memory location.
o The Mode field which specifies how the operand will be located.
 COMPUTER REGISTERS

Registers are a type of computer memory used to quickly accept, store, and transfer
data and instructions that are being used immediately by the CPU. The registers used
by the CPU are often termed as Processor registers.

Register Symbol Number Function

of bits

Data register DR 16 Holds memory operand

Address register AR 12 Holds address for the memory

Accumulator AC 16 Processor register

Instruction register IR 16 Holds instruction code

Program counter PC 12 Holds address of the instruction

Temporary register TR 16 Holds temporary data

Input register INPR 8 Carries input character

Output register OUTR 8 Carries output character

 COMPUTER INSTRUCTIONS

Computer instructions are a set of machine language instructions that a particular

processor understands and executes. A computer performs tasks on the basis of the
instruction provided.
An instruction comprises of groups called fields. These fields include:
o The Operation code (Opcode) field which specifies the operation to be performed.
o The Address field which contains the location of the operand, i.e., register or
memory location.
o The Mode field which specifies how the operand will be located.

Mov A,10
MOV B,10
ADD B
 INSTRUCTION TYPES

A basic computer has three instruction code formats which are:

1. Memory - reference instruction
2. Register - reference instruction
3. Input-Output instruction

Memory - reference instruction

In Memory-reference instruction, 12 bits of memory is used to specify an address

and one bit to specify the addressing mode 'I'.
Register - reference instruction

Input-Output instruction
 TIMING AND CONTROL
The timing for all registers in the basic computer is controlled by a master clock
generator. The clock pulses are applied to all flip-flops and registers in the system,
including the flip-flops and registers in the control unit. The clock pulses do not
change the state of a register unless the register is enabled by a control signal. The
control signals are generated in the control unit and provide control inputs for the
multiplexers in the common bus, control inputs in processor registers, and
microoperations for the accumulator.
There are two major types of control organization:
1. hardwired control and
2. microprogrammed control.
In the hardwired organization, the control logic is implemented with gates, flip-
flops, decoders, and other digital circuits. It has the advantage that it can be
optimized to produce a fast mode of operation. In the microprogrammed
organization, the control information is stored in a control memory. The control
memory is programmed to initiate the required sequence of microoperations. A
hardwired control, as the name implies, requires changes in the wiring among the
various components if the design has to be modified or changed.
In the microprogrammed control, any required changes or modifications can be
done by updating the microprogram in control memory.
 INSTRUCTION CYCLE

A program residing in the memory unit of a computer consists of a sequence of

instructions. These instructions are executed by the processor by going through a
cycle for each instruction.

In a basic computer, each instruction cycle consists of the following phases:

1. Fetch instruction from memory.

2. Decode the instruction.
3. Read the effective address from memory.
4. Execute the instruction.

MOV A,10
MOV B,10
ADD B
 MEMORY REFERENCE INSTRUCTION
In Memory-reference instruction, 12 bits of memory is used to specify an address of
data.

MOV A,1001

REGISTER REFERENCE INSTRUCTIONS

In Register-reference instruction, register is used to specify an address of data.

Register - reference instruction

MOV B,10
MOV A,B
INPUT OUT PUT REFERENCE INSTRUCTIONS

Input-Output instruction

Just like the Register-reference instruction, an Input-Output instruction does not

need a reference to memory and is recognized by the operation code 111 with a 1 in
the leftmost bit of the instruction. The remaining 12 bits are used to specify the type
of the input-output operation or test performed.

PRINT A
 INTERRUPTS

The interrupt is a signal emitted by hardware or software when a process or an

event needs immediate attention. It alerts the processor to a high-priority process
requiring interruption of the current working process.

Hardware interrupts
The interrupt signal generated from external devices and i/o devices are made
interrupt to CPU when the instructions are ready.
For example − In a keyboard if we press a key to do some action this pressing of the
keyboard generates a signal that is given to the processor to do action, such
interrupts are called hardware interrupts.
Hardware interrupts are classified into two types which are as follows −
 Maskable Interrupt − The hardware interrupts that can be delayed when a highest
priority interrupt has occurred to the processor.
 Non Maskable Interrupt − The hardware that cannot be delayed and immediately be
serviced by the processor.

Software interrupts
The interrupt signal generated from internal devices and software programs need to
access any system call then software interrupts are present.
DESIGN OF BASIC COMPUTER
DESIGN OF ACCUMULATOR
UNIT IV
MICRO PROGRAMME

Micro programme is a program which will execute the instruction in the computer
MOV A,10
This instruction is executed by the micro program
Micro-Program is one of the components of the microprocessor. it is a technique to
implement the control logic necessary to execute instructions with in a processor.
Micro-Programs are components of all computer CPUs.
CONTROL MEMORY
A control memory is a part of the control unit. Any computer that involves
microprogrammed control consists of two memories. They are the main memory
and the control memory. Programs are usually stored in the main memory by the
users. Whenever the programs change, the data is also modified in the main
memory. They consist of machine instructions and data.
ADDRESSING SEQUENCE
The CAR (Control Address Register) must first be loaded with an initial address when
a computer is turned on. The first microinstruction address can be described as this
address. We can activate the instruction fetch routine with the help of this address.
MICROPROGRAM EXAMPLE

The process of code generation for the control memory is called

microprogramming.
• The block diagram of the computer configuration is shown in the figure.
• Two memory units:
1. Main memory – stores instructions and data
2. Control memory – stores microprogram
• Four processor registers
1. Program counter – PC
2. Address register – AR
3. Data register – DR
4. Accumulator register - AC
• Two control unit registers
1. Control address register – CAR
2. Subroutine register – SBR
• Transfer of information among registers in the processor is through
MUXs rather than a bus.
• DR receives information from AC,PC or memory.
• AR can receive information from PC or DR
 DESIGN OF CONTROL UNIT

Control unit is for control the execution of instruction

The Control Unit is classified into two major categories:

1. Hardwired Control
2. Microprogrammed Control
Hardwired Control
The Hardwired Control organization involves the control logic to be implemented
with gates, flip-flops, decoders, and other digital circuits.
The following image shows the block diagram of a Hardwired Control organization.
Micro-programmed Control
The Microprogrammed Control organization is implemented by using the
programming approach
PROCESSOR ORGANIZATIONS

Generally CPU organization are of three types on the basis of number of address
fields:
1. Single Accumulator organization
2. General register organization
3. Stack organization

1. An accumulator is a type of register for short-term, intermediate storage of arithmetic

and logic data in a computer's central processing unit (CPU). However, the term is rarely
used in reference to contemporary CPUs, having been replaced around the turn of the
millennium by the term

[Link] register organization

o AC ( accumulator )
o DR ( Data registers )
o AR ( Address registers )
o PC ( Program counter )
o MDR ( Memory data registers )
o IR ( index registers )
o MBR ( Memory buffer registers )
[Link] organization.

The stack can be arranged as a set of memory words or registers. Consider a 64-word
register stack arranged as displayed in the figure. The stack pointer register includes
a binary number, which is the address of the element present at the top of the stack.
The three-element A, B, and C are located in the stack.
 INSTRUCTION FORMATE

The set of instructions that manages the operation codes is called the format of
instruction. The design of bits in instruction is supported by the format of instruction
Types of instruction format include:
 Zero(0) Address Instruction format
 One(1) Address Instruction format
 Two(2) Address Instruction format
 Three(3) Address Instruction format
Zero Address Instruction examples
 Assembly language instruction – PUSH A, PUSH B etc.
 Stack transfer operation – TOS <- A, TOS <- B etc.
2. One Address Instruction examples
 Assembly language instruction – LOAD C, ADD B, STORE T etc.
 Operation Register instruction – AC <- M[T], AC <- M[C] etc.
3. Two Address Instruction examples
 Assembly language instruction – MOV R1, A; ADD R1, B etc.
 Operation Register instruction – R1 <- M[A], R2 <- M[C] etc.
ADDRESSING MODES

The address where the data is stored is called addressing modes

Immediate Mode
In this mode, the operand is specified in the instruction itself. An immediate mode
instruction has an operand field rather than the address field
ADD 7

Implied Addressing Mode:

no address field at all.
RLC

Direct and Indirect Addressing Modes:

Direct Addressing Mode is also known as “Absolute Addressing Mode”.In this mode
the address of data (operand) is specified in the instruction itself
ADD A

Indirect Addressing Mode:

In this mode, the address field of instruction gives the memory address where on,
the operand is stored in memory.
ADD (A)

.Register Addressing Mode:

, the operands are in registers that reside within the CPU
MOV AX, BX Move contents of Register BX to AX

Register Indirect Addressing Mode:

, the instruction specifies a register in CPU whose contents give the operand in
memory.
MOV AL, [BX]
DATA TRANSFER AND MANIPULATIONS

Data Manipulation Instructions :

Data manipulation instructions perform operations on data and provide the
computational capabilities for the computer. The data manipulation instructions in a
typical computer usually divided into three basic types as follows.

Arithmetic instructions
Logical and bit manipulation instructions
Shift instructions

Arithmetic instructions :
The four basic arithmetic operations are addition, subtraction, multiplication, and
division. Most computers provide instructions for all four operations.
Typical Arithmetic Instructions –

Logical and Bit Manipulation Instructions :

Logical instructions perform binary operations on strings of bits stored in registers
Clear , AND, etc…

Shift Instructions :
Shifts are operations in which the bits of a word are moved to the left or right.
SHR
PROGRAM CONTROL
Instructions are always stored in successive memory locations. When processed in the CPU,
the instructions are fetched from consecutive memory locations and executed. Each time
an instruction is fetched from memory, the program counter is incremented so that it
contains the address of the next instruction in sequence. After the execution of a data
transfer or data manipulation instruction

1002 Mov A,10

(Program control) 1002 1004 MOV B,10
1006 ADD B
UNIT V
MEMORY ORGANIZATION
he memory is organized in the form of a cell, each cell is able to be identified with a
unique number called address. Each cell is able to recognize control signals such as
“read” and “write”, generated by CPU when it wants to read or write address.

Volatile Memory: This loses its data, when power is switched off.
Non-Volatile Memory: This is a permanent storage and does not lose any data when
power is switched off.

Main Memory
The memory unit that communicates directly within the CPU, Auxillary memory and
Cache memory, is called main memory. It is the central storage unit of the computer
system. It is a large and fast memory used to store data during computer operations.
Main memory is made up of RAM and ROM, with RAM integrated circuit chips holing
the major share.

RAM: Random Access Memory

DRAM: Dynamic RAM, is made of capacitors and transistors, and must be refreshed
every 10~100 ms. It is slower and cheaper than SRAM.
SRAM: Static RAM, has a six transistor circuit in each cell and retains data, until
powered off.
NVRAM: Non-Volatile RAM, retains its data, even when turned off. Example: Flash
memory.
ROM: Read Only Memory, is non-volatile and is more like a permanent storage for
information. It also stores the bootstrap loader program, to load and start the
operating system when computer is turned on. PROM(Programmable ROM),
EPROM(Erasable PROM) and EEPROM(Electrically Erasable PROM) are some
commonly used ROMs.
Auxiliary Memory
Devices that provide backup storage are called auxiliary memory. For example:
Magnetic disks and tapes are commonly used auxiliary devices. Other devices used
as auxiliary memory are magnetic drums, magnetic bubble memory and optical
disks.
Cache Memory
The data or contents of the main memory that are used again and again by CPU, are
stored in the cache memory so that we can easily access that data in shorter time.
MEMORY MAPPING
Memory-mapping is a mechanism that maps a portion of a file, or an entire file, on
disk to a range of addresses within an application's address space.
ASSOCIATIVE MEMORY

An associative memory can be considered as a memory unit whose stored data can
be identified for access by the content of the data itself rather than by an address or
memory location.

Associative memory is often referred to as Content Addressable Memory (CAM).

CACHE MEMORY

Cache Memory is a special very high-speed memory. It is used to speed up and

synchronizing with high-speed CPU. Cache memory is costlier than main memory or
disk memory but economical than CPU registers. Cache memory is an extremely fast
memory type that acts as a buffer between RAM and the CPU. It holds frequently
requested data and instructions so that they are immediately available to the CPU
when needed.
VIRTUAL MEMORY
Virtual Memory is a storage scheme that provides user an illusion of having a very
big main memory. This is done by treating a part of secondary memory as the main
memory.

In this scheme, User can load the bigger size processes than the available main
memory by having the illusion that the memory is available to load the process.

Instead of loading one big process in the main memory, the Operating System loads
the different parts of more than one process in the main memory.

By doing this, the degree of multiprogramming will be increased and therefore, the
CPU utilization will also be increased.
MEMORY MANAGEMENT HARDWARE

Memory is the important part of the computer that is used to store the data. Its
management is critical to the computer system because the amount of main
memory available in a computer system is very limited. At any time, many processes
are competing for it. Moreover, to increase performance, several processes are
executed simultaneously. For this, we must keep several processes in the main
memory, so it is even more important to manage them effectively

paged memory management unit (PMMU) is a computer hardware unit having all
memory references passed through itself, primarily performing the translation of
virtual memory addresses to physical addresses
HIT / MISS RATIO

A hit ratio is a calculation of cache hits, and comparing them with how many total
content requests were received.

A miss ratio is the flip side of this where the cache misses are calculated and
compared with the total number of content requests that were received.

INPUT OUTPUT ORGANIZATION

The I/O subsystem of a computer provides an efficient mode of communication
between the central system and the outside environment.

There are three types of peripherals:

1. Input peripherals : Allows user input, from the outside world to the
computer. Example: Keyboard, Mouse etc.
2. Output peripherals: Allows information output, from the computer to the
outside world. Example: Printer, Monitor etc
3. Input-Output peripherals: Allows both input(from outised world to
computer) as well as, output(from computer to the outside world). Example:
Touch screen etc
PERIPHARAL DEVICES
Peripheral Devices Input or output devices that are connected to computer are called
peripheral devices..

There are three types of peripherals:

1. Input peripherals : Allows user input, from the outside world to the
computer. Example: Keyboard, Mouse etc.
2. Output peripherals: Allows information output, from the computer to the
outside world. Example: Printer, Monitor etc
3. Input-Output peripherals: Allows both input(from outised world to
computer) as well as, output(from computer to the outside world). Example:
Touch screen etc.
I/O INTERFACE

Interface is a shared boundary btween two separate components of the computer

system which can be used to attach two or more components to the system for
communication purposes.

Input-Output Interface
Peripherals connected to a computer need special communication links for
interfacing with CPU.

In computer system, there are special hardware components

between the CPU and peripherals to control or manage the input-output transfers.
These components are called input-output interface units
MODES OF TRANSFER SYNCHRONUZ
In Synchronous Transmission, data is sent in form of blocks or frames
There is no gap present between data. It is more efficient and more reliable than
asynchronous transmission to transfer a large amount of data.
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MODE OF TRANSFER ASYNCHRONOUS
In Asynchronous Transmission, data is sent in form of byte or character. This
transmission is the half-duplex type transmission. In this transmission start bits and
stop bits are added with data. It does not require synchronization or continuous data
transfer.
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PRIORITY INTERRUPTS
It is a system responsible for giving the priority at which devices generating interrupt
signals simultaneously should be serviced by the CPU.
Hardware Interrupt…
If interrupt signals are sent by devices connected externally, the interrupt is a
hardware interrupt. Following are the types of hardware interrupts:
Maskable Interrupt..
The hardware interrupt can be postponed when an interrupt with high priority
occurs at the exact moment.
Non Maskable Interrupt…
This hardware interrupt cannot be postponed and should be processed immediately
by the processor.
Software Interrupt…
If interrupt signals are caused due to an internal system, the interrupt is known as a
software interrupt. Following are the types of software interrupts:
STROBE CONTROL
Strobe is a control technique for control the data transfer.
The strobe control technique of asynchronous data transfer operates a single control
line to time each transfer. The strobe can be activated by either the source or the
destination unit.
DMA(Direct Memory Access)

Direct memory access (DMA) is a method that allows an input/output (I/O) device to
send or receive data directly to or from the main memory, bypassing the CPU to
speed up memory operations
INPUT OUTPUT PROCESSOR

The Input Output Processor (IOP) is just like a CPU that handles the details of I/O
operations. The IOP can fetch and execute its own instructions that are specifically
designed to characterize I/O transfers.
SERIAL COMMUNICATIONS
Serial communication is a communication method that uses one or two transmission
lines to send and receive data, and that data is continuously sent and received one
bit at a time. Serial communication is the process of sequentially or one by one
transferring the information/bits on the same channel.
IO CONTROLLER

Control the data flow between IO devices and CPU. An I/O controller connects input
and output (I/O) devices to the bus system of a central processing unit (CPU)