Chapter 4:

INSTRUCTION SET of 8086 MICROPROCESSOR

Contents:
Instruction set basics
--Instructions
--Instructions set
--ISA, Programs
Types of instruction set in 8086 microprocessor
1. Data Movement /Transfer/Copy Instructions
2. Arithmetic Instructions
3. Bit Manipulation Instructions
4. Control Transfer (Branch) Instructions
5. Iteration Control (Loop) Instructions
6. Flag Manipulation & Machine (Processor) Control Instructions
7. String Instructions
8. Interrupt Instructions 1
Introduction
Program
A set of instructions written to solve a problem.

Instruction
Directions which a microprocessor
follows to execute a task or part of a
task.

Computer language

High Level
Low Level

Machine Language
Assembly Language
 Binary bits  English Alphabets
 ‘Mnemonics’
 Assembler Mnemonics 
Machine Language

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 Introduction... Cont’d
Program is a set of instructions written to solve a problem. Instructions are the directions
which a microprocessor follows to execute a task or part of a task.
Broadly, computer language can be divided into two parts as high-level language and low
level language. Low level language are machine specific. Low level language can be further
divided into machine language and assembly language.

Machine language is the only language which a machine can understand. Instructions in this
language are written in binary bits as a specific bit pattern. The computer interprets this bit
pattern as an instruction to perform a particular task. The entire program is a sequence of
binary numbers. This is a machine-friendly language but not user friendly. Debugging is
another problem associated with machine language.

To overcome these problems, programmers develop another way in which instructions are
written in English alphabets. This new language is known as Assembly language. The
instructions in this language are termed mnemonics.
As microprocessor can only understand the machine language so mnemonics are translated
into machine language either manually or by a program known as assembler.

Efficient software development for the microprocessor requires a complete familiarity with the
instruction set, their format and addressing modes.

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 Instruction set basics
• Instruction:- An instruction is a binary pattern designed
inside a microprocessor to perform a specific function.
• The entire group of instructions that a microprocessor supports
is called Instruction Set.
• 8086 has more than 20,000 instructions.

• Instruction Set Architecture (ISA) describes the design of a

Computer in terms of the basic operations it must support.
• Instruction Set Architecture (ISA) is the set of instructions,
their machine codes and their semantics.
• ISA defines the types of instructions to be supported by the
processor, the Instruction Format of each type of instruction
and the maximum length of each type of instruction. 
• For example, ADD instruction is found in most ISAs.
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 What is instruction & instruction set architecture?
What is an Instruction?
An instruction is a statement that is executed at runtime.
8086 instruction statement can consist of four parts:
•Label (optional)
•Instruction code (required)
•Operands (instruction specific)
•Comment (optional)
Start: mov AX, BX ; copy the contents of BX into AX

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 Instruction set basics
• An instruction set is the set of instructions, and It is a part of
computer architecture.
• It specifies the operations, operands, and sequence for the
processing of instructions.
• Microprocessor understands only Machine language
o Cannot understand Assembly Language
• Assembler:- it converts the instruction into sequence of
binary bits, so that this bits can be read by the processor.
• Mnemonics:- these are the symbolic codes for either
instructions or commands to perform a particular
function.
o E.g. MOV, ADD, SUB etc.
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 Instruction set basics
• A program consists of a number of CPU instructions.
• Each instruction consist of an
o instruction code (Opcode) and
o one or more operands (data which the instruction manipulates).
• Opcode:- It stands for operational code. It specifies the type of
operation to be performed by CPU. It is the first field in the machine
language instruction format.
o E.g. B8 is the opcode for instruction “MOV AX, immediate ”.
• Operand:- We can also say it as data on which operation should act.
o operands may be register values or memory values.
o The CPU executes the instructions using information present in this field.
 It may be 8-bit data or 16-bit data.
• The instruction code specifies to the CPU what to do, where the data is
located and where the output data will be put.
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Types of instruction set of 8086 Microprocessor
The instruction set of 8086 is divided into 8 major groups.
1. Data Transfer/Copy Instructions
2. Arithmetic Instructions
3. Bit Manipulation Instructions
I. Logical Instructions
II. Shift & Rotate Instructions
4. Control Transfer (Branch) Instructions
Call, JMP, RET, J condition
5. Iteration Control (Loop) Instructions
6. Flag Manipulation & Machine (Processor) Control
Instructions
I. Flag Manipulation Instructions
II. Processor Control Instructions
7. String Instructions---LODS, MOVS, CMPS, SCAS, STOS,
REP
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 (1). Data movement instructions.
Study about Various instructions that are used for
transferring data within the 8086 microprocessor.
 Instructions that are used to copy/transfer data/ address in to
registers, memory locations and I/O ports.

This transfer of data can be either from register to register,

register to memory or memory to register.
 Directloading of segment register with immediate data is not
permitted.
 Memory to memory transfer of data directly is not possible.
 Generally involve two operands: Source operand and Destination operand of
the same size.
 Source: Register or a memory location or an immediate data
 Destination : Register or a memory location.

 The size should be either a byte or a word.

 A 8-bit data can only be moved to 8-bit register/ memory and a 16-bit data50can
be moved to 16-bit register/ memory.
 (1). Data movement instructions.
 Following are some instructions that are used for data transfer purpose:
 Mnemonics:
 MOV, PUSH, POP, XCHG, IN, OUT, XLAT, LEA, LDS,
LES, LAHF, SAHF, PUSHF, POPF
Instruction to transfer word:
 MOV, PUSH, POP, XCHG, XLAT,

Instructions for input and output port transfer:

 IN, OUT

Instructions to transfer the Address

 LEA, LDS, LES

Instructions to transfer flag registers:

 LAHF, SAHF, PUSHF, POPF
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 (1). Mov instructions
(1). Syntax: MOV Destination, Source
This instruction simply copies the data from the source to
the destination.
 Source can be register, memory location or immediate data.
 Destination can be register or memory operand.
 Both Source and Destination cannot be memory location or
segment registers at the same time.
 Both source & destination must be same size.
 In other words, direct loading of the segment registers with immediate
data is not permitted. To load the segment registers with immediate
data, one will have to load any general-purpose register with the data
and then it will have to be moved to that particular segment register.
Example: MOV AX, BX
 Example: (MOV DS, 5000H; Not permitted (invalid))
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 (2). Push/Pop Instructions
PUSH Source ------Syntax
This instruction is used to store data into the stack.
Source can be register, segment register or memory.
This instruction pushes the contents of specified source on to
the stack.
Source must be a word.
In this stack pointer is decremented by 2, i.e.,
o The higher byte data is pushed first into (SP-1).
o Then lower byte data is pushed into (SP-2).
o Then, SP SP-2

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Push Source
Let
And
DS = 1122 H
assume
ES = 3344 H
the stack

Note the stack fo the following two consecutive operations

Push DS Push ES

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 POP Destination---Syntax
This instruction copies/retrieves word contents from the stack
memory pointed by SP into the specified destination.
Destination can be register, segment register or memory.

Whenever data is removed from the stack the byte from the
stack segment memory location addressed by SP moves into
the MSB of the destination register and the byte from the stack
segment memory location addressed by SP+1 moves into the
LSB of the destination register.
o In this stack pointer is incremented by 2, this means
 The lower byte data (the value @ SP) is popped first=MSB
 Then higher byte data (the value @ SP+1) is popped next.=LSB
 Then, SP SP+2

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POP Destination
Assume we have a
given stack

Note the stack for the operation:

POP CS

CS [SS : SP]
SP SP + 2

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PUSHF

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3. XCHG Destination, Source
This instruction exchanges contents of Source with
destination.
The syntax of instructions is: XCHG Destination, Source

Source can be register or memory location.

Destination can be memory location or register

Source anddestination both must be words or bytes

Segment registers can‘t be used in this instruction
This instruction can’t exchange the contents of
two memory locations
Source can’t be immediate value.
E.g. XCHG AX, 2424H not allowed

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XCHG Destination, source;

XCHG AX,BX
BEFORE EXECUTION AFTER EXECUTION
AH 20 AL 40 AH 70 AL 80

BH 70 BL 80 BH 20 BL 40
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(4)IN AL/AX, 8-bit/16-bit port address
This instruction is used to transfer data from the
input unit to accumulator.
Input/ reads a byte or word from port to AL or AX

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5. OUT 8-bit/16-bit port address, AL/AX
This instruction is used to transfer data from accumulator to
the output unit.
Used to send out a byte or word from the accumulator to the
provided port
It writes a byte from AL or a word from AX to the specified
port address.
It copies contents of accumulator to the port with 8-bit or
16-bit address.

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 (6) XLAT: Translate
XLAT instruction transfer a byte from the memory location
into the AL register.
XLAT instruction replaces a byte in the AL register with a
byte from a lookup table in memory.
BX register stores the offset of starting address of the lookup
table and AL register stores the byte number from the lookup
table.
This instruction copies byte from address pointed by
[BX+AL] back into AL.
It adds the contents of AL to BX to form a memory address
within the data segment. AL DS:[BX+AL]
It then copies the contents of this address into AL.
 This is the only instruction that adds an 8-bit number to a l6-bit number.
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 It is an example of implied addressing mode
XLAT: Translate instruction is used for finding out the Codes in case of
code conversion problem using lookup table technique.

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8. LEA 16-bit register, address (source)

 LEA Also known as Load Effective Address (LEA).

Used to load the address of operand into the provided
register
LEA REG, Source
 This instruction determines the offset of the variable or
memory location named as ‘Source’ and load this address
in the specified 16-bit register.
 Flags are not affected by LEA instruction.
E.g.

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(9). LDS Destination, source;
 This instruction will load the register that is defined in the
instruction and the data segment (DS) from the source.
 This instruction loads new values into the specified register,
REG, and into the DS register from four successive memory
locations. It loads the DS register with the content of memory
location specified as source in the instruction
o This instruction copies words from two memory locations into the
register, specified in the instruction.
o It then copies a word form the next two memory locations into the
DS register.

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 (10). LES 16-bit register (dest.), address (Source);
 LES Also known as Load Extra Segment (LES).
• Used to load ES register and other provided register with words from
memory.
• LES REG, Mem
• It loads the ES register with the content of memory location
specified as source in the instruction
 This instruction loads new values into the specified register,
REG, and into the ES register from four successive memory
locations.
o The word from the first two memory locations is copied into the
specified register; REG, specified in the instruction.
o And the word from the next two memory location is copied into
ES register.
• E.g.

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 LEA, LES, LDS
 These instructions load a segment register and general purpose
registers with an address directly from memory
 The general forms of these registers

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(11). LAHF- It stands for 'Load AH from Flag register'. This
instruction load the content of lower byte of the flag register into AH
register.

Load lower byte of flag register in AH

 This instruction loads the AH register from the contents of lower
byte of the flag register.
• This command is used to observe the status of the all conditional
flags of flag register.
(12). SAHF-- It stands for 'Store content of AH register to Flag register'.
This instruction stores the content of AH register to the lower byte of
flag register. The contents of the AH register are copied into the
lower byte of the flag register.
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(2). Arithmetic Instructions
These instructions perform the operations like:
 Addition,
 Increment,
 Subtraction,
 Decrement,
 Negation,
 Comparison,
 Multiplication,
 Division,
 BCD Arithmetic
 ASCII Arithmetic
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 Addition group of instructions (ADD, ADC, INC)
ADD destination, source;
 This instruction adds the contents of source operand with the contents of
destination operand.
 The source may be immediate data, memory location or register.
 The destination may be memory location or register.
 However, both the source and destination operands cannot be memory
operands.
 That means memory to memory addition is not possible.
• Also the contents of the segment registers cannot be added using this
instruction
 The result is stored in destination operand.
 AX is the default destination register.
 Both operand must be same size
 Affected Flags: AF, CF, OF, PF, SF, ZF
 E.g. (1). ADD AX,2020H; ADD BL, CL
(2). ADD AX,BX;
 Mov AX, 12FFH
 Mov BX, 0001H if you want to add this 16 bit numbers once, we use
ADD AX, BX normal ADD instruction; if carry is their it is stored 29in
 ADC destination, source
 This instruction adds the contents of source operand with the
contents of destination operand and the carry flag bit (which may
be set as a result of the previous calculations).
 The source may be immediate data, memory location or
register.
 The destination may be memory location or register.
 The result is stored in destination operand.
 AX is the default destination register.
 Both operands must have the same size.
 Affected Flags: AF, CF, OF, PF, SF, ZF
 ADC BL, CL------BL= BL+CL+CF here carry is added before
this instruction
 But ADD BL, CL--- BL= BL+CL here there may be carry but it
is sent to carry flag in this instruction

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 ADC destination, source
Mov AX, 12FFH
Mov BX, 0001H if you want to add this two 16 bit numbers as two 8
ADC AX, BX bit numbers independently, i.e. lower byte first and
then higher byte for some reason, we must use add with carry.
This is the carry before the instruction is placed.
 First we must add the lower byte because the carry of lower byte
must be added in the higher byte.
 So when we want to add the lower byte we use simple addition (ADD).
 The higher byte is computed with ADC, because the carry of the
previous computation (lower byte) must be added.
 We must know when to use ADD and ADC.
 They have their own roles in assembly language programing.
 Suppose the program is written for the 80286 to add the 32 bit numbers in the 8086
AX and BX registers? So we must add independently as 16 bits. 31
INC Destination
 This instruction increases the contents of Destination operand by
1.
 The Destination may be memory location or register.
 The Destination can not be immediate data. Why?
 The result is stored in the same place.
 Flags Affected: AF, OF, PF, SF, ZF
 Note: CF is not affected
 If contents of 8-bit register are FFH and 16-bit register are
FFFFH, after INC instruction contents of registers will be zero
without affecting carry flag.
 Mov AX, FFFFH Mov AL, FFH
 INC AX INC AL
 Why CF is not affected here??– Because the carry is preserved
across loop iterations & has impact only on Addition and subtraction
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 BEFORE EXECUTION AFTER EXECUTION

AH 10 AL 11 INC AX AH 10 AL 12

BEFORE EXECUTION AFTER EXECUTION

5000H 1011 INC [5000H] 5000H 1012

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Subtraction instructions (Sub, SBB, DEC, CMP,
NEG)

SUB destination, source;

 This instruction subtracts the contents of source operand from
contents of destination.
 The source may be immediate data, memory location or
register.
 The destination may be memory location or register.
 The result is stored in the destination place.
 Flags Affected: AF, CF, OF, PF, SF, ZF
 E.g. (1). SUB AX,1000H;
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 (2). SUB AX,BX;
SBB destination, source;
 Also known as Subtract with Borrow.
 This instruction subtracts the contents of the source
operand & the borrow flag (CF) which may reflect the
result of the previous calculations, from contents of
destination operand.
 Subtraction with borrow, here means subtracting 1
from the subtraction obtained by SUB, if carry
(borrow) flag is set.
 The source may be immediate data, memory location
or register.
 The destination may be memory location or register.
 The result is stored in the destination place.
 E.g. (1). SBB AX,1000H; AX=AX-1000H-CF
(2). SBB AX,BX; AX=AX-BX-CF
(3). SBB DL, CL; DL= DL- CL- CF

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e.g.

BEFORE EXECUTION AFTER EXECUTION

B 1 SBB AX,1000H
AH 20 AL 20 AH 10 AL 1F
2020
- 1000
1020 -1 = 101F
BEFORE EXECUTION AFTER EXECUTION
B 1
AH 20 AL 20 AH 10 AL 1F
SBB AX,BX
BH 10 BL 10 BH 10 BL 10

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SUB destination, source;
SBB destination, source;

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 DEC destination
 This instruction decreases the contents of destination operand
by 1.
 The destination may be memory location or register.
 The destination can not be immediate data.
 The result is stored in the same place.
 Flags Affected: AF, OF, PF, SF, ZF
 Note: CF is not affected
 If the contents of 8-bit register are 00H and 16-bit register are
0000H, after DEC instruction contents of register will be FFH
and FFFFH respectively without affecting carry flag.

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 NEG destination
This instruction replaces the number in a
destination with 2’s complement of that number.
For obtaining 2’s complement it subtracts the
contents of destination from zero.
 This instruction can be implemented by inverting
each bit and adding 1(one) to it.
 The destination may be memory location or register.
 The destination can not be immediate data.
 The result is stored in the same place.
 Flags Affected: AF, CF, OF, PF, SF, ZF

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 CMP destination, source
 Itcompares two specified bytes or words.
 This instruction compares the contents of source operand
with the contents of destination operands.
 For comparison, it internally subtracts the source operand
from the destination operand but does not store the result
anywhere or value of source and destination does not change.
 But the flags are modified to indicate the result
 The source may be immediate data, memory location or
register.
 The destination may be constant/immediate, memory
location or register.
 The source and destination both can’t be memory location.

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 CMP destination, source
 The flags are affected depending upon the result of the
subtraction:
 If both of the operands are equal, zero flag is set.
 If the source operand is greater than the destination
operand, carry flag is set or else, carry flag is reset
(CF=0 for less than).
 Then resulting carry & zero flag will be set or reset.

Example:

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CMP destination, source
 We can check this instruction by using 2’s compliment method.
Destination-Source
1. Do 2’s compliment of the source or negative number
2. Add the destination to the 2’s compliment
3. If CF=1, ZF=0, SF=1 on step 2 then destination is greater
than the source or result is positive.
4. If no final carry occurs and ZF=0, SF=0 then destination is
smaller than the source or result is negative
5. If no final carry occurs and ZF=1 SF=0 both of the operands
are equal, zero flag is set.

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CMP destination, source

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CMP destination, source

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CMP destination, source

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 D=S: CY=0,Z=1
BEFORE EXECUTION D>S:
CY=0,Z=0 AFTER EXECUTION
D<S: CY=1,Z=0
AH 10 AL 00
CMP AX,BX CY 0 Z 1
BH 10 BL 00

BEFORE EXECUTION AFTER EXECUTION

AH 10 AL 00
CMP AX,BX CY 0 Z 0
BH 00 BL 10

BEFORE EXECUTION AFTER EXECUTION

AH 10 AL 00
CMP AX,BX CY 1 Z 0
BH 20 BL 00

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Multiplication Instruction (MUL & IMUL)
There are 3 different cases
1. When two bytes are multiplied
 Multiplicand is in AL register
 Multiplier is in a byte in memory or another register
 product is stored in AX
 AL*8bit number =AX
2. When two one word values are multiplied
 Multiplicand is in AX register
 Multiplier is in a word in memory or another register
 Product is double word which is stored higher word (leftmost)
portion in DX and lower order word (right most) portion in AX
 AX*16bit number = DX AX
3. When two double word values are multiplied
 EAX*32bit number = EDX EAX
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Multiplication Instruction (MUL & IMUL)

 Syntax: MUL source---used for unsigned multiplication.

 This instruction multiplies an unsigned byte from source and an
unsigned byte in AL register, or an unsigned word from source and
an unsigned word in AX register.
 The source can be a register or a memory location.
 When the byte/8 bit number is multiplied by the contents of AL,
the result is stored in AX.
o The most significant byte is stored in AH and the least
significant byte is stored in AL.
o AL*8bit number =AX
 When a word/16bit number is multiplied by the contents of AX,
the most significant word of the result is stored in DX and least
significant word of result is stored in AX.
 AX*16bit number = DX AX
(1). MUL BH // AX= AL*BH;
E.g. 48
 IMUL Instruction
 Syntax: IMUL source
 This instruction multiplies a signed byte from some source and a
signed byte in AL register, or a signed word from some source and
a signed word in AX register.
 The source can be a register or a memory location.
 When a signed byte is multiplied by AL, a signed result will be put
in AX.
o The most significant byte is stored in AH and the least
significant byte is stored in AL.
 When a signed word is multiplied by AX, the high-order word of
the signed result is stored in DX and the low-order word of the
signed result is stored in AX.
 To multiply a signed byte with a signed word, it is necessary to
move the byte into a word location and fill the upper byte of the
word with copies of the sign bit.
 This can be done using CBW instruction.
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DIV Instruction… cont’d
Syntax: DIV source---used for unsigned division
 This is used to divide an unsigned word by a byte or
to divide an unsinged double word by a word.
 CASE ONE:
o When dividing a word by a byte, the word must
be in AX register.
 After division, AL will contain an 8-bit quotient and
AH will contain an 8-bit remainder.
 If an attempt is made to divide by 0 or the quotient is
too large to fit in AL register (greater than FFH), the
8086 will automatically execute a type 0 interrupt.

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 DIV Instruction… cont’d
 Syntax:DIV source
 CASE TWO:
o When a double word is divided by a word, the most
significant word of the double word must be in DX and the
least-significant word of the double word must be in AX.
 After division, AX will contain a 16-bit quotient and DX
will contain a 16-bit remainder.
 If an attempt is made to divide by 0 or the quotient is too
large to fit in AX register (greater than FFFFH), the
8086 will automatically execute a type 0 interrupt.
o The source can be a register or a memory location.
o Type 0 interrupts: This interrupt is also known as the
divide by zero interrupt. For cases where the quotient
becomes particularly large to be placed or 0 divisor /
adjusted an error might occur.
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 DIV Instruction… cont’d
Syntax: DIV source
 To divide a byte by a byte
o It is necessary to put the dividend byte in AL and
fill AH with all 0’s.
 To divide a word by a word
o It is necessary to put the dividend word in AX and
fill DX with all 0’s
MOV AX, 0203 // AX=0203
 E.g. MOV BL, 04 // BL=04
DIV BL // AL=0203/04=50 (i.e. AL=50 & AH=03)

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DIV Instruction… cont’d

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IDIV Instruction

Syntax: IDIV source

 This is used to divide a signed word by a signed
byte, or to divide a singed double word by a signed
word.
 Rest all is similar to DIV instruction.
 E.g.
MOV AX, -0203 // AX=-0203
MOV BL, 04 // BL=04
IDIV BL // AL=-0203/04=-50 (i.e. AL=-50 & AH=03)

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IDIV Instruction … cont’d

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Multiplication and Division Examples

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57
 3. Bit Manipulation Instructions
These instructions are used to perform operations where
data bits are involved.
 These instructions are used at the bit level.
 These instructions are grouped into:
 Logical Instructions
 Shift & Rotate Instructions
Logical Instructions
 Instructions to perform Logical operations
o NOT
o AND
o OR
o XOR
o TEST
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 3. Bit Manipulation Instructions
Shift and Rotate Instructions
 Instructions to perform Shift operations
o SHL… Shift Left/SAL… Shift Arithmetic Left
o SHR-Shift Right they are different
o SAR-Shift Arithmetic Right
Immediate operand is not allowed in any of the shift instructions.
Instructions to perform Rotate operations
o ROL… Rotate Left=MSB is pushed into CF and simultaneously it is
transferred into the LSB position at each operation
o ROR… Rotate Right=LSB is pushed into CF and simultaneously it is
transferred into the MSB position at each operation
o RCL… Rotate Left through Carry flag= CF pushed to MSB & the LSB
is pushed to CF
o RCR… Rotate Right through Carry flag = CF pushed to LSB & the
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MSB is pushed to CF
Shift Instructions
SHL…Shift Left/SAL…Shift Arithmetic Left
 These instructions shift the operand word or Byte bit by
bit to the left and insert zeros in the newly introduced least
significant bits.
 All flags are affected depending upon the result
 The shift operation is through carry flag.

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Shift Instructions
 SHR… Shift Right Instructions
 These instructions performs bit-wise right shifts on the
operand word or Byte that may reside in a register or
memory location and insert zeros in the shifted positions.
 The result is stored in the destination operand.
 All flags are affected depending upon the result
 The shift operation is through carry flag.

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Shift Instructions
 SAR… Shift Arithmetic Right
 This instructions performs bit-wise right shifts on the operand
word or Byte that may reside in a register or memory location
 It inserts the most significant bit of the operand in the newly
inserted positions
 The result is stored in the destination operand.
 All the condition flags are affected depending upon the result.
The shift operation is through carry flag.

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Rotate Instructions

63
Rotate Instructions

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Rotate Instructions Examples

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 4. Iteration Control (LOOP) Instructions
• These instructions are used to execute a series of instructions some
number of times.
• The number is specified in CX register.
• CX register automatically decremented by one, each time after the
execution of the loop instructions. Until CX=0, execution will jump
to a destination specified by a label in the instruction.
• If the condition is false , execution simply goes onto the next
instruction after the iteration control instruction.

Mnemonic Meaning Condition for exit

LOOP Loop CX=0
LOOPE/LOOPZ Loop while equal/ Loop CX= 0 or ZF = 0
while Zero
LOOPNE/LOOPNZ Loop while not equal / CX = 0 or ZF = 1
Loop while not zero 66
 Iteration Control (LOOP) Instructions
Example
Write a program to move a block of 100 consecutive bytes of data starting at offset
address 400H in memory to another block of memory locations starting at offset
address 600H. Assume both block at the same data segment 3000H. Use LOOP
instruction.
 Solution:
MOV AX, 3000H
MOV DS, AX
MOV SI, 0400H
MOV DI, 0600H DS=3000H
MOV CX, 64H
ES=3000H
NXT: MOV AH, [SI]
MOV [DI], AH
INC SI SI=0400H
INC DI DI=0600H
LOOP NXT Counter=CX=64H=100byte
HLT What is the PA for the first
Memory locations in source
as well as in Destinations?
Why C is 64H? 67
 5. Flag Manipulation and Processor Control
Instructions
 THESE INSTRUCTIONS CONTROL THE FUNCTIONING OF
THE AVAILABLE HARDWARE INSIDE THE PROCESSOR
CHIP
 TWO TYPES:

I. FLAG MANIPULATION
II. MACHINE(PROCESSOR ) CONTROL INSTRUCTIONS

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 Flag Manipulation and Processor Control
Instructions
• FLAG MANIPULATION Instructions
 The flag manipulation instructions directly modify some of
the flags of 8086.
 These instructions modify the carry, direction and interrupt
flags

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70
Processor Control Instructions

• Machine Control Instructions

 These instructions control the bus usage and
execution.
 Don't require any operand

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 Processor Control Instructions

• HLT instructions----The halt instruction (HLT) stops Fetching and

executing of instructions.
• The wait Instruction—when this instruction executes the 8086 enters
an idle condition where it is doing no processing.
• The ESC instruction---it is used to pass instructions to a coprocessor
such as the 8087 math coprocessor which shares the address and data
bus of 8086.
• NOP instruction----at the time of NOP instruction execution, no
operation is performed except fetch and decode.
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 Processor Control Instructions

• Machine Control Instructions

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Flag manipulation and Processor Control Instructions

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The End of Chapter 4

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Quiz 5%
1. Explain various data addressing modes with the help of examples in
8086?
2. Explain the use of Push and POP instruction in 8086?
3. write the interpretations of the following instructions of 8086?
A. mov AX, CL
B. mov DS:[0004H], BX
4. write the difference between the following instruction
A. mov DX, 437AH and mov DX, [437AH]
5. Write at least 5 data movement instruction set types of 8086?

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