Chapter 4

Input Output Systems

 Introduction
 Computer has no use without some means of getting
data into it and information out of it.
 I/Os are the main reason for the slowness or the
fastness of the processing time.
 Module Function
The major functions or requirements for an I/O module
fall into the following categories:
■ Control and timing
■ Processor communication
■ Device communication
■ Data buffering
■ Error detection
 I/O Architectures
 Input/output subsystem is a components that moves
coded data between external devices and a host
system, consisting of a CPU and main memory.
It includes:
• Blocks of main memory that are devoted to I/O
functions
• Buses that provide the means of moving data into
and out of the system
• Control modules in the host and in peripheral
devices
• Interfaces to external components such as keyboards
and disks
• Cabling or communications links between the host
system and its peripherals
 Cont’d…
• The I/O modules take care of moving data between
main memory and a particular device interface.
• Interfaces are designed specifically to
communicate with certain types of devices, such as
keyboards, disks, or printers.
• Interfaces handle details of the devices that are
ready for the next batch of data, or that the host is
ready to receive the next batch of data coming in
from the peripheral device.
• The exact form and meaning of the signals
exchanged between a sender and a
receiver is called protocol.
• Protocols comprise command signals, status
signals, or data-passing signals.
 I/O Control methods
There are four general I/O control methods.
These are:
[Link] I/O -is when the system devote at
least one register for the exclusive use of each I/O
device.
 Since the CPU continually monitors each
register waiting for data to arrive, it sometimes
referred to as polled I/O.
Polling: is the monitoring of CPU for the registers.
 The benefit of programmed I/O is that we have
programmatic control over the behavior of each
device.
 Cont’d…
 The disadvantages of the programmed I/O are:
[Link] register polling,
2. Busy wait of CPU until it starts
servicing an I/O request.
 However, programmed I/O is
best suited for special-purpose systems such as
ATM and systems that control environmental
events.
 Cont’d…
2. Interrupt-Driven I/O –is a converse of the
programmed I/O.
 The I/O devices tell the CPU when they have data
to send. Consequently, the CPU proceeds with
other tasks until a device requesting service
interrupts.
 Interrupts are usually signaled with a bit in the
CPU flags register called an interrupt flag.
 Once the interrupt flag is set, the operating
system interrupts whatever program is currently
executing, saving that program’s state and
variable information.
…
 Cont’d…
3. Direct memory access-With both programmed
I/O and interrupt-driven I/O, the CPU moves data
to and from the I/O device.
• This is the idea behind direct memory
access(DMA)
• When a system uses DMA, the CPU offloads
execution of tedious I/O instruction.
• the CPU provides the DMA controller with the
location of the bytes to be transferred, the
number of bytes to be transferred, and the
destination device or memory address
 Cont’d…
• This communication usually takes place through special I/O registers
on the CPU.
• The DMA uses memory cycles that would otherwise be used by the
CPU. This is called cycle stealing.
• In cycle Stealing(low buffer size ) DMA sends data in the form of
byte by byte or word by word
• Fortunately, I/O tends to create burst traffic on the bus: data is sent in
blocks, or clusters.
Cont’d…
 Cont’d…
[Link] I/O-
• Programmed I/O transfers data one byte at a time.
• Interrupt-driven I/O can handle data one byte at a time
or in small blocks, depending on the type of device
participating in the I/O. Slower devices such as
keyboards generate more interrupts per number of bytes
transferred than disks or printers.
• Most mainframes use an intelligent type of DMA
interface known as an I/O channel.
• With channel I/O, one or more I/O processors control
various I/O pathways called channel paths.
• Channel paths for “slow” devices such as terminals and
printers can be combined (multiplexed), allowing
management of several of these devices through only
one controller.
 Cont’d…
• On IBM mainframes, a multiplexed channel path is
called a multiplexor channel.
• Channels for disk drives and other “fast” devices are
called selector channels.
 I/O Bus Operation
• It is evident that the memory bus and the I/O bus can
be separate entities.
• A reason for having memory on its own bus is that
memory transfers can be synchronous, using some
multiple of the CPU’s clock cycles to retrieve data
from main memory.
• I/O buses, on the other hand, cannot operate
synchronously. They must take into account the fact
that I/O devices cannot always be ready to process an
I/O transfer.
• I/O buses are called asynchronous.
Cont’d…
 Cont’d…
The important ideas conveyed by the diagram above
are:
•A system bus is a resource shared among many
components of a computer system.
• Access to this shared resource must be controlled. This
is why a control bus is required.
 Cont’d…

• The connection between the DMA circuit

and the device interface circuits is more
accurately represented by the following
figure which shows the individual
component buses.
Cont’d…
 Cont’d…
Real I/O buses typically have more than a dozen
control lines. Control lines coordinate the activities
of the bus and its attached devices. To write data to
the disk drive our example bus executes the
following sequence of operations:
[Link] DMA circuit places the address of the disk
controller on the address lines, and raises (asserts)
the Request and Write signals.
[Link] the Request signal asserted, decoder circuits
in the controller interrogate the address lines.
[Link] sensing its own address, the decoder enables the
disk control circuits. If the disk is available for writing
data, the controller asserts a signal on the Ready line. At
this point, the handshake between the DMA and the
controller is complete. With the Ready signal raised, no
other devices may use the bus.
[Link] DMA circuits then place the data on the lines and
lower the Request signal.
[Link] the disk controller sees the Request signal drop, it
transfers the byte from the data lines to the disk buffer,
and then lowers its Ready signal