Article
Publicly Available
Testing integrated circuits
A special issue on the occasion of the 60th birthday of Prof. Dr. Bernd Becker
Published/Copyright:
July 21, 2014
Published Online: 2014-07-21
Published in Print: 2014-08-28
©2014 Walter de Gruyter Berlin/Boston
Articles in the same Issue
- Frontmatter
- Editorial
- Preface
- Editorial
- Testing integrated circuits
- Special Issue
- On achieving minimal size test sets for scan designs
- An effective fault ordering heuristic for SAT-based dynamic test compaction techniques
- SAT-based ATPG beyond stuck-at fault testing
- Testing for gate oxide short defects using the detectability interval paradigm
- Behavior of stochastic circuits under severe error conditions
- Hardware security and test: Friends or enemies?
Articles in the same Issue
- Frontmatter
- Editorial
- Preface
- Editorial
- Testing integrated circuits
- Special Issue
- On achieving minimal size test sets for scan designs
- An effective fault ordering heuristic for SAT-based dynamic test compaction techniques
- SAT-based ATPG beyond stuck-at fault testing
- Testing for gate oxide short defects using the detectability interval paradigm
- Behavior of stochastic circuits under severe error conditions
- Hardware security and test: Friends or enemies?
