0% found this document useful (0 votes)
36 views57 pages

Computer Data Representation Overview

The document provides an overview of computer data representation, focusing on computer architecture and organization, as well as various number systems including binary, octal, and hexadecimal. It discusses fundamental concepts such as registers, arithmetic circuits, and micro-operations, including addition, subtraction, and logic operations. Additionally, it covers floating-point representation and fixed-point representation methods for signed numbers.

Uploaded by

Divyesh Ahir
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
0% found this document useful (0 votes)
36 views57 pages

Computer Data Representation Overview

The document provides an overview of computer data representation, focusing on computer architecture and organization, as well as various number systems including binary, octal, and hexadecimal. It discusses fundamental concepts such as registers, arithmetic circuits, and micro-operations, including addition, subtraction, and logic operations. Additionally, it covers floating-point representation and fixed-point representation methods for signed numbers.

Uploaded by

Divyesh Ahir
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd

Prof. Amit J.

Vyas
Department of Computer Engineering
V.V.P. Engineering College

1
UNIT-1:-
Computer Data
Representation

2
Definition of COA
➢Computer Architecture: Architecture describes what the
computer does.
➢ Computer organization: organization describes how it is
does it.

➢Computer organization and architecture is define based


on functional behaviour of computer architecture and deal
with structural relational ship with computer organization.
3
Computer architecture Computer organization

Architecture describes Organization describes


what the computer how it does it.
does.
Computer Architecture Computer Organization
deals with functional deals with structural
behavior of computer relationship.
system.
4
Computer architecture Computer organization
its clear that it deals with its also clear that it deals
high-level design issue. with low-level design
issue.
Architecture indicates its Where, Organization
hardware. indicates its
performance.
For designing a For designing a
computer, its architecture computer, organization is
is fixed first. decided after its
architecture. 5
Basic Computer Data Type
1. Number used in Arithmetic computation.
2. Letters of the alphabet used in data processing.
3. Other discrete symbol used for specific purpose.

 All type of data, except binary numbers, are represented in


computer register in binary-coded form. This is because
registers are made up of flip-flops.

6
Number system
 A number system of base or radix, r is a system that uses
distinct symbols for r digits.
 Number represent, multiply each digit by an integer power of r
and then form the sum of all weighted digits.
E.g. 1 x 102 + 2 x 101 + 3 x 100 + 4 x 10-1 = 100+20+3+0.4 = (123.4)10
 Decimal (base/radix : 10)
 Binary (0,1) ) (base/radix : 2)
 Octal (0,1,2,3,4,5,6,7) (base/radix :8)
 Hexadecimal (0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F) (base/radix :16)

7
Number system
 Octal to decimal conversion :
E.g. (736.4)8 = 7 x 82 + 3 x 81 + 6 x 80 + 4 x 8-1 = (478.5)10
 Hexadecimal to decimal conversion:
E.g. (F3)16 = F x 161 + 3 x 160 = 15x16 + 3x1 = (243)10
 Decimal to Binary:
E.g. (0110)2 = 0 x 23 +1 x 22 + 1 x 21 + 0 x 20 = (6)10
 Binary to Octal & Binary to Hexadecimal:

8
Complement

1st Complement
2nd Complement
9th Complement
10th Complement

9
Floating-Point Representation
 + 6132.789

 0.6132789* 10^4

10
 Register: It is a one of a small set of data holding and
data storing places that are parts of computer
processor.

 The symbolic notation used to describe the micro


operation transfers among registers is called a
register transfer language.

11
12
The basic symbols of the register transfer
notation

13
14
Common Bus system for four register
 Each Register have a four bit number 0 to 3. The bus
is consistent of four 4*1 multiplexer. each having four
data input, 0 t0 3 and two selective input s1 and s2.

 The two selection lines s1 and so are connected to


the selection inputs of multiplexer. The selection
line choose the four bits of one register and
transfer them into the four-line common bus.
16
17
 The number of wires will be excessive if separate lines
are used between each other register in the system.
 When s1s2=00,then 0 data inputs so all four multiplexers
and applied to the outputs in multiplexer is 0(Register A).

18
Half Adder

19
Full Adder

20
Truth Table of Full Adder

21
4 bit binary Adder
 As show in Diagram 4 bit binary adder.
 In full adder three input and two output.
 The output is one carry and one sum as show in
diagram.

22
4 bit binary Adder

23
24
Binary Adder –Sub tractor
 The addition and subtraction operation can be perform in
one common operation using exclusive-OR gate and full
adder.

 The circuit is perform in A-B it means A plus and 2nd


complement of B
 M=0 than Adder if A>=B than A-B
 M=1 than sub tractor if A<B than B-A
25
Binary Adder –Sub tractor

26
Binary Increment
 The Half Adder output carry of one Can be forward to next
half adder input.
 The output carry C4 will be 1 only after incrementing
binary 1111 (for all).

 If A0=1,A1=1,A2=1,A3=1 than
 output S0 through S3 to go 0.

27
Binary Increment

28
4-bit Arithmetic Circuit
 AS show in diagram of 4-bit arithmetic circuit as
show in fig.

 It has 4 full –adder circuits that constitute the 4-bit


adder and 4 multiplexer for choosing different
operation.

29
 X0 input A0 and y0 is output of multiplexer.
 Cin is input carry it is 0 or 1.
 A0 values is 0 or 1
 Bo values is 0 or 1 ,in Bo is connected in inverter gate.
 Here two selective input so and s1
 It is generate 8 arithmetic micro-operation.

30
31
Arithmetic Circuit Function Table

32
Three-State Bus Buffer
 A three state gate is digital circuit that exhibits three state
 State1: signal equitant to logic 1
 State 2: signal equitant to logic 2
 State 3 : High Impedance State- open circuit

33
Three-State Bus Buffer
 When the control input c is equal to 1 , the output is
enable and gate behaves like conventional buffer,
with the output equal to normal input.

 When control input c is 0 ,the output is disable


and the gate goes to high impedance state.

34
Three-State Bus Buffer

35
Three-State Bus Buffer
The control inputs to buffer determines which
of the four normal inputs will communicate
with bus line.

No more than one buffer may be in the active


state at any given time.
36
Three-State Bus Buffer
 When the enable input of the decoder is 0, all of its four
outputs are 0, and the bus line is high-impedance state
because all four buffers are disabled.

 When the enable input is active, one of the three-state


buffers will be active, depending on the binary value in
the select input of the decoder.

37
Memory Transfer
 Read operation: The transfer of information from a memory word to the
outside environment is called a read operation.
 Write Operation: The transfer of new information to be stored into the
memory is called a write operation.

 Read: DR M[AR]


 Write: M[AR]→R1

38
Arithmetic micro-operation

39
Logic Micro-operations
 Logic micro operations specify binary operations for
strings of bits stored in registers.

 The symbol ∨ will be used to denote an OR micro


operation and the symbol ∧ to denote an AND micro
operation.

40
example.
 For example, the exclusive-OR micro-operation with the
contents of two registers R1 and R2 is symbolized by the
statement:

41
 There are 16 different logic operations that can be performed with
two binary variables.

42
43
44
Shift micro operations

45
46
[Link] Shift:

 An arithmetic shift-left multiplies a signed binary


number by 2.
 An arithmetic shift-right divides the number by 2.

47
48
Arithmetic Addition

49
50
51
52
Fixed Point Representation
 Signed-magnitude representation
 Signed 1's complement representation
 Signed 2's complement representation

 The negative number is represented in either the 1's or 2's


complement of its positive value.

53
 consider the signed number 14 stored in an 8-bit
register.
 In signed-magnitude representation 1 0001110
 In signed-1's complement representation 1 1110001
 In signed-2's complement representation 1 1110010

54
Arithmetic logic shift

55
56
Thank You

57

You might also like