ATmega16 USART
USART:
- USART stands for Universal Synchronous Asynchronous
Receiver/Transmitter.
- It is basically just a piece of computer hardware that converts parallel
data into serial data.
- USART supports both asynchronous and synchronous modes.
ATmega16 USART Features:
- Full Duplex Operation (Independent Serial Receive and Transmit
Registers)
- Asynchronous or Synchronous Operation
- Supports Serial Frames with 5, 6, 7, 8, or 9 Data bits and 1 or 2 Stop Bits
Modes of Operations:
- Asynchronous Normal Mode: In this mode of communication, the data
is transmitted/received asynchronously, i.e. we do not need (and use)
the clock pulses, as well as the XCK pin.
- Other modes were not covered in the course!
Baud Rate Generation:
- UBBR Register is used to set the required Baud Rate of the USART.
- The following equation is used for Asynchronous normal mode to
calculate the value that should be store in UBBR Register to generate the
required Baud Rate.
𝑓𝑂𝑆𝐶
𝑈𝐵𝑅𝑅 = −1
16 𝐵𝐴𝑈𝐷
- BAUD = Baud Rate in Bits/Second (bps)
- FOSC = System Clock Frequency (i.e. 1MHz)
- UBRR = Contents of UBRRL and UBRRH registers
TA: Abdalla Tawfik
Frame Format:
- Order of Bits:
• Start bit (Always low)
• Data bits (LSB to MSB) (5-9 bits)
• Parity bit (optional) (Can be odd or even)
• Stop bit (1 or 2) (Always high)
Setting the Number of DATA Bits:
- The data size used by the USART is set by the UCSZ2:0, bits in UCSRB and
UCSRC Registers. The Receiver and Transmitter must use the same
setting.
TA: Abdalla Tawfik
Setting the Number of STOP Bits:
- USBS bit selects the number of stop bits to be inserted by the
transmitter. The Receiver ignores this setting. The USBS bit is available in
the UCSRC Register.
Setting the mode of Parity Bit:
- UPM0:1 bits select the parity mode.
Transmitting and Receiving Data:
- Transmitting and Receiving Data are done by writing or reading the UDR
register: (USART Data Register)
- Writing to the UDR will store the data in the TXB (8-bit) then will send
them serially.
- Reading the data from the UDR will copy the data from the RXB (8-bit).
TA: Abdalla Tawfik
USART Control Registers:
UCSRA: USART Control and Status Register A (8-bit):
The most important bits of UCSRA register are mentioned below.
- Bit 7: RxC – USART Receive Complete Flag: This flag bit is set by the CPU
when there are unread data in the Receive buffer and is cleared by the
CPU when the receive buffer is empty.
- Bit 6: TxC – USART Transmit Complete Flag: This flag bit is set by the CPU
when the entire frame in the Transmit Shift Register has been shifted
out and there is no new data currently present in the transmit buffer
(UDR).
- Bit 5: UDRE – USART Data Register Empty: The UDRE Flag indicates if the
transmit buffer (UDR) is ready to receive new data. If UDRE is one, the
buffer is empty, and therefore ready to be written.
UCSRB: USART Control and Status Register B (8-bit):
The most important bits of UCSRB register are mentioned below.
- Bit 4: RXEN – Receiver Enable: Writing this bit to one enables the USART
Receiver. The Receiver will override normal port operation for the RxD
pin when enabled.
- Bit 3: TXEN – Transmitter Enable: Writing this bit to one enables the
USART Transmitter. The Transmitter will override normal port operation
for the TxD pin when enabled.
- Bit 2: UCSZ2 – Character Size: The UCSZ2 bits combined with the
UCSZ1:0 bits in UCSRC register sets the number of data bits (Character
Size) in a frame the Receiver and Transmitter use.
TA: Abdalla Tawfik
UCSRC: USART Control and Status Register C (8-bit):
The most important bits of UCSRC register are mentioned below.
- Bit 7: URSEL – USART Register Select: This bit must be one when writing
the UCSRC.
- Bit 6: UMSEL – USART Mode Select: This bit selects between
Asynchronous and Synchronous mode of operation.
- Bit [Link] UPM1:0 – Parity Mode: This bit helps you enable/disable/choose
the type of parity. (Details described above)
- Bit 3: USBS – Stop Bit Select: This bit helps you choose the number of
stop bits for your frame. (Details described above)
- Bit [Link] UCSZ1:0 – Character Size: These two bits in combination with the
UCSZ2 bit in UCSRB register helps choosing the number of data bits in
the frame. (Details described above)
TA: Abdalla Tawfik
