Combinational Logic Circuit

Combinational circuit is a circuit in which we combine the different gates in

the circuit, for example encoder, decoder, multiplexer and demultiplexer.
Some of the characteristics of combinational circuits are following −

 The output of combinational circuit at any instant of time, depends only on

the levels present at input terminals.
 The combinational circuit do not use any memory. The previous state of
input does not have any effect on the present state of the circuit.
 A combinational circuit can have an n number of inputs and m number of
outputs.
Block diagram

We're going to elaborate few important combinational circuits as follows.

Half Adder
Half adder is a combinational logic circuit with two inputs and two outputs.
The half adder circuit is designed to add two single bit binary number A and
B. It is the basic building block for addition of two single bit numbers. This
circuit has two outputs carry and sum.
Block diagram

Truth Table
S=A’B+AB’

C=A.B
Circuit Diagram

Full Adder
Full adder is developed to overcome the drawback of Half Adder circuit. It
can add two one-bit numbers A and B, and carry c. The full adder is a three
input and two output combinational circuit.
Block diagram

Truth Table
Circuit Diagram

N-Bit Parallel Adder

The Full Adder is capable of adding only two single digit binary number along
with a carry input. But in practical we need to add binary numbers which are
much longer than just one bit. To add two n-bit binary numbers we need to
use the n-bit parallel adder. It uses a number of full adders in cascade. The
carry output of the previous full adder is connected to carry input of the next
full adder.

4 Bit Parallel Adder

In the block diagram, A0 and B0 represent the LSB of the four bit words A and
B. Hence Full Adder-0 is the lowest stage. Hence its C in has been
permanently made 0. The rest of the connections are exactly same as those
of n-bit parallel adder is shown in fig. The four bit parallel adder is a very
common logic circuit.
Block diagram
N-Bit Parallel Subtractor
The subtraction can be carried out by taking the 1's or 2's complement of the
number to be subtracted. For example we can perform the subtraction (A-B)
by adding either 1's or 2's complement of B to A. That means we can use a
binary adder to perform the binary subtraction.
4 Bit Parallel Subtractor
The number to be subtracted (B) is first passed through inverters to obtain its
1's complement. The 4-bit adder then adds A and 2's complement of B to
produce the subtraction. S3 S2 S1 S0 represents the result of binary
subtraction (A-B) and carry output Cout represents the polarity of the result. If
A > B then Cout = 0 and the result of binary form (A-B) then C out = 1 and the
result is in the 2's complement form.
Block diagram

Half Subtractors
Half subtractor is a combination circuit with two inputs and two outputs
(difference and borrow). It produces the difference between the two binary
bits at the input and also produces an output (Borrow) to indicate if a 1 has
been borrowed. In the subtraction (A-B), A is called as Minuend bit and B is
called as Subtrahend bit.
Truth Table
Circuit Diagram

Full Subtractors
The disadvantage of a half subtractor is overcome by full subtractor. The full
subtractor is a combinational circuit with three inputs A,B,C and two output D
and C'. A is the 'minuend', B is 'subtrahend', C is the 'borrow' produced by the
previous stage, D is the difference output and C' is the borrow output.
Truth Table

Circuit Diagram
Multiplexers
Multiplexer is a special type of combinational circuit. There are n-data inputs,
one output and m select inputs with 2m = n. It is a digital circuit which selects
one of the n data inputs and routes it to the output. The selection of one of
the n inputs is done by the selected inputs. Depending on the digital code
applied at the selected inputs, one out of n data sources is selected and
transmitted to the single output Y. E is called the strobe or enable input which
is useful for the cascading. It is generally an active low terminal that means it
will perform the required operation when it is low.

Block diagram
Multiplexers come in multiple variations
 2 : 1 multiplexer
 4 : 1 multiplexer
 16 : 1 multiplexer
 32 : 1 multiplexer

Block Diagram

Truth Table
Demultiplexers
A demultiplexer performs the reverse operation of a multiplexer i.e. it
receives one input and distributes it over several outputs. It has only one
input, n outputs, m select input. At a time only one output line is selected by
the select lines and the input is transmitted to the selected output line. A de-
multiplexer is equivalent to a single pole multiple way switch as shown in fig.
Demultiplexers comes in multiple variations.
 1 : 2 demultiplexer
 1 : 4 demultiplexer
 1 : 16 demultiplexer
 1 : 32 demultiplexer

Block diagram

Truth Table
Decoder
A decoder is a combinational circuit. It has n input and to a maximum m = 2n
outputs. Decoder is identical to a demultiplexer without any data input. It
performs operations which are exactly opposite to those of an encoder.
Block diagram

Examples of Decoders are following.

 Code converters
 BCD to seven segment decoders
 Nixie tube decoders
 Relay actuator

2 to 4 Line Decoder
The block diagram of 2 to 4 line decoder is shown in the fig. A and B are the
two inputs where D through D are the four outputs. Truth table explains the
operations of a decoder. It shows that each output is 1 for only a specific
combination of inputs.
Block diagram
Truth Table

Logic Circuit

Encoder
Encoder is a combinational circuit which is designed to perform the inverse
operation of the decoder. An encoder has n number of input lines and m
number of output lines. An encoder produces an m bit binary code
corresponding to the digital input number. The encoder accepts an n input
digital word and converts it into an m bit another digital word.
Block diagram
Examples of Encoders are following.
 Priority encoders
 Decimal to BCD encoder
 Octal to binary encoder
 Hexadecimal to binary encoder

Priority Encoder
This is a special type of encoder. Priority is given to the input lines. If two or
more input line are 1 at the same time, then the input line with highest priority
will be considered. There are four input D0, D1, D2, D3 and two output Y0, Y1.
Out of the four input D3 has the highest priority and D0 has the lowest priority.
That means if D3 = 1 then Y1 Y1 = 11 irrespective of the other inputs.
Similarly if D3 = 0 and D2 = 1 then Y1 Y0 = 10 irrespective of the other inputs.
Block diagram

Truth Table

Logic Circuit
 Half Adder-

 Half Adder is a combinational logic circuit.

 It is used for the purpose of adding two single bit numbers.
 It contains 2 inputs and 2 outputs (sum and carry).

Half Adder Designing-

Half adder is designed in the following steps-

Step-01:
 Identify the input and output variables-
 Input variables = A, B (either 0 or 1)
 Output variables = S, C where S = Sum and C = Carry

Step-02:

Draw the truth table-

Inputs Outputs

C
A B S (Sum)
(Carry)

0 0 0 0

0 1 1 0

1 0 1 0

1 1 0 1
Truth Table

Step-03:

Draw K-maps using the above truth table and determine the simplified
Boolean expressions-
Step-04:

Draw the logic diagram.

The implementation of half adder using 1 XOR gate and 1 AND gate is as
shown below-
 Limitation of Half Adder-

 Half adders have no scope of adding the carry bit resulting from the
addition of previous bits.
 This is a major drawback of half adders.
 This is because real time scenarios involve adding the multiple number of
bits which can not be accomplished using half adders.

To overcome this drawback, Full Adder comes into play.

Full Adder-

 Full Adder is a combinational logic circuit.

 It is used for the purpose of adding two single bit numbers with a carry.
 Thus, full adder has the ability to perform the addition of three bits.
 Full adder contains 3 inputs and 2 outputs (sum and carry) as shown-

Full Adder Designing-

Full adder is designed in the following steps-

Step-01:

Identify the input and output variables-

 Input variables = A, B, Cin (either 0 or 1)
 Output variables = S, Cout where S = Sum and Cout = Carry
Step-02:

Draw the truth table-

Inputs Outputs

Cout (Carr
A B Cin S (Sum)
y)

0 0 0 0 0

0 0 1 1A’B’Cin 0

0 1 0 1 A’BC’ 0

0 1 1 0 1A’BC

1 0 0 1AB’C’ 0

1 0 1 0 1AB’C

1 1 0 0 1ABC’

1 1 1 1ABC 1ABC
Truth Table S=A

Step-03:

Draw K-maps using the above truth table and determine the simplified
Boolean expressions-
Step-04:

Draw the logic diagram.

The implementation of full adder using 1 XOR gate, 3 AND gates and 1 OR
gate is as shown below-

Half Subtractor-
 Half Subtractor is a combinational logic circuit.
 It is used for the purpose of subtracting two single bit numbers.
 It contains 2 inputs and 2 outputs (difference and borrow).

Half Subtractor Designing-

Half subtractor is designed in the following steps-

Step-01:
Identify the input and output variables-
 Input variables = A, B (either 0 or 1)
 Output variables = D, b where D = Difference and b = borrow

Step-02:
Draw the truth table-

Inputs Outputs

A B D (Difference) b (Borrow)

0 0 0 0

0 1 1 1

1 0 1 0

1 1 0 0
Truth Table
D=A’B+AB’ B=A’B

0-0=0
1-0=1
1-1=0
0-1=1d 1b

Step-03:
Draw K-maps using the above truth table and determine the simplified
Boolean expressions-

Step-04:

Draw the logic diagram.

The implementation of half subtractor using 1 XOR gate, 1 NOT gate and 1
AND gate is as shown below-
 Limitation of Half Subtractor-

 Half subtractors do not take into account “Borrow-in” from the previous
circuit.
 This is a major drawback of half subtractors.
 This is because real time scenarios involve subtracting the multiple
number of bits which can not be accomplished using half subtractors.

Full Subtractor-

 Full Subtractor is a combinational logic circuit.

 It is used for the purpose of subtracting two single bit numbers.
 It also takes into consideration borrow of the lower significant stage.
 Thus, full subtractor has the ability to perform the subtraction of three
bits.
 Full subtractor contains 3 inputs and 2 outputs (Difference and Borrow) as
shown-

Designing a Full Subtractor-

Full subtractor is designed in the following steps-
 Step-01:
Identify the input and output variables-
 Input variables = A, B, Bin (either 0 or 1)
 Output variables = D, Bout where D = Difference and Bout = Borrow
Step-02:
Draw the truth table-

Inputs Outputs

D
Bout (Borro
A B C (Differen
w)
ce)

0 0 0 0 0

0A’ B’0 C1 1 1

0A’ B1 C’0 1 1

0 1 1 0 1

1A 0B’ C’0 1 0

1 0 1 0 0

1 1 0 0 0

1A B1 C1 1 1
D=A’B’C+A’BC’+AB’C’+ABC
B=A’B’C+A’BC’+A’BC+ABC

Step-03:

Draw K-maps using the above truth table and determine the simplified
Boolean expressions-
D=A’B’C+A’BC’+AB’C’+ABC
Logical expression for difference –
D = A’B’Bin + A’BBin’ + AB’Bin’ + ABBin
= A’B’Bin+ABBin+A’BBin’ + AB’Bin’
= Bin(A’B’ + AB) + Bin’(AB’ + A’B)
= Bin( A XOR B)’ + Bin’(A XOR B)
Let,
( A XOR B)=X
= BinX’ + Bin’X
 = Bin XOR X
= Bin XOR( A XOR B)[( A XOR B)=X]

= Bin (A XOR B)’ + Bin’(A XOR B)

= Bin XOR (A XOR B)
= (A XOR B) XOR Bin
Logical expression for borrow –
B=A’B’C+A’BC’+A’BC+ABC

Bout = A’B’Bin + A’BBin’ + A’BBin + ABBin

= A’B’Bin +A’BBin’ + A’BBin + A’BBin’ + A’BBin +
ABBin
=A’B’Bin + A’BBin + A’BBin’+ A’BBin + A’BBin +
ABBin
= A’Bin(B’ + B) + A’B(Bin + Bin’) + BBin(A + A’)
= A’Bin + A’B + BBin

OR

Bout = A’B’Bin + A’BBin’ + A’BBin + ABBin

= Bin(AB + A’B’) + A’B(Bin + Bin’)
= Bin( A XNOR B) + A’B
= Bin (A XOR B)’ + A’B

Step-04:

Draw the logic diagram.

The implementation of full adder using 1 XOR gate, 3 AND gates, 1 NOT
gate and 1 OR gate is as shown below-
ABC

Encoders and Decoders in Digital Logic

Binary code of N digits can be used to store 2 N distinct elements of coded
information. This is what encoders and decoders are used for. Encoders convert
2N lines of input into a code of N bits and Decoders decode the N bits into
2N lines.
1. Encoders –
An encoder is a combinational circuit that converts binary information in the
form of a 2N input lines into N output lines, which represent N bit code for the
input. For simple encoders, it is assumed that only one input line is active at a
time.
As an example, let’s consider Octal to Binary encoder. As shown in the
following figure, an octal-to-binary encoder takes 8 input lines and generates 3
output lines.
Truth Table –

D7 D6 D5 D4 D3 D2 D1 D0 X Y Z

0 0 0 0 0 0 0 1 0 0 0

0 0 0 0 0 0 1 0 0 0 1

0 0 0 0 0 1 0 0 0 1 0

0 0 0 0 1 0 0 0 0 1 1

0 0 0 1 0 0 0 0 1 0 0

0 0 1 0 0 0 0 0 1 0 1

0 1 0 0 0 0 0 0 1 1 0

1 0 0 0 0 0 0 0 1 1 1

As seen from the truth table, the output is 000 when D0 is active; 001 when D1
is active; 010 when D2 is active and so on.
Implementation –
From the truth table, the output line Z is active when the input octal digit is 1, 3,
5 or 7. Similarly, Y is 1 when input octal digit is 2, 3, 6 or 7 and X is 1 for input
octal digits 4, 5, 6 or 7. Hence, the Boolean functions would be:
X = D4 + D5 + D6 + D7
Y = D2 +D3 + D6 + D7
Z = D1 + D3 + D5 + D7
Hence, the encoder can be realised with OR gates as follows:
One limitation of this encoder is that only one input can be active at any given
time. If more than one inputs are active, then the output is undefined. For
example, if D6 and D3 are both active, then, our output would be 111 which is
the output for D7. To overcome this, we use Priority Encoders.

2. Decoders –
A decoder does the opposite job of an encoder. It is a combinational circuit that
converts n lines of input into 2 n lines of output.
Let’s take an example of 3-to-8 line decoder.
Truth Table –
X Y Z D0 D1 D2 D3 D4 D5 D6 D7

0 0 0 1 0 0 0 0 0 0 0

0 0 1 0 1 0 0 0 0 0 0

0 1 0 0 0 1 0 0 0 0 0

0 1 1 0 0 0 1 0 0 0 0

1 0 0 0 0 0 0 1 0 0 0

1 0 1 0 0 0 0 0 1 0 0

1 1 0 0 0 0 0 0 0 1 0

1 1 1 0 0 0 0 0 0 0 1
Implementation –
D0 is high when X = 0, Y = 0 and Z = 0. Hence,
D0 = X’ Y’ Z’
Similarly,
D1 = X’ Y’ Z
D2 = X’ Y Z’
D3 = X’ Y Z
D4 = X Y’ Z’
D5 = X Y’ Z
D6 = X Y Z’
D7 = X Y Z
Hence,
The comparison between Encoder and Decoder. We are
comparing both terms on the basis of some characteristics to make
the comparison clear and more understandable.

[Link]. On the Encoder Decoder

basis of

1. Basic It is a combinational It is also a combinational

circuit that basically circuit that converts the
converts the coded bits to the original
information signal to information. It performs
the coded digital the reverse operation of
bitstream. the encoder.

2. Input There are 2n input There are n input lines in

lines lines in the encoder. the decoder.

3. Output There are n output There are 2n output lines

lines lines in the encoder. in the decoder.

4. Operation The operation of the Unlike encoder, the

encoder is fairly operation of decoder is
simple. complex.

5. Basic The basic logic In decoder, the basic logic

logic element that is used element is AND
element in encoders is OR gate along with the NOT
gate. gate.

6. Installatio It is installed at the It is installed at the

n transmitting end. receiving side.

7. Applicatio Encoders are Decoders are commonly

n commonly used in used in memory chips,
Videos, E-mail, etc. microprocessors, etc.

Both encoders and decoders are the compliment of each other. One
is used for encoding the original information, and another is used to
decode the coded data bits to get the exact message signal.