What is a Combinational Circuit?

A combinational circuit is a type of digital logic circuit whose output depends on the present input
values only and does not depend on past input and output values. Therefore, a combinational circuit
is considered to not have a memory element in its circuit that stores previous inputs and outputs.
Instead, it consists of a certain number of input lines to apply current input values and a certain
number of output lines.

Block Diagram of Combinational Circuit

The following figure depicts the block diagram of a combinational logic circuit.

Here, we can see that there are only three key elements in the circuit diagram of a combinational
circuit, they are −

 Input Lines − The input lines are used to enter the input values into the combinational
circuit.

 Processing Unit − It is the main element that processes the input values depending on the
type of the circuit. For example, a full adder adds three binary bits.

 Output Lines − The output lines are used to take results generated by the circuit.

Types of Combinational Circuits

In digital electronics, the combinational circuits are important components of digital systems.
Depending on the functions performed, there are various types of combinational circuits. Some
common types of combinational circuits and their functions are explained below −

 Binary Adders

 Binary Subtractors

 Multiplexers (MUX)

 Demultiplexers (DEMUX)

 Encoders

 Decoders

 Comparators

Binary Adders

A binary adder is a combinational circuit that performs the addition of binary digits or bits.
Depending on the design and configuration, there are two types of binary adders namely, Half Adder
and Full Adder.
Half Adder

The half adder is a combinational logic circuit with two inputs and two outputs. The half adder circuit
is designed to add two single-bit binary numbers A and B. It is the basic building block for the
addition of two single-bit numbers. This circuit has two outputs namely, sum and carry.

Full Adder

The full adder is designed to overcome the drawback of a half adder which is the ability to add only
two bits. Therefore, the full adder is a three-input and two-output combinational circuit. Where, the
inputs are two one-bit numbers A and B, and a carry C from the previous addition. The outputs are
sum and carry output.

Binary Subtractors

A binary subtractor is a combinational logic circuit used to subtract one binary number from another.
Similar to binary adder, there are two types of binary subtractors namely, half-subtractor and full-
subtractor.

Half Subtractor

A half subtractor is a combination circuit with two inputs (A and B) and two outputs (difference and
borrow). It produces the difference between the two binary bits at the input and also produces an
output (Borrow) to indicate if a 1 has been borrowed. In binary subtraction (A-B), A is called a
Minuend bit and B is called a Subtrahend bit.

Full Subtractor

The full subtractor is also a combinational circuit with three inputs A, B, and Bin, and two outputs D
and Bout.
Here, A is the minuend bit, B is the subtrahend bit, Bin is the previous borrow bit produced by the
previous stage, D is the difference output and B out is the borrow output.

Multiplexers (MUX)

A multiplexer is a special type of combinational logic circuit. It consists of n-data input lines, one
output, and m-select lines. For a multiplexer, n = 2m.

A multiplexer is a digital circuit that selects one of the n data inputs and routes it to the output line.
The selection of one of the n data inputs is done by the select lines. Depending on the digital code
applied at the select lines, one out of "n" data inputs is selected and transmitted to the output line.

In some multiplexers, there is also an enable input E which is useful in cascading of multiple
multiplexers.

Depending on the number of input lines, there can be several types of multiplexers. Some common
types of multiplexers include 2:1 Multiplexer, 4:1 Multiplexer, 16:1 Multiplexer, and 32:1 Multiplexer.

Demultiplexers (DEMUX)

A demultiplexer performs a distribution operation i.e., it receives one data input and distributes it
over several output lines.

A demultiplexer has only one input line, "n" output lines, and "m" select lines. At a time, only one
output line is selected by the digital code applied to the select lines and the data input is transmitted
to the selected output line.
Demultiplexers can be classified into various types depending on the number of output lines. Some
commonly used types of demultiplexers include: 1:2 Demultiplexer, 1:4 Demultiplexer, 1:16
Demultiplexer, and 1:32 Demultiplexer.

Encoders

An encoder is a combinational circuit that is designed to convert a piece of information into a binary
code. An encoder has n number of input lines and m number of output lines, where n = 2m.

An encoder generates an m-bit binary code corresponding to the digital input applied to it. In other
words, an encoder accepts an n-input digital word and converts it into an m-bit another digital word.

Examples of encoder include 4-to-2 encoder, octal-to-binary encoder, hexadecimal-to-binary

encoder, priority encoder, etc.

Decoders
A decoder is a combinational circuit that converts a binary code into a normal word like a decimal
digit. A decoder typically consists of n input lines and m output lines, where the m = 2n.

Decoders are widely used in display drivers, data distribution systems, etc.

Some of the commonly used types of decoders are 2 to 4 decoder, 3 to 8 decoder, 4 to 16 decoder,
BCD to seven segment decoder, etc.

Comparators

A comparator is a combinational logic circuit developed to compare two binary numbers.

Comparators are mainly used in arithmetic and control circuits to perform comparison or logical
operations.
A comparator, as its name suggests, compares the input values and checks whether they are equal or
one input is greater/less than the other input.

Applications of Combinational Circuits

Combinational circuits are the fundamental building blocks in various digital devices and systems.
They are widely used in several digital devices in which combinational circuits are used −

 Microprocessors and Microcontrollers

 Digital Computers

 Calculators

 Digital Communication Systems

 Keyboards

 Smartphones and Digital Watches, etc

What is a Half-Adder?
A combinational logic circuit which is designed to add two binary digits is called as a half adder. The
half adder provides the output along with a carry value (if any). The half adder circuit is designed by
connecting an EX-OR gate and one AND gate. It has two input terminals and two output terminals for
sum and carry. The block diagram and circuit diagram of a half adder are shown in Figure-1.

From the logic circuit diagram of half adder, it is clear that A and B are the two input bits, S is the
output sum, and C is the output carry bit.

In the case of a half adder, the output of the EX-OR gate is the sum of two bits and the output of the
AND gate is the carry. Although, the carry obtained in one addition will not be forwarded in the next
addition because of this it is known as half adder.

Truth Table of Half Adder

Truth table is one that gives the relationship between inputs and outputs of a logic circuit and
explains the operation of the circuit.

The following is the truth table of the half-adder −

Inputs Outputs
 A B S (Sum) C (Carry)

0 0 0 0

0 1 1 0

1 0 1 0

1 1 0 1

K-Map for Half Adder

We can use the K-Map (Karnaugh Map), a method for simplifying Boolean algebra, to determine
equations of the sum bit (S) and the output carry bit (C) of the half adder circuit.

The k-map for half adder circuit is shown in Figure-2.

Characteristic Equations of Half-Adder

The characteristic equations of half adder, i.e., equations of sum (S) and carry (C) are obtained
according to the rules of binary addition. These equations are given below −

The sum (S) of the half-adder is the XOR of A and B. Thus,

Sum,S=A⊕B=AB′+A′B

The carry (C) of the half-adder is the AND of A and B. Therefore,

Carry,C=A⋅B

Applications of Half Adder

The following are some important applications of half adder −

 Half adder is used in ALU (Arithmetic Logic Unit) of computer processors to add binary bits.

 Half adder is used to realize full adder circuit.

 Half adder is used in calculators.

 Half adder is used to calculate addresses and tables.

What is a Full Adder?
A combinational logic circuit that can add two binary digits (bits) and a carry bit, and produces a sum
bit and a carry bit as output is known as a full-adder.

In other words, a combinational circuit which is designed to add three binary digits and produces two
outputs (sum and carry) is known as a full adder. Thus, a full adder circuit adds three binary digits,
where two are the inputs and one is the carry forwarded from the previous addition. The block
diagram and circuit diagram of the full adder are shown in Figure-1.

Hence, the circuit of the full adder consists of one EX-OR gate, three AND gates and one OR gate,
which are connected together as shown in the full adder circuit in Figure-1.

Operation of Full Adder

Full adder takes three inputs namely A, B, and Cin. Where, A and B are the two binary digits, and Cin is
the carry bit from the previous stage of binary addition. The sum output of the full adder is obtained
by XORing the bits A, B, and Cin. While the carry output bit (Cout) is obtained using AND and OR
operations.

Truth Table of Full Adder

Truth table is one that indicates the relationship between input and output variables of a logic circuit
and explains the operation of the logic circuit. The following is the truth table of the full-adder circuit
−

Inputs Outputs

A B Cin S (Sum) Cout (Carry)

0 0 0 0 0

0 0 1 1 0

0 1 0 1 0

0 1 1 0 1
 1 0 0 1 0

1 0 1 0 1

1 1 0 0 1

1 1 1 1 1

Hence, from the truth table, it is clear that the sum output of the full adder is equal to 1 when only 1
input is equal to 1 or when all the inputs are equal to 1. While the carry output has a carry of 1 if two
or three inputs are equal to 1.

K-Map for Full Adder

K-Map (Karnaugh Map) is a tool for simplifying binary complex Boolean algebraic expressions. The K-
Map for full adder is shown in Figure-2.

Characteristic Equations of Full Adder

The characteristic equations of the full adder, i.e. equations of sum (S) and carry output (C out) are
obtained according to the rules of binary addition. These equations are given below −

The sum (S) of the full-adder is the XOR of A, B, and Cin. Therefore,

Sum,S=A⊕B⊕Cin=A′B′Cin+A′BC′in+AB′C′in+ABCin

The carry (C) of the half-adder is the AND of A and B. Therefore,

Carry,C=AB+ACin+BCin

Advantages of Full Adder

The following are the important advantages of full adder over half adder −

 Full adder provides facility to add the carry from the previous stage.

 The power consumed by the full adder is relatively less as compared to half adder.

 Full adder can be easily converted into a half subtractor just by adding a NOT gate in the
circuit.
  Full adder produces higher output that half adder.

 Full adder is one of the essential part of critic digital circuits like multiplexers.

 Full adder performs operation at higher speed.

Applications of Full Adder

The following are the important applications of full adder −

 Full adders are used in ALUs (arithmetic logic units) of CPUs of computers.

 Full adders are used in calculators.

 Full adders also help in carrying out multiplication of binary numbers.

 Full adders are also used to realize critic digital circuits like multiplexers.

 Full adders are used to generate memory addresses.

 Full adders are also used in generation of program counterpoints.

 Full adders are also used in GPU (Graphical Processing Unit).

subtractor
In digital electronics, a subtractor is a combinational logic circuit that can perform the
subtraction of two number (binary numbers) and produce the difference between them. It is a
combinational circuit that means its output depends on its present inputs only. Although, in practice,
the subtraction of two binary number is accomplished by taking the 1's or 2's compliment of the
subtrahend and adding it to the minuend.

In this way, the subtraction operation of binary numbers can be converted into simple addition
operation which makes hardware construction simple and less expensive. There are two types of
subtractors namely, Half Subtractor and Full Subtractor.

What is a Half-Subtractor?

A half-subtractor is a combinational logic circuit that have two inputs and two outputs (i.e. difference
and borrow). The half subtractor produces the difference between the two binary bits at the input
and also produces a borrow output (if any). In the subtraction (A-B), A is called as Minuend bit and B
is called as Subtrahend bit. The block diagram and logic circuit diagram of the half subtractor is
shown in Figure-1.
Hence, from the logic circuit diagram, it is clear that a half subtractor can be realized using an XOR
gate together with a NOT gate and an AND gate.

In the half subtractor as shown in figure-1, A and B are the inputs, d and b are the outputs. Where, d
indicates the difference and b indicates the borrow output. The borrow output (b) is the signal that
tells the next stage that a 1 has been borrowed.

Operation of Half Subtractor

Now, let us understand the operation of the half subtractor circuit. Half subtractor performs its
operation to find the difference of two binary digits according to the rules of binary subtraction,
which are as follows −

The output borrow of b is zero (0) as long as the minuend bit (A) is greater than or equal to the
subtrahend bit (B), i.e. A B. The output borrow is a 1 when A = 0 and B = 1.

From the logic circuit diagram of the half subtractor, it is clear that the difference bit (d) is obtained
by the XOR operation of the two inputs A and B, and the borrow bit is obtained by AND operation of
the compliment of the minuend (A') with the subtrahend (B).

Truth Table of Half Subtractor

The following is the truth table the half-subtractor −

Inputs Outputs

A B D (Difference) B (Borrow)

0 0 0 0

0 1 1 1

1 0 1 0

1 1 0 0

K-Map for Half Subtractor

We can use the K-Map (or Karnaugh Map), a method for simplifying Boolean algebra, to determine
equations of the difference bit (d) and the output borrow (b).

The K-Map simplification for half subtractor is shown in Figure-2.

Characteristic Equation of Half Subtractor

The characteristic equations of the half subtractor, i.e. equations of the difference bit (d) and the
output borrow bit (b) are obtained by following the rules of binary subtraction. These equations are
given as follows −

The difference bit (d) of the half subtractor is given by XORing the two inputs A and B. Therefore,

Difference ,d=A⊕B=A′B+AB′

The borrow (b) of the half subtractor is the AND of A (compliment of A) and B. Therefore,

Borrow, b=A′B

Applications of Half Subtractor

The following are some important applications of half subtractor −

 Half subtractor is used in ALU (Arithmetic Logic Unit) of processors.

 Half subtractor can also be used in amplifiers to compensate the sound distortion.

 It is also used to decrease the force of radio signals or audio signals.

 Half subtractor is also used to increase or decrease operators.

What is a Full-Subtractor?
A full-subtractor is a combinational circuit that has three inputs A, B, bin and two outputs d and b.
Where, A is the minuend, B is subtrahend, bin is borrow produced by the previous stage, d is the
difference output and b is the borrow output.

As we know that the half-subtractor can only be used for subtraction of LSB (least significant bit) of
binary numbers. If there is any borrow during the subtraction of the LSBs of two binary numbers,
then it will affect the subtraction of next stages. Therefore, the subtraction with borrow are
performed by a full subtractor.

The block diagram and circuit diagram of a full-subtractor is shown in Figure-1.

Therefore, we can realize the full-subtractor using two XOR gates, two NOT gates, two AND gates,
and one OR gate.
Truth Table of Full-Subtractor

The truth table is one that gives relationship between input and output of a logic circuit. The
following is the truth table of the full-subtractor −

Inputs Outputs

A B Bin D (Difference) B (Borrow)

0 0 0 0 0

0 0 1 1 1

0 1 0 1 1

0 1 1 0 1

1 0 0 1 0

1 0 1 0 0

1 1 0 0 0

1 1 1 1 1

K-Map for Full Subtractor

We can use the K-Map (or Karnaugh Map), a method for simplifying Boolean algebra, to determine
equations of the difference bit (d) and the output borrow bit (b).

The K-Map simplification for half subtractor is shown in Figure-2.

Characteristic Equations of Full Subtractor

The characteristic equations of the full subtractor, i.e. equations of the difference (d) and borrow
output (b) are obtained by following the rules of binary subtraction. These equations are given below
−

The difference (d) of the full subtractor is the XOR of A, B, and bin. Therefore,

Difference,d=A⊕B⊕bin=A′B′bin+AB′b′in+A′Bb′in+ABbin

The borrow (b) of the full subtractor is given by,

From the logic circuit diagram and k-map −

Borrow,b=A′B+(A⊕B)′bin

From Truth Table

Borrow,b=A′B′bin+A′Bb′in+A′Bbin+ABbin

Or

Borrow,b=A′B(bin+b′in)+(AB+A′B′)bin=A′B+(A⊕B)′bin

Applications of Full Subtractor

The following are some important applications of full subtractor −

 Full subtractors are used in ALU (Arithmetic Logic Unit) in computers CPUs.

 Full subtractors are extensively used to perform arithmetical operations like subtraction in
electronic calculators and many other digital devices.

 Full subtractors are used in different microcontrollers for arithmetic subtraction.

 They are used in timers and program counters (PC).

 Full subtractors are also used in processors to compute addresses, tables, etc.

 Full subtractors are also used in DSP (Digital Signal Processing) and networking based
systems.

Digital Electronics - Multiplexers

What is a Multiplexer?

a multiplexer, also referred to as MUX, is a combination logic circuit that is designed to accept
multiple input signals and transfer only one of them through the output line. In simple words, a
multiplexer is a digital logic device that selects one-out-of-N (N = 2n) input data sources and transmits
the selected data to a single output line.

The multiplexer is also called data selector as it selects one from several. The block diagram of a
typical 2n:1 multiplexer is shown in Figure 1.
In the case of multiplexer, the selection of desired data input to flow through the output line is
controlled with the help of SELECT lines. In the block diagram of mux in Figure 1, I0, I1,... In-1, i.e., (2n)
are the input lines, and "n" be the select lines. These select lines will determine which input is to be
routed to the output.

Hence, the multiplexer works as a multi-position switch whose operation is controlled by digital
signals. These digital control signals are applied to the select lines to determine which data input will
be switched to the output line.

Function of Multiplexer

Multiplexer is a digital logic device which is used to perform multiplexing of data. Where,
multiplexing simply means sharing of data. Technically, when a particular data is selected from
multiple input data sources and transmitted the selected data to a single output channel, it is
called multiplexing.

There are two types of multiplexing namely, frequency multiplexing and time multiplexing.

When multiple devices are connected to a single transmission line in a system. At any point of time,
only one device is using the line to transmit data, then this is called time multiplexing. On the other
hand, when multiple devices share a common line to transmit data but at different frequencies, it is
called frequency multiplexing.

Types of Multiplexers

Based on input data lines and select lines, the multiplexer can be of several types. But, in this article,
we will discuss only the following three types of multiplexers −

 2×1 Multiplexer

 4×1 Multiplexer

Let us discuss each of these three multiplexers individually.

2×1 Multiplexer

The block diagram of a 2×1 multiplexer is shown in Figure 2. The 2×1 multiplexer is basic two input
multiplexer which has two data input lines designated as I0 and I1, one data select line denoted by S
and one output line denoted by Y. The 2×1 mux is used to connect two 1-bit data sources to a
common designation.
In the 2×1 multiplexer, the logic level of the digital signal applied to the select line S determines
which data input will pass through the output line. The operation of the 2×1 multiplexer can be
understood from the following truth table.

Select Line (S) Output (Y)

0 I0

1 I1

4×1 Multiplexer

4×1 Multiplexer has four data inputs I3, I2, I1 & I0, two selection lines s1 & s0 and one output Y.
The block diagram of 4×1 Multiplexer is shown in the following figure.

One of these 4 inputs will be connected to the output based on the combination of inputs present at
these two selection lines. Truth table of 4×1 Multiplexer is shown below.

Selection Lines Output

S1 S0 Y
 0 0 I0

0 1 I1

1 0 I2

1 1 I3

From Truth table, we can directly write the Boolean function for output, Y as

Y=S1′S0′I0+S1′S0I1+S1S0′I2+S1S0I3

We can implement this Boolean function using Inverters, AND gates & OR gate. The circuit
diagram of 4×1 multiplexer is shown in the following figure.

We can easily understand the operation of the above circuit. Similarly, you can implement 8×1
Multiplexer and 16×1 multiplexer by following the same procedure.

Implementation of Higher-order Multiplexers

Now, let us implement the following two higher-order Multiplexers using lower-order Multiplexers.

 8×1 Multiplexer

 16×1 Multiplexer
8×1 Multiplexer

In this section, let us implement 8×1 Multiplexer using 4×1 Multiplexers and 2×1 Multiplexer. We
know that 4×1 Multiplexer has 4 data inputs, 2 selection lines and one output. Whereas, 8×1
Multiplexer has 8 data inputs, 3 selection lines and one output.

So, we require two 4×1 Multiplexers in first stage in order to get the 8 data inputs. Since, each 4×1
Multiplexer produces one output, we require a 2×1 Multiplexer in second stage by considering the
outputs of first stage as inputs and to produce the final output.

Let the 8×1 Multiplexer has eight data inputs I7 to I0, three selection lines s2, s1 & s0 and one output Y.
The Truth table of 8×1 Multiplexer is shown below.

Selection Inputs Output

S2 S1 S0 Y

0 0 0 I0

0 0 1 I1

0 1 0 I2

0 1 1 I3

1 0 0 I4

1 0 1 I5

1 1 0 I6

1 1 1 I7

We can implement 8×1 Multiplexer using lower order Multiplexers easily by considering the above
Truth table. The block diagram of 8×1 Multiplexer is shown in the following figure.
The same selection lines, s1 & s0 are applied to both 4×1 Multiplexers. The data inputs of upper 4×1
Multiplexer are I7 to I4 and the data inputs of lower 4×1 Multiplexer are I3 to I0. Therefore, each 4×1
Multiplexer produces an output based on the values of selection lines, s1 & s0.

The outputs of first stage 4×1 Multiplexers are applied as inputs of 2×1 Multiplexer that is present in
second stage. The other selection line, s2 is applied to 2×1 Multiplexer.

 If s2 is zero, then the output of 2×1 Multiplexer will be one of the 4 inputs I 3 to I0 based on
the values of selection lines s1 & s0.

 If s2 is one, then the output of 2×1 Multiplexer will be one of the 4 inputs I 7 to I4 based on the
values of selection lines s1 & s0.

Therefore, the overall combination of two 4×1 Multiplexers and one 2×1 Multiplexer performs as one
8×1 Multiplexer.

16×1 Multiplexer

In this section, let us implement 16×1 Multiplexer using 8×1 Multiplexers and 2×1 Multiplexer. We
know that 8×1 Multiplexer has 8 data inputs, 3 selection lines and one output. Whereas, 16×1
Multiplexer has 16 data inputs, 4 selection lines and one output.

So, we require two 8×1 Multiplexers in first stage in order to get the 16 data inputs. Since, each 8×1
Multiplexer produces one output, we require a 2×1 Multiplexer in second stage by considering the
outputs of first stage as inputs and to produce the final output.

Let the 16×1 Multiplexer has sixteen data inputs I15 to I0, four selection lines s3 to s0 and one output Y.
The Truth table of 16×1 Multiplexer is shown below.

Selection Inputs Output

S3 S2 S1 S0 Y

0 0 0 0 I0
 0 0 0 1 I1

0 0 1 0 I2

0 0 1 1 I3

0 1 0 0 I4

0 1 0 1 I5

0 1 1 0 I6

0 1 1 1 I7

1 0 0 0 I8

1 0 0 1 I9

1 0 1 0 I10

1 0 1 1 I11

1 1 0 0 I12

1 1 0 1 I13

1 1 1 0 I14

1 1 1 1 I15

We can implement 16×1 Multiplexer using lower order Multiplexers easily by considering the above
Truth table. The block diagram of 16×1 Multiplexer is shown in the following figure.
The same selection lines, s2, s1 & s0 are applied to both 8×1 Multiplexers. The data inputs of upper
8×1 Multiplexer are I15 to I8 and the data inputs of lower 8×1 Multiplexer are I7 to I0. Therefore, each
8×1 Multiplexer produces an output based on the values of selection lines, s2, s1 & s0.

The outputs of first stage 8×1 Multiplexers are applied as inputs of 2×1 Multiplexer that is present in
second stage. The other selection line, s3 is applied to 2×1 Multiplexer.

If s3 is zero, then the output of 2×1 Multiplexer will be one of the 8 inputs Is7 to I0 based on the
values of selection lines s2, s1 & s0.

If s3 is one, then the output of 2×1 Multiplexer will be one of the 8 inputs I15 to I8 based on the values
of selection lines s2, s1 & s0.
Therefore, the overall combination of two 8×1 Multiplexers and one 2×1 Multiplexer performs as one
16×1 Multiplexer.

Applications of Multiplexers

In digital electronics, multiplexers have numerous applications in almost all types of digital systems.
Some important applications of multiplexers are as follows −

 Data routing and data selection

 Parallel to series conversion

 Logic function implementation

 Generation of waveform, etc.

What is a Demultiplexer?
A Demultiplexer is a combinational logic circuit that accepts a single input and distributes it over
several output lines. Demultiplexer is also termed as DEMUX in short. As Demultiplexer is used to
transmit the same data to different destinations, hence it is also known as data distributor.

From the definition, we can state that a Demultiplexer is a 1-to-2n device. The functional block
diagram of a typical 1×2n Demultiplexer is shown in Figure-1.

It can be seen that the Demultiplexer has only one data input line, 2n output lines, and n select lines.
The logic level applied to select lines of the Demultiplexer determines the output channel to which
the input data will be transmitted.
Demultiplexer circuit are the combinational logic circuit widely used in digital decoders and Boolean
function generator circuits.

Types of Demultiplexer

Based on the number of output lines (2n), Demultiplexers can be classified into several types. Some
commonly used types of Demultiplexers are −

 1×2 Demultiplexer

 1×4 Demultiplexer

Now, let us briefly discuss each type of Demultiplexer.

1×2 Demultiplexer

The functional block diagram of a 1×2 Demultiplexer is shown in Figure-2.

The 1×2 Demultiplexer consists of 1 input line (I), 1 select line (S), and 2 output lines (Y0 and Y1). The
logic level applied at the select line determines the output line to which the input data will be
transmitted.

The operation of the 1×2 Demultiplexer can be analyzed with the help of its function table given
below.

Select Line Outputs

S Y1 Y0

0 0 I

1 I 0

From this function table of 1×2 Demultiplexer, we can directly derive the Boolean expression for each
output as follow.

Y0=S¯I

And,

Y1=SI

1×4 Demultiplexer

The functional block diagram of 1×4 Demultiplexer is shown in Figure-3.

The 1×4 Demultiplexer has 1 input line (I), 2 select line (S0 and S1), and 4 output lines (Y0, Y1, Y2, and
Y3). The logic level applied to the select lines determines the output line to which the input data (I)
will be transmitted.

The operation of the 1×4 Demultiplexer can be understood with the help of its function table given
below.

Select Line Outputs

S1 S0 Y3 Y2 Y1 Y0

0 0 0 0 0 I

0 1 0 0 I 0

1 0 0 I 0 0

1 1 I 0 0 0

From this truth table of 1×4 Demultiplexer, we can directly write the Boolean expression for each
output as follow.

Y0=S1¯S0¯I

Y1=S1¯S0I

Y2=S1S0¯I

Y3=S1S0I

We can easily understand the operation of the above circuit. Similarly, you can implement 1×8
Demultiplexer and 1×16 Demultiplexer by following the same procedure.

Implementation of Higher-order Demultiplexer

Now, let us implement the following two higher-order Demultiplexers using lower-order
Demultiplexers.

 1×8 Demultiplexer

 1×16 Demultiplexer

1×8 Demultiplexer

In this section, let us implement 1×8 Demultiplexer using 1×4 Demultiplexers and 1×2 Demultiplexer.
We know that 1×4 Demultiplexer has single input, two selection lines and four outputs. Whereas,
1×8 Demultiplexer has single input, three selection lines and eight outputs.

So, we require two 1×4 Demultiplexers in second stage in order to get the final eight outputs. Since,
the number of inputs in second stage is two, we require 1×2 Demultiplexer in first stage so that the
outputs of first stage will be the inputs of second stage. Input of this 1×2 Demultiplexer will be the
overall input of 1×8 Demultiplexer.

Let the 1×8 Demultiplexer has one input I, three selection lines s2, s1 & s0 and outputs Y7 to Y0.
The Truth table of 1×8 Demultiplexer is shown below.

Selection Inputs Outputs

s2 s1 s0 Y7 Y6 Y5 Y4 Y3 Y2 Y1 Y0

0 0 0 0 0 0 0 0 0 0 I

0 0 1 0 0 0 0 0 0 I 0

0 1 0 0 0 0 0 0 I 0 0

0 1 1 0 0 0 0 I 0 0 0

1 0 0 0 0 0 I 0 0 0 0

1 0 1 0 0 I 0 0 0 0 0

1 1 0 0 I 0 0 0 0 0 0

1 1 1 I 0 0 0 0 0 0 0

We can implement 1×8 Demultiplexer using lower order Multiplexers easily by considering the above
Truth table. The block diagram of 1×8 Demultiplexer is shown in the following figure.
The common selection lines, s1 & s0 are applied to both 1×4 Demultiplexers. The outputs of upper
1×4 Demultiplexer are Y7 to Y4 and the outputs of lower 1×4 Demultiplexer are Y3 to Y0.

The other selection line, s2 is applied to 1×2 Demultiplexer. If s2 is zero, then one of the four outputs
of lower 1×4 Demultiplexer will be equal to input, I based on the values of selection lines s1 & s0.
Similarly, if s2 is one, then one of the four outputs of upper 1×4 Demultiplexer will be equal to input, I
based on the values of selection lines s1 & s0.

1×16 Demultiplexer
In this section, let us implement 1×16 Demultiplexer using 1×8 Demultiplexers and 1×2
Demultiplexer. We know that 1×8 Demultiplexer has single input, three selection lines and eight
outputs. Whereas, 1×16 Demultiplexer has single input, four selection lines and sixteen outputs.

So, we require two 1×8 Demultiplexers in second stage in order to get the final sixteen outputs.
Since, the number of inputs in second stage is two, we require 1×2 Demultiplexer in first stage so
that the outputs of first stage will be the inputs of second stage. Input of this 1×2 Demultiplexer will
be the overall input of 1×16 Demultiplexer.

Let the 1×16 Demultiplexer has one input I, four selection lines s3, s2, s1 & s0 and outputs Y15 to Y0.
The block diagram of 1×16 Demultiplexer using lower order Multiplexers is shown in the following
figure.
The common selection lines s2, s1 & s0 are applied to both 1×8 Demultiplexers. The outputs of upper
1×8 Demultiplexer are Y15 to Y8 and the outputs of lower 1×8 Demultiplexer are Y7 to Y0.
The other selection line, s3 is applied to 1×2 Demultiplexer. If s3 is zero, then one of the eight outputs
of lower 1×8 Demultiplexer will be equal to input, I based on the values of selection lines s 2, s1 & s0.
Similarly, if s3 is one, then one of the 8 outputs of upper 1×8 Demultiplexer will be equal to input, I
based on the values of selection lines s2, s1 & s0.

Integrated Circuits (ICs) Working as Demultiplexer

Demultiplexer can also be built in the form of ICs. There are several types of ICs available that work
as Demultiplexer. Some common of them are listed below −

 74139 IC works as a 1×4 Demultiplexer

 74237 IC works as a 1×8 Demultiplexer

 74154 IC works as a 1×16 Demultiplexer

Advantages of Demultiplexer

The important advantages of Demultiplexer are given below −

 By using Demultiplexers, we can increase the efficiency of the communication systems.

 Demultiplexer can separate different signals from a mixed signal stream.

 Demultiplexer can decode the signals produced by a multiplexer.

Disadvantages of Demultiplexer

The major disadvantages of Demultiplexers are listed below −

  The use of Demultiplexer can cause wastage of bandwidth.

 The synchronization of signals can create a delay in the system.

Applications of Demultiplexer

Demultiplexer is a crucial combinational logic circuit which is used in a number of applications. Some
important uses of Demultiplexers are listed below −

 Demultiplexer are used in several input and output devices for data routing.

 Demultiplexer are used in digital control systems to select one signal from a mutual stream
of signals.

 Demultiplexer are also employed for data transmission in synchronous systems.

 Demultiplexer are also utilized in data acquisition systems.

 Demultiplexer can be used for generating Boolean functions.

 Demultiplexer can be used in serial to parallel converters.

 Demultiplexer are used for broadcasting of ATM packets.

 Demultiplexer can also be used to design automatic test equipment, etc.

What is an Encoder?
An encoder is a digital combinational circuit that converts a human friendly information into a coded
format for processing using machines. In simple words, an encoder converts a piece of information
normal form to coded form. This process is called encoding.

Encoders are crucial components in various digital electronics applications such as data transmission,
controlling and automation, communication, signal processing, etc.

An encoder consists of a certain number of input and output lines. Where, an encoder can have
maximum of "2n" input lines whereas "n" output lines. Hence, an encoder encodes information
represented by "2n" input lines with "n" bits.

The block diagram of an encoder is shown in the following figure −

Let us now discuss different types of encoders commonly used in digital electronic applications.

Types of Encoders
Some of the commonly used types of encoders in digital electronics −

 4 to 2 Encoder

 8 to 3 Encoder (Octal Encoder)

 Decimal to BCD Encoder

Let us now discuss these three types of most commonly used encoders in detail.

4 to 2 Encoder

A 4 to 2 Encoder is a type of encoder which has 4 (22) input lines and 2 output lines. It produces an
output code (i.e., convert input information in a 2-bit format) depending on the combination of input
lines.

The block diagram of a 4 to 2 Encoder is shown in the following figure.

The working of a 4 to 2 Encoder for different input combinations is described in the following truth
table −

Inputs Outputs

I3 I2 I1 I0 Y1 Y0

0 0 0 1 0 0

0 0 1 0 0 1

0 1 0 0 1 0

1 0 0 0 1 1

From this truth table, we can derive the Boolean expression for each output of the 4 to 2 Encoder as
follows −

Y0=I1+I3

Y1=I2+I3
It is clear that we can implement the logic circuit of the 4 to 2 Encoder using two OR gates. The
following figure depicts the logic diagram of the 4 to 2 Encoder.

Applications of 4 to 2 Encoder

The 4 to 2 Encoder is widely used in the following applications: Data multiplexing, Generating digital
control signals, Address decoding applications, Encoding data in digital systems, etc.

Octal to Binary Encoder

The octal to binary encoder is a type of encoder that converts an octal code into binary code. It
accepts 8 input lines and produces a 3-bit output depending on the combination of input lines.
Therefore, it is also known as 8 to 3 Encoder.

The block diagram of an octal to binary encoder is shown in the following figure −

The following truth table describes the working of an octal to binary encoder −

Inputs Outputs

I7 I6 I5 I4 I3 I2 I1 I0 Y2 Y1 Y0
 0 0 0 0 0 0 0 1 0 0 0

0 0 0 0 0 0 1 0 0 0 1

0 0 0 0 0 1 0 0 0 1 0

0 0 0 0 1 0 0 0 0 1 1

0 0 0 1 0 0 0 0 1 0 0

0 0 1 0 0 0 0 0 1 0 1

0 1 0 0 0 0 0 0 1 1 0

1 0 0 0 0 0 0 0 1 1 1

From this truth table, we can write the Boolean expression for the outputs of the octal to binary
encoder as follows.

Y0=I1+I3+I5+I7

Y1=I2+I3+I6+I7

Y2=I4+I5+I6+I7

From these expressions, it is clear that the implementation of an octal to binary encoder requires 3
OR gates.

The logic circuit diagram of the octal to binary encoder is shown in the following figure −

Applications of Octal to Binary Encoder

The octal to binary encoder is used in the following applications −

  Data conversion in digital systems.

 Conversion of octal memory addresses into binary memory addresses.

 In microprocessors and microcontrollers, to convert octal instructions into binary format.

 In communication systems, to encode octal data into binary form for transmission, etc.

Decimal to BCD Encoder

A type of encoder that can convert a decimal number or information represented using decimal
number into its equivalent binary-coded decimal (BCD) format is known as a decimal to BCD encoder.

In the BCD encoding scheme, each decimal digit can be converted into a 4-bit binary representation.
The following table shows the BCD equivalents of decimal digital from 0 to 9.

Decimal Digit BCD Code

0 0 0 0 0

1 0 0 0 1

2 0 0 1 0

3 0 0 1 1

4 0 1 0 0

5 0 1 0 1

6 0 1 1 0

7 0 1 1 1

8 1 0 0 0

9 1 0 0 1

The decimal to BCD encoder accepts 10 input lines and produces a 4-bit BCD output depending on
the combination of input lines. Therefore, sometimes it is also called a 10 to 4 encoder.

The following illustration depicts the block diagram of a decimal to BCD encoder.
The truth table describing the working of the decimal to BCD encoder is given blow −

Inputs Outputs

D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Y3 Y2 Y1 Y0

0 0 0 0 0 0 0 0 0 1 0 0 0 0

0 0 0 0 0 0 0 0 1 0 0 0 0 1

0 0 0 0 0 0 0 1 0 0 0 0 1 0

0 0 0 0 0 0 1 0 0 0 0 0 1 1

0 0 0 0 0 1 0 0 0 0 0 1 0 0

0 0 0 0 1 0 0 0 0 0 0 1 0 1

0 0 0 1 0 0 0 0 0 0 0 1 1 0

0 0 1 0 0 0 0 0 0 0 0 1 1 1

0 1 0 0 0 0 0 0 0 0 1 0 0 0

1 0 0 0 0 0 0 0 0 0 1 0 0 1

From this truth table, we can write the Boolean expression of the decimal to BCD encoder as follows.

Y0=D1+D3+D5+D7+D9
Y1=D2+D3+D6+D7

Y2=D4+D5+D6+D7

Y3=D8+D9

The logic circuit of the decimal to BCD encoder can be implemented using four OR gates which is
shown in the following figure −

Applications of Decimal to BCD Encoder

Decimal to BCD encoders find their application in digital clocks and timers, data processing devices
and storage systems, calculators, measuring instruments, display devices, microprocessors,
microcontrollers, embedded systems, etc.

What is a Decoder?
In digital electronics, a combinational logic circuit that converts an N-bit binary input code into M
output channels in such a way that only one output channel is activated for each one of the possible
combinations of inputs is known as a decoder.

In other words, a combinational logic circuit which converts N input lines into a maximum of
2N output lines is called a decoder.

Therefore, a decoder is a combination logic circuit that is capable of identifying or detecting a

particular code. The operation that a decoder performs is referred to as decoding. A general block
diagram of a decoder is shown in Figure-1.
Here, the decoder has N input lines and M (2N) output lines. In a decoder, each of the N input lines
can be a 0 or a 1, hence the number of possible input combinations or codes be equal to 2N. For each
of these input combinations, only one of the M output lines will be active, and all other output lines
will remain inactive.

Types of Decoders

There are several types of decoder present. But, based on the input and output lines present,
decoders may classified into the following three types −

 2 to 4 Decoder

 3 to 8 Decoder

 4 to 16 Decoder

Now, let us discuss each type of decoder in detail one by one.

2 to 4 Decoder
The 2 to 4 decoder is one that has 2 input lines and 4 (22) output lines. The functional block diagram
of the 2 to 4 decoder is shown in Figure-2.

When this decoder is enabled with the help of enable input E, then its one of the four outputs will be
active for each combination of inputs. The operation of this 2-line to 4-line decoder can be analyzed
with the help of its truth table which is given below.
 Inputs Outputs

E A B Y3 Y2 Y1 Y0

0 X X 0 0 0 0

1 0 0 0 0 0 1

1 0 1 0 0 1 0

1 1 0 0 1 0 0

1 1 1 1 0 0 0

Using this truth table, we can derive the Boolean expression for each output as follows −

Y0=E⋅A¯⋅B¯

Y1=E⋅A¯⋅B

Y2=E⋅A⋅B¯

Y3=E⋅A⋅B

As each output term contains products of input variables that can be implemented with the help of
AND gates. Therefore, the logic circuit diagram of the 2 to 4 decoder is shown in Figure-3.

Operation

The operation of logic circuit of the 2 to 4 decoder is described as follows −

 When enable input (E) is inactive, i.e. set to 0, none of the AND gates will function.
  When enable input (E) is made active by setting it to 1, then the circuit works as explained
below.

 When A = 0 and B = 0, the AND gate 1 becomes active and produces output Y0.

 When A = 0 and B = 1, the AND gate 2 becomes active and produces output Y1.

 When A = 1 and B = 0, the AND gate 3 becomes active and produces output Y2.

 When A = 1 and B = 1, the AND gate 4 becomes active and produces output Y3.

3 to 8 Decoder

The 3 to 8 decoder is one that has 3 input lines and 8 (23) output lines. The functional block diagram
of the 3 to 8 decoder is shown in Figure-4.

When this decoder is enabled with the help of enable input E, then it's one of the eight outputs will
be active for each combination of inputs. The operation of this 3-line to 8-line decoder can be
analyzed with the help of its function table which is given below.

Inputs Outputs

E A B C Y7 Y6 Y5 Y4 Y3 Y2 Y1 Y0

0 X X X 0 0 0 0 0 0 0 0

1 0 0 0 0 0 0 0 0 0 0 1

1 0 0 1 0 0 0 0 0 0 1 0

1 0 1 0 0 0 0 0 0 1 0 0

1 0 1 1 0 0 0 0 1 0 0 0
 1 1 0 0 0 0 0 1 0 0 0 0

1 1 0 1 0 0 1 0 0 0 0 0

1 1 1 0 0 1 0 0 0 0 0 0

1 1 1 1 1 0 0 0 0 0 0 0

Using this function table, we can derive the Boolean expression for each output as follows −

Y0=EA¯B¯C¯

Y1=EA¯B¯C

Y2=EA¯BC¯

Y3=EA¯BC

Y4=EAB¯C¯

Y5=EAB¯C

Y6=EABC¯

Y7=EABC

As we can see, each output term contains products of input variables, hence they can be
implemented with the help of AND gates. Therefore, the logic circuit diagram of the 3 to 8 decoder is
shown in Figure-5.
Operation

The operation of logic circuit of the 3 to 8 decoder is described as follows −

 When enable input (E) is inactive, i.e. set to 0, none of the AND gates will function.

 When enable input (E) is made active by setting it to 1, then the circuit works as described
below.

 When A = 0, B = 0, and C = 0, the AND gate 1 becomes active and produces output Y0.

 When A = 0, B = 0, and C = 1, the AND gate 2 becomes active and produces output Y1.

 When A = 0, B = 1, and C = 0, the AND gate 3 becomes active and produces output Y2.

 When A = 0, B = 1, and C = 1, the AND gate 4 becomes active and produces output Y3.

 When A = 1, B = 0, and C = 0, the AND gate 5 becomes active and produces output Y4.

 When A = 1, B = 0, and C = 1, the AND gate 6 becomes active and produces output Y5.

 When A = 1, B = 1, and C = 0, the AND gate 7 becomes active and produces output Y6.

 When A = 1, B = 1, and C = 1, the AND gate 8 becomes active and produces output Y7.

4 to 16 Decoder

The 4 to 16 decoder is the type of decoder which has 4 input lines and 16 (214) output lines. The
functional block diagram of the 4 to 16 decoder is shown in Figure-6.

When this decoder is enabled with the help of enable input E, it's one of the sixteen outputs will be
active for each combination of inputs. The operation of the 4-line to 16-line decoder can be analyzed
with the help of its function table which is given below.

Inputs
Output
E A B C D

0 X X X X 0
 1 0 0 0 0 Y0

1 0 0 0 1 Y1

1 0 0 1 0 Y2

1 0 0 1 1 Y3

1 0 1 0 0 Y4

1 0 1 0 1 Y5

1 0 1 1 0 Y6

1 0 1 1 1 Y7

1 1 0 0 0 Y8

1 1 0 0 1 Y9

1 1 0 1 0 Y10

1 1 0 1 1 Y11

1 1 1 0 0 Y12

1 1 1 0 1 Y13

1 1 1 1 0 Y14

1 1 1 1 1 Y15

From this function table, we can directly write the Boolean expression for each output as follows −

Y0=EA¯B¯C¯D¯

Y1=EA¯B¯C¯D

Y2=EA¯B¯CD¯

Y3=EA¯B¯CD

Y4=EA¯BC¯D¯
Y5=EA¯BC¯D

Y6=EA¯BCD¯

Y7=EA¯BCD

Y8=EAB¯C¯D¯

Y9=EAB¯C¯D

Y10=EAB¯CD¯

Y11=EAB¯CD

Y12=EABC¯D¯

Y13=EABC¯D

Y14=EABCD¯

Y15=EABCD

We can implement these output expression in the same way as we done for the 2 to 4 decoder and 3
to 8 decoder.

Now, let us discuss the applications of decoders.

Applications of Decoders

Decoders are used in the cases where an output or a collection of outputs is to be activated only on
the occurrence of a particular combination of input codes. Some important applications of decoders
are listed below −

 Decoders are used for code conversions.

 Decoders are extensively used in memory systems of computers.

 Decoders are also used for de-multiplexing or data distribution.

 Decoders are also used in data routing applications where very short propagation delay is
required.

 Decoder may also be used for timing or sequencing purposes.

 Decoders are also utilized to turn on and off digital devices at a specific time.

What is a Sequential Circuit?

A sequential circuit is a logic circuit that consists of a memory element to store history of past
operation of the circuit. Therefore, the output of a sequential circuit depends on present inputs as
well as past outputs of the circuit.

The block diagram of a typical sequential circuit is shown in the following figure −
Here, it can be seen that a sequential circuit is basically a combination of a combinational circuit and
a memory element. The combinational circuit performs the logical operations specified, while the
memory element records the history of operation of the circuit. This history is then used to perform
various logical operations in future.

The sequential circuits are named so because they use a series of latest and previous inputs to
determine the new output.

Main Components of Sequential Circuit

A sequential circuit consists of several different digital components to process and hold information
in the system. Here are some key components of a sequential circuit explained −

Logic Gates

The logic gates like AND, OR, NOT, etc. are used to implement the data processing mechanism of the
sequential circuits. These logic gates are basically interconnected in a specific manner to implement
combinational circuits to perform logical operations on input data.

Memory Element

In sequential circuits, the memory element is another crucial component that holds history of circuit
operation. Generally, flip-flops are used as the memory element in sequential circuits.

In sequential circuits, a feedback path is provided between the output and the input that transfers
information from output end to the memory element and from memory element to the input end.

All these components are interconnected together to design a sequential circuit that can perform
complex operations and store state information in the memory element.

Types of Sequential Circuits

Based on structure, operation, and applications, the sequential circuits are classified into the
following two types −

 Asynchronous Sequential Circuit

 Synchronous Sequential Circuit

Asynchronous Sequential Circuit

A type of sequential circuit whose operation does not depend on the clock signals is known as
an asynchronous sequential circuit. This type of sequential circuits operates using the input pulses
that means their state changes with the change in the input pulses.
The main components of the asynchronous sequential circuits include un-clocked flip flops and
combinational logic circuits. The block diagram of a typical asynchronous sequential circuit is shown
in the following figure.

Asynchronous sequential circuits are relatively difficult to design and sometimes they produce
uncertain output.

The ripple counter is a common example of asynchronous sequential circuit.

Synchronous Sequential Circuit

A synchronous sequential circuit is a type of sequential circuit in which all the memory elements are
synchronized by a common clock signal. Hence, synchronous sequential circuits take a clock signal
along with input signals.

In synchronous sequential circuits, the duration of the output pulse is equivalent to the duration of
the clock pulse applied. Take a look at the block diagram of a typical synchronous sequential circuit −

In this figure, it can be seen that the memory element of the sequential circuit is synchronized by a
clock signal.

The major disadvantage of the synchronous sequential circuits is that their operation is quite slow.
This is because, every time the circuit has to wait for a clock pulse for the operation to take place.
However, the most significant advantage of synchronous sequential circuits is that they have a
reliable and predictable operation.

Some common examples of synchronous sequential circuits include counters, registers, memory
units, control units, etc.

Applications of Sequential Circuits

Sequential circuits are used in a wide range of applications in the field of digital electronics. The
following are some common examples of applications of sequential circuits −

 Sequential circuits are used in digital counters employed in applications like frequency
division, event counting, time keeping, and more.

 Sequential circuits are also used in digital memory devices like flip-flops, registers, etc. to
store and retrieve data.

 Sequential circuits are used to design control circuits in digital systems.

 Sequential circuits play an important role in sequential logic and state-based data processing
operations.

 Sequential circuits are also used in automation systems to control the operation of machines
based on predefined logics.

 In communication systems, sequential circuits are used to implement communication

protocols and data transmission standards.

Clock Signal
Clock signal is a periodic signal and its ON time and OFF time need not be the same. We can
represent the clock signal as a square wave, when both its ON time and OFF time are same. This
clock signal is shown in the following figure.

In the above figure, square wave is considered as clock signal. This signal stays at logic High (5V) for
some time and stays at logic Low (0V) for equal amount of time. This pattern repeats with some time
period. In this case, the time period will be equal to either twice of ON time or twice of OFF time.
We can represent the clock signal as train of pulses, when ON time and OFF time are not same. This
clock signal is shown in the following figure.
In the above figure, train of pulses is considered as clock signal. This signal stays at logic High (5V) for
some time and stays at logic Low (0V) for some other time. This pattern repeats with some time
period. In this case, the time period will be equal to sum of ON time and OFF time.

The reciprocal of the time period of clock signal is known as the frequency of the clock signal. All
sequential circuits are operated with clock signal. So, the frequency at which the sequential circuits
can be operated accordingly the clock signal frequency has to be chosen.

Types of Triggering
Following are the two possible types of triggering that are used in sequential circuits.

 Level Triggering

 Edge Triggering

Level Triggering

There are two levels, namely logic High and logic Low in clock signal. Following are the two types of
level triggering.

 Positive Level Triggering

 Negative Level Triggering

If the sequential circuit is operated with the clock signal when it is in Logic High, then that type of
triggering is known as Positive level triggering. It is highlighted in below figure.

If the sequential circuit is operated with the clock signal when it is in Logic Low, then that type of
triggering is known as Negative level triggering. It is highlighted in the following figure.

Edge Triggering

There are two types of transitions that occur in clock signal. That means, the clock signal transitions
either from Logic Low to Logic High or Logic High to Logic Low.

Following are the two types of edge triggering based on the transitions of clock signal.

 Positive Edge Triggering

  Negative Edge Triggering

Positive Edge Triggering

If the sequential circuit is operated with the clock signal that is transitioning from Logic Low to Logic
High, then that type of triggering is known as Positive Edge Triggering. It is also called as rising edge
triggering. It is shown in the following figure.

Negative Edge Triggering

If the sequential circuit is operated with the clock signal that is transitioning from Logic High to Logic
Low, then that type of triggering is known as Negative Edge Triggering. It is also called as falling edge
triggering. It is shown in the following figure.

What is flipflop?
In digital electronics, a flip-flop is a most elementary memory element used in several electronic
circuit to store 1-bit information. A flip-flop is a basically a bistable multivibrator having two stable
states.

Flip-flops are made up of an interconnection of logic gates. However, a logic gate itself does not
storage capability, but when several logic gates are arranged in a specific manner, they can store
information. Also, flip-flop is the most fundamental building block of sequential logic circuits. The
block diagram representation of a typical flip-flop is shown in Figure-1.
A flip-flop has one or more inputs and two outputs, usually represented by Q and Q' along with a
clock input. The clock input is used to trigger the flip-flop so that it can change states of its outputs.

There are several types of flip-flops such as SR flip-flop, JK flip-flop, D flip-flop, and T flip-flop. Each
type of flip-flop has its unique properties and characteristics needed for a particular purpose.

Synchronous and Asynchronous Flip-flops

A flip-flop whose logic circuit is clocked/triggered by a clock signal is known as a synchronous flip-
flop. Thus, the output states of the synchronous flip-flop do not change in the absence of the clock
signal, even if its inputs change many times.

On the other hand, an asynchronous flip-flop is one in which there is no clock signal, hence its output
changes instantly on the application of inputs.