Module 4 Computer Organization

MEMORY SYSTEM

SOME BASIC CONCEPTS

 In a byte addressable 32 bit computer, each memory word contains 4 bytes. A possible
way of address assignment is shown in the fig. below. The address of a word is integral
multiples of 4.
 The word length of a computer is defined as the number of bits stored or retrieved in one
main memory access.
 In a machine with 32 bit address bus, 30 bits will specify the address of a word and
remaining 2 bits specify which byte of the word to access.

1
Module 4 Computer Organization

2
Module 4 Computer Organization

SEMICONDUCTOR RAM MEMORIES

Semiconductor Memories are available in a wide range of speeds. Their cycle time range from
100 ns to less than 10 ns.

Internal Organization Of Memory Chips

 Memory cells are organized in the form of array.

 Each cell stores 1 bit of information.
 Each row of cells constitute a memory word.
 All cells are connected to a common line known as word line driven by address decoder.
 The cells in each column are connected to the Sense/Write circuit by two bit lines.
 The Sense/Write circuits are connected to the data input/output lines of the chip.
 During Read operation, these circuits sense or read the information stored in the cells
selected by the word line and transmits this information to the output data lines.
 During Write operation, the Sense/Write circuit receive input information and store it in
the cells of the selected word.
 Figure below is an example of a small memory chip consisting of 16 words of 8 bits each.

3
Module 4 Computer Organization

 Two control lines and CS are provided.

 The input specifies the required operation and CS (ChipSelect) selects a given
chip in multichip memory system.
 The figure above stores 128 (16x8) bits and requires 14 external connections.
 It also needs two lines for power supply and ground connections.
 A 1K(1024) memory cells can be organized as 128x8 memory with 19 external
connections or as 1Kx1 format with 15 external connections.
 The figure below shows the organization of 1Kx1 memory chip.
 It requires 10 bit address which is divided into two groups of 5 bits each to form row and
column addresses. Row address selects a row of 32 cells and column address selects one
cell in this row and that is connected to the external data line by output multiplexer and
input demultiplexer.

4
Module 4 Computer Organization

Static Memories

 Memories that consists of circuits capable of retaining their state as long as power is
applied are known as static memories. The figure below shows the implementation of
static RAM (SRAM).
 It has two cross connected inverters to form a latch.
 The latch is connected to two bit lines by transistors T1 and T2.
 These transistors act as switches which can be opened or closed under the control of word
line.

5
Module 4 Computer Organization

 When the word line is at ground level, the transistors are turned off and the latch retains
its state (Assume that the cell is in state 1 if the logic value at point X is 1 and point Y is
0).
 During Read Operation, the word line is activated and the switches T1 and T2 are closed.
If the cell is in state 1, the signal on bit b and bit b’ are initially made high i.e logic ‘1’.
Let us consider that initially X=’1’ and Y=’0’. Since T1 and T2 are ON, there is no
voltage difference between X and bit b and hence there is no discharge. As Y is 0 and bit
b’ is 1, there is a voltage drop and hence the voltage at Y decreases due to discharge. The
voltage difference between X and Y is higher with X higher than Y. Hence bit ‘1’ is read
into bit b line and b’ will be ‘0’. Similarly it can be explained for the initial condition of
X = ‘0’ and Y = ‘1’.
 During Write Operation, appropriate value is placed on the bit lines. The required
signals on bit lines are generated by the Sense/Write circuit. The word line is activated
and the switches T1 and T2 are closed. Consider that X = ‘0’ and Y = ‘1’. To write ‘1’
into the cell, transistor T6 must be stronger than T5 and ‘1’ will be written into the cell.
 The figure below shows the CMOS realization of the cell. Transistor pairs (T3, T5) and
(T4, T6) form the inverters in the latch.
 In state 1, the voltage at point X is maintained high by having transistors T3 and T6 ON
while T4 and T5 OFF. Thus if T1 and T2 are turned ON bit lines will have high and low
signals respectively.

6
Module 4 Computer Organization

 5V or 3V supply is given to CMOS SRAM.

 If the power is interrupted, the cell's contents will be lost. Hence SRAM is said to be a
volatile memory.
 A major advantage of CMOS SRAM is very low power consumption because T1, T2 and
one of the transistor in each inverter are turned off, ensuring that there is no active path
between Vsupply and ground. SRAMS are even quick to access.

Asynchronous DRAMS

 Static RAMs are fast but are expensive as it needs transistors. Hence Dynamic RAMs
(DRAMs) are used but they also do not hold their state indefinitely.
 Information is stored in a dynamic memory cell in the form of a charge on a capacitor
and this charge can be maintained for only tens of milliseconds. To store information for
a longer time, its contents must be periodically refreshed restoring the capacitor charge.
 The fig below shows the single transistor dynamic memory cell.
 In order to store information in this cell, transistor T is turned ON and an appropriate
voltage is applied to the bit line. Thus the capacitor stores some charge.
 After the transistor is turned OFF, the capacitor begins to discharge through its leakage
resistance or transistor.

7
Module 4 Computer Organization

 The information stored in the cell can be retrieved correctly only if it is read before the
charge on the capacitor drops below some threshold value.

 During Read Operation, the transistor in the selected cell is turned ON.
 A sense amplifier connected to the bit line detects whether the charge stored on the
capacitor is above the threshold value. If so it drives the bit line to full voltage that
corresponds to logic 1. This voltage recharges the capacitor to full charge. If the sense
amplifier detects that the charge on the capacitor is below the threshold value, it pulls the
bit line to ground level which ensures that capacitor will have no charge representing
logic 0.
 The figure below shows a 16 Megabit DRAM chip.
 There are 4096 cells in each row divided into 512 groups of 8 bits each. 12 address bits
are needed to select a row. Another 9 bits are needed to select a group of 8 bits in that
selected row. Thus 21 bit address is needed to access a byte.
 To reduce the number of pins needed for external connections, the row and column
addresses are multiplexed on 12 pins.
 During Read operation, the row address is applied first and Row Address Strobe (RAS)
input is activated. The Read operation is initiated in which all cells on the selected row
are read and refreshed. The column address is applied and Column Address Strobe (CAS)
is activated. Corresponding Sense/Write circuits are selected and data is transferred to
the Data Lines.
 During Write Operation, the information on the Data Lines is transferred on to the
selected cells.
 Normally CAS and RAS are active low signals.

8
Module 4 Computer Organization

 Dynamic memory chips have an inbuilt refresh circuit.

 The above figure represents asynchronous DRAMs as they don't have a clock to generate
timing signal.
 Two Advantages of DRAMs is high density and low cost.
 Fast Page Mode: This feature is used to transfer small groups of bytes as blocks. In this
bytes of data are transferred in sequential order by applying consecutive sequence of
CAS signals. Hence blocks of data can be transferred at a faster rate.

SRAM DRAM
It contains less memory cells per unit area It contains more memory cells per unit area as
compared to SRAM.
It has less access time, hence faster memories. Its access time is greater than SRAMs.
It consists of a number of flip flops where each It stores data as a charge on the capacitor. It
flip flop stores one bit. consists of MOSFET and capacitor for each
cell.
Refreshing circuitry is not required Refreshing circuitry is required to maintain
charge on the capacitors after every few
milliseconds. Extra hardware is required to
control refreshing. This makes system design
complicated.
Cost is more Cost is less

9
Module 4 Computer Organization

READ ONLY MEMORIES

ROM is a nonvolatile memory used extensively in embedded systems.

ROM

 The figure below shows a configuration of a ROM cell.

 A logic 0 is stored in the cell if the transistor is connected to ground at point P, otherwise
1 is stored.
 The bit line is connected through a resistor to the power supply.
 To Read the state of a cell, the word line is activated, the transistor is closed and the
voltage on bit line drops to 0 if transistor is connected to the ground, else it remains at
high voltage indicating 1.
 Data is written into the ROM when it is manufactured.

PROM

 Programmable ROMs (PROMs) allow the data to be loaded by the user.

 This is achieved by inserting a fuse at point P of the above figure.
 Before it is programmed the memory contains all 0s. 1s can be inserted by burning out
the fuses at these locations using high current pulses which is an irreversible process.
 Comparison between ROM and PROM:

ROM PROM

Flexible and Convenient Less Flexible and Convenient

Less Expensive when high volumes have to Expensive when high volumes have to be
be produced produced
Expensive when small numbers are Less Expensive when small numbers are
10
Module 4 Computer Organization

required as cost for preparing the mask is required as there is no cost for preparing
more. the mask.

EPROM

 Erasable PROM (EPROM) allows stored data to be erased and new data to be loaded.
 They can be used in place of ROMs while software is being developed as it can retain
stored information for long time.
 The structure of EPROM cell is similar to that of ROM cell.
 In this a special transistor is used at point P which has the ability to function as a normal
transistor or as a disabled transistor that is always turned off.
 This transistor can be programmed to behave as a permanently open switch by injecting
charge into it that becomes trapped inside.
 To erase the contents of EPROM, the charges trapped in the transistors of memory cells
have to be dissipated. This is done by exposing the chip to ultra violet light. Hence
EPROM chips are mounted in packages that have transparent windows.

Explanation with example: In our example, we consider a room with a very narrow door
represents the memory cell. People in the room represent electrons with their associated charge.
These people can only enter or exit through a much too narrow door with much pushing or
shoving to represent the tunneling effect.

Think of a room with about 30 people acting as the electron charge. A full room of people
represents a '1'; when empty a zero. When an EPROM is erased, all 30 people are pushed into
the room and provide the charge that we call '1'. When we program an EPROM bit, we shove
these people until they pop back out by applying a pulse of high voltage to the memory cell. This
pulse drives the people out of the room changing the bit from a '1' to a '0'.

When programming a bit we can only change a 1 to a 0 because changing a 0 to a 1 requires

erasing. To erase an EPROM, we apply an UV (Ultra-Violet) light (that shines directly on the
chip) to drive our imaginary people back into the room. Erasure works on the whole EPROM not
individual bits.

EEPROM

 A disadvantage of EPROMs is that the chip must be physically removed from the circuit
for reprogramming and erasing. Hence Electrically Erasable PROMs (EEPROMs) are
used.
 In EEPROMs the chips need not be removed and it is possible to erase the cell contents
selectively.
 The only disadvantage of EEPROMs is that different voltages are needed for erasing,
writing and reading the stored data.

11
Module 4 Computer Organization

 Extra: Instead of using UV light, you can return the electrons in the cells of an EEPROM
to normal with the localized application of an electric field to each cell. This erases the
targeted cells of the EEPROM, which can then be rewritten. EEPROMs are changed
1 byte at a time, which makes them versatile but slow. In fact, EEPROM chips are too
slow to use in many products that make quick changes to the data stored on the chip.
Hence Flash Memory is used.

Flash Memory

 Flash Memory devices are similar to EEPROM. In EEPROM it is possible to read and
write the contents of a single cell. In flash device it is possible to read the contents of a
single cell but it is only possible to write an entire block of cell. Prior to writing, the
previous contents of the block are erased.
 Flash devices have higher capacity and lower cost per bit. They consume less power and
requires single power supply voltage.
 Due to low power consumption it is used in portable equipment. In cell phones and hand
held computers, it is used to hold the software needed to operate the equipment. In digital
cameras, it is used to store picture image data. In MP3 players, it stores the data that
represents sound.
 These three are good examples of embedded system (An embedded system is a controller
with a dedicated function within a larger mechanical or electrical system, in real time –
MP3 players, mobile phones, digital cameras, DVD players, GPS).
 Single flash chip doesn't provide sufficient storage capacity for applications mentioned
above. So large number of modules consisting of a number of chips is used. Two choices
of implementations of such modules are: flash cards and flash drives.
 Flash Cards: In this flash chips are mounted on a small cards. This card is simple
plugged into a conveniently accessible slot. Typical sizes are 8, 32, 64 Mbytes. A minute
of music can be stored in 1Mbyte of memory in encoding format. Hence a 64 Mbyte flash
card can store 1 hour of music.
 Flash Drives: Flash drives are solid state electronic devices that have no movable parts.
They have some advantages. They have shorter seek and access time that provides faster
response. They have lower power consumption that makes them suitable for battery
driven applications and they are also insensitive to vibrations.

Comparison between Flash Drives and Hard Disk Drives

Flash Drives Hard Disk Drives

They are solid state electronic devices They are magnetic devices
They don't have movable parts and hence They have movable parts and hence
insensitive to vibration. sensitive to vibrations

12
Module 4 Computer Organization

They have shorter seek and access times They have comparatively larger seek and
which results in faster response. access times.
They have lower power consumption and
They have comparatively large power
hence suitable for battery driven
consumption.
applications
They are available in smaller storage
Storage capacity is larger
capacity.
Higher cost per bit Lower cost per bit.

Deterioration rate is high Deterioration rate is low

CACHE MEMORIES

 Cache Memory is a device which reduces the time needed to access the necessary
information.
 The effectiveness of cache mechanism is based on a property of computer programs
called locality of reference.
 Most of the execution time in programs is spent in routines, simple loops, nested loops
and few procedures as these instructions are executed repeatedly. Many instructions in
localized area of program are executed repeatedly during some time period and remaining
of the program is accessed infrequently. This is referred to as locality of reference.
 It manifests in two ways: temporal and spatial. Temporal aspect suggests that whenever
an information item is first needed, this item should be brought into the cache where it
will remain until it is needed again. The spatial aspect suggests that instead of fetching
just one item from the main memory to the cache it is useful to fetch several items that
reside at adjacent addresses as well.
 Cache block is also referred to as cache line (It is the basic unit of cache. It may store
multiple bytes or words of data).
 Consider the figure given below. When a Read request is received from the processor, the
contents of a block of memory words containing the location specified are transferred
into the cache one word at a time. When the program references any location in this
block, the desired contents are read directly from the cache. When the cache is full and
the memory word that is not in the cache is referenced, the cache control hardware must
decide which block should be removed to create space for the new block that contains the
referenced word. The collection of rules for making this decision constitutes the
replacement algorithm.

13
Module 4 Computer Organization

 The Read operation involves following protocols: read hit, read miss - The cache
control circuitry determines if a read operation is requested on the address in the cache.
Then read hit is said to have occurred. When the addressed word in the read operation is
not in cache, a read miss occurs. The block of words that contains the requested word is
copied from main memory into the cache. After entire block is loaded into the cache, the
particular word requested is forwarded to the processor. During the read from main
memory only it can be sent to the processor. This process is known as load
through/early restart which reduces the processor's waiting time.
 The Write operation involves following protocols: write hit, write through, write back/
copy back, write miss - When the cache has the address of the memory into which data
has to be written, then it is known as write hit. In write through protocol, the cache
location and main memory location are updated simultaneously. There is another
technique of carrying out Write operation in which only cache location is updated with
associated flag bit called dirty/modified bit. The main memory is updated later when the
block containing this marked word is to be removed from the cache to make room for a
new block. This technique is write back/copy back. These results in unnecessary Write
operations. When the address word is not in cache, then a write miss occurs. Then write
through protocol has to be used to write into the main memory.

VIRTUAL MEMORIES

For example, if you load the operating system, an e-mail program, a Web browser and word
processor into RAM simultaneously, 32 megabytes is not enough to hold it all. If there were no
such thing as virtual memory, then once you filled up the available RAM your computer would
have to say, "Sorry, you cannot load any more applications. Please close another application to
load a new one." With virtual memory, what the computer can do is look at RAM for areas that
have not been used recently and copy them onto the hard disk. This frees up space in RAM to
load the new application.

The read/write speed of a hard drive is much slower than RAM, and the technology of a hard
drive is not geared toward accessing small pieces of data at a time. If your system has to rely too

14
Module 4 Computer Organization

heavily on virtual memory, you will notice a significant performance drop. The key is to have
enough RAM to handle everything you tend to work on simultaneously -- then, the only time you
"feel" the slowness of virtual memory is when there's a slight pause when you're changing tasks.
When that's the case, virtual memory is perfect.

Example: A processor that issues 32 bit addresses has an addressable space of 4Gbytes. The size
of the main memory may be around 1Gbytes. When the program does not completely fit into the
main memory, a part of it may be stored in disks. In modern computers, the operating system
moves programs and data automatically between the main memory and secondary storage.

 Techniques that automatically move program and data blocks into the physical main
memory when they are required for execution are known as virtual memory techniques.

15
Module 4 Computer Organization

 Virtual/Logical addresses - These are the binary addresses that the processor issues for
either instructions or data. These addresses are translated into physical addresses by a
combination of hardware and software components. If the virtual address refers to a part
of the program or data space that is currently in physical memory, the contents of
appropriate location in the main memory can be accessed immediately. If the address is
not in main memory, its contents must be brought into the suitable memory before they
can be used.
 The figure below shows typical organization that implements virtual memory.
 Memory Management Unit - It translates virtual addresses into physical addresses. If the
data are not in the main memory, the MMU causes the OS to bring the data into memory
from the disk.

`
SECONDARY STORAGE
Some of the secondary storage devices are
Magnetic Hard Disks:
Extra: In your computer's hard drive, there aren't really any iron nails. There's just a large
shiny, circular "plate" of magnetic material called a platter, divided into billions of tiny areas.
Each one of those areas can be independently magnetized (to store a 1) or demagnetized (to
store a 0). Magnetism is used in computer storage because it goes on storing information even
when the power is switched off. If you magnetize a nail, it stays magnetized until you

16
Module 4 Computer Organization

demagnetize it. In much the same way, the computerized information (or data) stored in your PC
hard drive or iPod stays there even when you switch the power off.
When your computer stores data on its hard drive, it doesn't just throw magnetized nails into a
box, all jumbled up together. The data is stored in a very orderly pattern on each platter. Bits of
data are arranged in concentric, circular paths called tracks. Each track is broken up into
smaller areas called sectors. Part of the hard drive stores a map of sectors that have already
been used up and others that are still free. (In Windows, this map is called the File Allocation
Table or FAT.) When the computer wants to store new information, it takes a look at the map to
find some free sectors. Then it instructs the read-write head to move across the platter to exactly
the right location and store the data there. To read information, the same process runs in
reverse.
Hard disk stores information in the form of magnetic fields. Data is stored digitally in the form of
tiny magnetized regions on the platter where each region represents a bit. To write a data on the
hard disk, a magnetic field is placed on the tiny field in one of these two polarities: N-S – If
North Pole arrives before the south pole and S-N – if the south pole arrives before the north pole
while the field is accessed. An orientation in the one direction (like N-S) can represent the ‘1’
while the opposite orientation (S-N) represents “0”. This polarity is sensed by integrated
controllers built within the hard disk.
1. It consists of one or more disks mounted on a common spindle.
2. A thin magnetic film is deposited on either side of each disk.
3. The disks are placed in a rotary drive so that the magnetized surfaces move in close
proximity to read/write heads. This is shown in the figures below.

17
Module 4 Computer Organization

Organizing and Accessing of Data on a Disk:

 The organization of data on a disk is illustrated in the figure below.

 Each surface is divided into concentric tracks and each track is divided into sectors.
 The set of corresponding tracks on all surfaces of a stack of disks form a logical
cylinder.
 The data on all tracks of a cylinder can be accessed without moving the read/write
heads.

18
Module 4 Computer Organization

 The data are accessed by specifying the surface number, track number and the sector
number. The Read/Write operations start at sector boundaries.
 Data bits are stored serially on each track.
 Each sector usually contains 512 bytes of data. To distinguish between two
consecutive sectors, there is a small intersector gap.
 The formatting process divides the disk physically into tracks and sectors. Hence it
can discover defective sectors. The formatting information accounts for about 15% of
the total information that can be stored in a disk.
 The figure below shows the organization of one surface of a disk.
 Each track stores same amount of information. Here the stored information is packed
more densely on inner tracks than on outer tracks.
 It is possible to increase the storage density by placing more sectors on outer tracks at
the expense of complicated circuitry.

The disk rotates at a uniform speed. Each head consists of a magnetic yoke and
magnetizing coil. as shown in the figure below.

1. The digital information can be stored in magnetic film by applying current pulses of
suitable polarity to the magnetizing coil.
2. This causes magnetization of the film in the area underneath the head to switch to the
direction parallel to the applied field.
3. The same head can be used for reading. In this case, the changes in the magnetic field in
the vicinity of the head due to movement of the film induces a voltage in the coil.
4. The polarity of this voltage is managed by control circuitry.

19
Module 4 Computer Organization

5. Only changes in the magnetic field under the head can be sensed during the read
operation.
6. Therefore, if binary states 0 and 1 are represented by two opposite states of
magnetization, a voltage is induced in the head only at 0-to-1 and 1-to-0 transitions in the
bit stream.
7. One scheme of encoding the data on magnetic disk is Manchester or Phase Encoding.
as shown in the figure below.

8. Here changes in magnetization occurs for each data bit at the midpoint of each bit period.
This is a self clocking scheme.
9. The drawback of this scheme is its poor bit storage density. The space required to
represent each bit must be large enough to accommodate two changes of magnetization.
10. Winchester Technology - In this technology Read/Write heads must be maintained at a
very small distance from the moving disk surfaces. Usually the disks and read/write
heads are placed in a sealed, air filtered enclosure.
11. Closer the heads are to the disk surface, the more densely the data can be packed along
the track and the tracks can be closer to each other. Hence Winchester technology is
commonly used.
12. There is one Read/Write head per surface. All heads are mounted on a comb like arm that
can radially move across the stack of disks to provide access to individual tracks. To read
or write a given track, the arm holding the head must move to that track.
13. There are three main components in the disk system - disk, disk drive, disk controller
14. Disk - It is the assembly of disk platters.
15. Disk Drive - It is the electromechanical mechanism that spins the disk and move the
read/write heads.
16. Disk controller - It is the electronic circuitry the controls the operation of the system.

Access Time:

20
Module 4 Computer Organization

 There is a time delay between receiving an address and the beginning of the actual data
transfer.
 Seek Time: It is the time required to move the read/write head to the proper track. This
depends on the position of the head.
 Rotational Delay/Latency Time: This is the amount of time that elapses after the head is
positioned over the correct track until the starting position of the addressed sector passes
under the read/write address.
 Access Time: It is the sum of above two delays.

Typical Disks:

 Following are the parameters of 3.5 inch high capacity, high data rate disk available:
o There are 20 data recording surfaces with 15000 tracks per surface.
o There is an average of 400 sectors per track and each sector contains 512 bytes of
data.
o Hence the total capacity of the formatted disk is 20x15000x400x512 = 60Gbytes
o The average seek time is 6 ms.
o The platters rotate at 10000 revolutions per minute so that the average latency is 3
ms.
o Internal transfer rate from track to the data buffer in the disk controller is
34Mbytes/s.
 One inch disk may store 1Gbytes of data. Such disks are used in portable equipment and
hand held devices.

Data Buffer/Cache:

 A disk drive is connected to the rest of the computer system using some standard
interconnection scheme. A standard bus such as SCSI (Small Computer System Interface)
bus is used.
 This bus is capable of transferring data at much higher rates than the rate at which data
can be read from the disk tracks. This problem is overcome by including data buffer in
the disk unit.
 The transfer between the disk tracks and the buffer depends on the rotational speed of the
disk.
 Data buffer can also be used as a cache for the disk. When a read request arrives at the
disk, the controller can first check to see if the desired data are available in the cache or
not. If the so the data can be accessed and placed on the bus. Otherwise data are read
from disk track in the usual way and stored in cache.
 The disk controller can read more data and place it in the cache as the read request will be
for sequential data and also the response time for the next request will be small.

Disk Controller:

21
Module 4 Computer Organization

 This controls the operation of a disk drive and also provides interface between the disk
drive and the bus that connects it to the rest of the computer system.
 The figure below shows the disk controller which controls two disk drives.

 The disk controller uses DMA scheme to transfer data between the disk and the main
memory.
 Actually these transfers are from/to the data buffer which is implemented in disk
controller module.
 The OS initiates transfers by issuing Read/Write requests which involves loading the
controller's registers with necessary addressing and controller information like
o Main memory address - The address of the first main memory location of the
block of words involved in the transfer.
o Disk Address - The location of the sector containing the beginning of the desired
block of words.
o Word count - The number of words in the block to be transferred.
 The disk address issued by the OS is a logical address.
 On the disk drive side, the controller's major functions are:
o Seek - Causes the disk drive to move the read/write head from its current position
to the desired track.
o Read - Initiates a read operation starting at the address specified in the disk
address register. Data are placed into data buffer to be read later. The number of
words is determined by the word count register.
o Write - Transfers data to the disk.

22
Module 4 Computer Organization

o Error Checking - Computes the Error Correcting Code (ECC) value for the data
read from a given sector and compares it with the corresponding ECC value read
from the disk. In case of a mismatch it corrects the error if possible, otherwise
raises an interrupt to OS. During a write operation, the controller computes the
ECC value for the data to be written and stores this value on the disk.

Software and Operating System Implications:

 When the power is turned OFF, the contents of main memory are lost. When the power is
turned ON again, the OS has to be loaded into the main memory, which takes place as
part of the process known as booting.
 To initiate booting, a tiny part of the main memory is implemented as a nonvolatile
ROM.
 This ROM stores a small monitor program that can read and write main memory
locations as well as read one block of data stored on the disk at address 0. This block is
referred to as the boot block.
 Boot block contains loader program. After boot block is loaded into main memory by the
ROM monitor program, it loads the main parts of OS into the main memory.
 Disk accesses are very slow compared to main memory accesses. The OS normally
switches to other tasks instead of waiting for the transfer to complete. The disk controller
informs the OS when the transfer is completed by raising an interrupt.
 When OS requires transfers from multiple disks, efficient operation is achieved if DMA
transfer from/to one disk occurs while another disk is doing a seek.

Floppy Disks
 Floppy disks are smaller, simpler and cheaper disk units that consists of a flexible,
removable plastic diskette coated with magnetic material.
 The diskette is enclosed in a plastic jacket, which has an opening where the read/write
head makes contact with the diskette.
 A hole in the centre of a diskette allows spindle mechanism in the disk drive to position
and rotate the diskette.
 Single Density disks used Manchester Encoding for recording. The floppy disks used
now are called Double Density disks which increases the storage density and also
complexity of the circuit.
 Advantages
o Low cost
o Shipping convenience
 Disadvantages
o Smaller storage capacities
o longer access times
o Higher failure rates than hard disks

23
Module 4 Computer Organization

 Zip Disk - These are larger super floppy disks which can store more than 100 Mbytes of
data.

RAID Disk Arrays

 RAID stands for Redundant Array of Inexpensive Disks. It is a storage system based
on multiple disks proposed by University of California-Berkeley.
 It has six different configurations known as RAID levels.
 RAID 0 is the basic configuration to enhance performance
o In RAID 0 configuration a single large file is broken up into smaller pieces and
are stored on different disks. This is called as data striping.
o All disks can deliver their data in parallel.
o The total transfer time of the file is equal to the transfer time that would be
required in a single disk system divided by the number of disks used in the array.
o As each disk operates independently, access times vary and buffering of accessed
pieces of data is needed so that the complete file can be reassembled.
 RAID 1 is intended to provide better reliability by storing identical copies of data on two
disks rather than just one. If one disk drive fails, the other one can be used. This is
however costly because of duplication.
 RAID 2, RAID 3, RAID 4 levels achieve increased reliability through various parity
checking schemes without duplication.
 RAID 5 also has parity based error recovery schemes but this information is distributed
among all schemes.
 Some hybrid arrangements are also available which are the combination of some of the
above mentioned configurations.

ATA/EIDE Disks

 EIDE stands for Enhanced Integrated Drive Electronics and ATA stands for
Advanced Technology Attachment.
 It is a standard for disk interface.
 Disks which have this interface can be directly connected to the PCI bus.
 Advantage - low cost
 Disadvantage - Separate controller is needed for each drive if two drivers are to be used
concurrently to improve performance.

SCSI Disks

 These disks have interface designed for connection to a SCSI bus.

 Concurrent accesses can be made to multiple disk drives because the drive's interface is
actively connected to the SCSI bus only when the drive is ready for the data transfer. This
is helpful when there are large number of file requests.

24
Module 4 Computer Organization

RAID Disks

 These offer excellent performance and provide a large and reliable storage.
 They are less expensive.

Questions:

1. The application program in a computer system with cache uses 1400 instruction
acquisition bus cycle from cache memory and 100 from main memory. What is the hit
rate? If cache memory operates with zero wait state and main memory bus cycles use
three wait states, what is the average number of wait states experienced during the
program execution?
Ans:
Hit Rate = (Number of hits / Total number of bus cycles) x 100
Average Wait states = (Total Wait states / Number of memory bus cycles) x 100

Hit Rate = (1400 / (1400+100) x 100) = 93.33%

Total Wait States = 1400 x 0 + 100 x 3 = 300

Average Wait states = 300 / 1500 = 0.2

25