24-02-2022

U20EST117
BASIC ELECTRICAL AND
ELECTRONICS ENGINEERING

Presented by

Dr. M. Jayachandran
Dept. of EEE
SMVEC, Puducherry

UNIT-5

COMMUNICATION SYSTEMS
5.1 BJT 5.3 MOSFET
• Construction • EMOSFET
• Operation • DMOSFET
• Configuration and its characteristics • Numerical Applications
• Biasing
• Numerical Applications
5.2 JFET
• Construction
• Operation
• Configuration and its characteristics
• Biasing
• Numerical Applications

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5.1 TRANSISTOR

▪ The transistor is a semiconductor device and it comes in

two general types: the Bipolar Junction Transistor (BJT)
and the Field Effect Transistor (FET).
▪ It is named as transistor which is an acronym of two terms:
―transfer-of-resistor. It means that the internal resistance
of transistor transfers from one value to another values
depending on the biasing voltage applied to the transistor.
▪ Thus it is called Transfer resistor: i.e. TRANSISTOR.

▪ A bipolar transistor (BJT) is a three

terminal semiconductor device in which
the operation depends on the interaction
of both majority and minority carriers and
hence the name bipolar.
▪ The voltage between two terminals
(Collector & Emitter) controls the current
through the third terminal (Base). So it is
called current controlled device. This is
the basic principle of the BJT.
▪ It can be used as amplifier and logic
switches.

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Transistor Types:
▪ The symbolic representation of the two
types of the BJT is shown in figure,
➢ NPN Transistor
➢ PNP Transistor

Equivalent diode representation:

▪ The transistor formed by back to back
connection of two diodes

Transistor Construction:
▪ NPN Transistor: In NPN transistor a thin layer of P-type silicon is
sandwiched between two layers of N-type silicon.
▪ PNP Transistor: In PNP transistor a thin layer of N-type silicon is
sandwiched between two layers of P-type silicon.

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Area:[C>E>B]:
▪ The area of collector layer is largest. So it can dissipate heat quickly.
▪ Area of emitter layer is medium.
▪ Area of base layer is smallest and it is very thin layer.
Doping level:[E>C>B]:
▪ Emitter layer is heavily doped. So it has largest number of charges.
▪ Collector layer is moderately doped. So it has medium number of charges.
▪ Base layer is lightly doped. So it has a very few number of charges.
Junctions:
▪ There are two junctions in this transistor – junction J1 and junction J2.
▪ The junction between collector layer and base layer is called as collector-base
junction or CB junction.
▪ The junction between base layer and emitter layer is called as base-emitter junction
▪ or EB junction.
▪ The two junctions have almost same potential barrier voltage of 0.6V to 0.7V, just
like in a diode.

Transistor Biasing:
▪ The states of the two pn junctions can be altered by the external circuitry
connected to the transistor. This is called biasing the transistor.
▪ Usually the emitter-base junction is forward biased and collector–base
junction is reverse biased. Due to forward bias on the emitter-base junction
an emitter current flows through the base into the collector. Though, the
collector–base junction is reverse biased, almost the entire emitter current
flows through the collector circuit.

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Transistor Modes of Operation:

▪ There are two junctions in bipolar junction transistor. Each junction
can be forward or reverse biased independently.
▪ Thus there are four modes of operations:

Modes Emitter-Base Collector- Base Applications

junction junction
Forward Active Forward Reverse Amplifier
Reverse active Reverse Forward Digital circuits
Saturation Forward Forward Closed switch
Cutoff Reverse Reverse Open switch

Forward Active:
▪ In this mode of operation, emitter-base junction is forward biased and collector
base junction is reverse biased. Transistor behaves as a source. With controlled
source characteristics the BJT can be used as an amplifier and in analog circuits.
Reverse Active:
▪ It is opposite to forward active mode because in this emitter base junction is
reverse biased and collector base junction is forward biased. It is called inverted
mode. It is no suitable for amplification. However the reverse active mode has
application in digital circuits and certain analog switching circuits.
Saturation:
▪ In saturation mode both junctions are forward biased large collector current flows
with a small voltage across collector base junction. Transistor behaves as an closed
switch.
Cut off:
▪ When both junctions are reverse biased it is called cut off mode. In this situation
there is nearly zero current and transistor behaves as an open switch.

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Transistor Currents:
▪ The arrow is always drawn on the emitter. The arrow always point
toward the n-type. The arrow indicates the direction of the emitter
current:
➢ NPN: B → E
➢ PNP: E → B

IC = the collector current,

IB = the base current,
IE = the emitter current

Operation of NPN Transistor:

▪ Emitter base junction is forward biased and
collector base junction is reverse biased.
▪ Due to emitter base junction is forward biased
lot of electrons from emitter entering the base
region.
▪ Base is lightly doped with P-type impurity. So
the number of holes in the base region is very
small.
▪ Due to this, electron-hole recombination is
less (i.e,) few electrons (<5%) combine with
holes to constitute base current (IB).
▪ The remaining electrons (>95%) crossover into
collector region, to constitute collector
current (IC).

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Operation of PNP Transistor:

▪ Emitter base junction is forward biased and
collector base junction is reverse biased.
▪ Due to emitter base junction is forward biased
lot of holes from emitter entering the base
region and electrons from base to emitter
region.
▪ Base is lightly doped with N-type impurity. So
the number of electrons in the base region is
very small.
▪ Due to this, electron- hole recombination is
less (i.e,) few holes (<5%) combine with
electrons to constitute base current(IB).
▪ The remaining holes (>95%) crossover into
collector region, to constitute collector
current (IC).

Transistor Configurations:
Three types of configuration is available
1. Common emitter (CE) configuration
2. Common base(CB) configuration
3. Common collector (CC) configuration

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1. Common Emitter (CE) configuration:

Input Characteristics:
▪ It is defined as the characteristic curve drawn
between input voltages to input current
whereas output voltage is constant.
▪ To determine input characteristics, the
collector base voltage VCB is kept constant at
zero and base current IB is increased from
zero by increasing VBE. This is repeated for
higher fixed values of VCE.
▪ A curve is drawn between base current and
base emitter voltage at constant collector
base voltage is shown in figure. Here the base
width decreases. So curve moves right as VCE
increases.

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Output Characteristics:
▪ It is defined as the characteristic curve
drawn between output voltage to output
current whereas input current is constant.
▪ To determine output characteristics, the
base current IB is kept constant at zero and
collector current Ic is increased from zero
by increasing VCE. This is repeated for
higher fixed values of IB.
▪ From the characteristic it is seen that for a
constant value of IB, Ic is independent of
VCB and the curves are parallel to the axis of
VCE.

Active region:
▪ EB junction forward bias and CB junction reverse
bias.
▪ IE increased, IC increased.
▪ Refer to the graph, IC≈IE
▪ IC not depends on VCB
▪ Suitable region for the transistor working as
amplifier.
Saturation region:
▪ BE and CB junction both are forward bias
▪ Small changes in VCB will cause big different to IC
▪ The allocation for this region is to the left of
VCB=0V.
Cut off region:
▪ BE and CB is reverse biase
▪ Region below the line of IE=0A
▪ No current flow at collector, only leakage current

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2. Common Base (CB) configuration:

• It is also called as grounded base configuration. Emitter is used as a input terminal where as
collector is the output terminal.

Input Characteristics:
▪ It is defined as the characteristic curve drawn
between input voltage to input current
whereas output voltage is constant.
▪ To determine input characteristics, the
collector base voltage VCB is kept constant at
zero and emitter current IE is increased from
zero by increasing VEB.
▪ This is repeated for higher fixed values of VCB.
▪ A curve is drawn between emitter current and
emitter base voltage at constant collector
base voltage. When VCB is zero EB junctions
is forward biased. So it behaves as a diode so
that emitter current increases rapidly.

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Output Characteristics:
▪ It is defined as the characteristic curve drawn between
output voltage to output current whereas input current is
constant.
▪ To determine output characteristics, the emitter current IE
is kept constant at zero and collector current IC is increased
from zero by increasing VCB. This is repeated for higher fixed
values of IE.
▪ From the characteristic it is seen that for a constant value of
IE, Ic is independent of VCB and the curves are parallel to the
axis of VCB. As the emitter base junction is forward biased the
majority carriers that is electrons from the emitter region
are injected into the base region.
▪ In CB configuration a variation of the base-collector voltage
results in a variation of the quasi-neutral width in the base.
▪ The gradient of the minority-carrier density in the base
therefore changes, yielding an increased collector current as
the collector-base current is increased. This effect is referred
to as the Early effect.

3. Common Collector (CC) configuration:

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Input Characteristics:
▪ It is defined as the characteristic curve
drawn between input voltage to input
current whereas output voltage is
constant.
▪ To determine input characteristics, the
emitter base voltage VEB is kept constant
at zero and base current IB is increased
from zero by increasing VBC. This is
repeated for higher fixed values of VCE.
▪ A curve is drawn between base current and
base emitter voltage at constant collector
base voltage.

Output Characteristics:
▪ It is defined as the characteristic curve
drawn between output voltage to output
current whereas input current is constant.
▪ To determine output characteristics, the
base current IB is kept constant at zero and
emitter current IE is increased from zero by
increasing VEC. This is repeated for higher
fixed values of IB.
▪ From the characteristic it is seen that for a
constant value of IB, IE is independent of
VEB and the curves are parallel to the axis
of VEC.

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Comparison of CE, CB, and CC configuration

Property CB CE CC
Input resistance Low (100𝛀) Moderate (750𝛀) High (750𝐤𝛀)
Output resistance High (450𝐤𝛀) Moderate (45k𝛀) Low (25𝛀)
Current gain 1 High High
Voltage gain About 150 About 500 Less than 1
Phase shift 0 or 360º 180º 0 or 360º
between i/p and
o/p voltages
Applications High frequency Audio frequency Impedance
circuits circuits matching

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Transistor Biasing:
▪ If transistor is not biased properly, it would work inefficiently and
produce distortion in output signal.
▪ A transistor is biased either with the help of battery or associating a
circuit. The later method is more efficient and it is frequently used.
▪ The circuit used for transistor biasing is called the biasing circuit.

Three types of biasing

1. Fixed bias (base bias)
2. Collector to base bias (base bias with collector feedback)
3. Voltage divider bias (self bias)

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1. Fixed bias (base bias):

KVL at input side:
𝑽𝑩𝑩 = 𝑽𝑩𝑬 + 𝑰𝑩 𝑹𝑩

𝑽𝑩𝑩 − 𝑽𝑩𝑬
𝑰𝑩 =
𝑹𝑩

KVL at output side:

𝑽𝑪𝑪 = 𝑽𝑪𝑬 + 𝑰𝑪 𝑹𝑪

𝑽𝑪𝑬 = 𝑽𝑪𝑪 − 𝑰𝑪 𝑹𝑪

𝑽𝑪𝑪 − 𝑽𝑪𝑬
𝑰𝑪 =
𝑹𝑪

𝑰𝑬 = 𝑰𝑪 + 𝑰𝑩 𝑰𝑬 = 𝟏 + 𝜷 𝑰𝑩
𝑰𝑪 𝑰𝑪 = 𝜶𝑰𝑬
𝜷= 𝑰𝑪 ≅ 𝑰𝑬
𝑰𝑩
𝑰𝑪
𝜶= KVL at input side:
𝑰𝑬
𝑽𝑩𝑩 = 𝑽𝑩𝑬 + 𝑰𝑩 𝑹𝑩 + 𝑰𝑬 𝑹𝑬

𝑽𝑩𝑩 − 𝑽𝑩𝑬
𝑰𝑩 =
𝑹𝑩 + (𝟏 + 𝜷)𝑹𝑬
KVL at output side:
𝑽𝑪𝑪 = 𝑽𝑪𝑬 + 𝑰𝑪 𝑹𝑪 + 𝑰𝑬 𝑹𝑬

𝑽𝑪𝑬 = 𝑽𝑪𝑪 − 𝑰𝑪 𝑹𝑪 − 𝑰𝑬 𝑹𝑬

𝑽𝑪𝑬 = 𝑽𝑪𝑪 − 𝑰𝑪 (𝑹𝑪 +𝑹𝑬 )

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2. Collector to base bias (base bias with collector feedback):

𝑰𝑪 = 𝜷𝑰𝑩 KVL at input side:
𝑽𝑪𝑪 = 𝑽𝑩𝑬 + 𝑰𝑪 𝑹𝑪 + 𝑰𝑩 𝑹𝑩

𝑽𝑪𝑪 − 𝑽𝑩𝑬
𝑰𝑩 =
𝜷𝑹𝑪 + 𝑹𝑩

KVL at output side:

𝑽𝑪𝑪 = 𝑽𝑪𝑬 + 𝑰𝑪 𝑹𝑪

𝑽𝑪𝑬 = 𝑽𝑪𝑪 − 𝑰𝑪 𝑹𝑪

3. Voltage divider bias (self bias):

KVL at input side:
𝑰𝑪 = 𝜶𝑰𝑬
𝑹𝟐
𝑰𝑪 ≅ 𝑰𝑬 𝑽𝑩 = × 𝑽𝑪𝑪
𝑹𝟏 + 𝑹𝟐

𝑽𝑬 = 𝑽𝑩 − 𝑽𝑩𝑬

KVL at output side:

𝑽𝑪𝑪 = 𝑽𝑪𝑬 + 𝑰𝑪 𝑹𝑪 + 𝑰𝑬 𝑹𝑬

𝑽𝑪𝑬 = 𝑽𝑪𝑪 − 𝑰𝑪 𝑹𝑪 − 𝑰𝑬 𝑹𝑬

𝑽𝑪𝑬 = 𝑽𝑪𝑪 − 𝑰𝑪 (𝑹𝑪 +𝑹𝑬 )

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Applications of BJT:
▪ Switching
▪ Amplification
▪ Converters
▪ Automatic switch
▪ Temperature sensors
▪ Electronic switches
▪ Amplifiers
▪ High driving capability
▪ Detection circuits
▪ High-frequency operation
▪ Demodulator and modulator
▪ Digital switch
▪ Clippers
▪ Oscillation circuit

5.2 FIELD EFFECT TRANSISTOR

▪ The field effect transistor is a semiconductor device, which

depends for its operation on the control of current by an
electric field.
There are two of field effect transistors:
1. JFET (Junction Field Effect Transistor)
2. MOSFET (Metal Oxide Semiconductor Field Effect Transistor)
The FET has

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Advantages FET over conventional transistor:

1. In a conventional transistor, the operation depends upon the flow of
majority and minority carriers. That is why it is called bipolar transistor. In
FET the operation depends upon the flow of majority carriers only. It is
called unipolar device.
2. The input to conventional transistor amplifier involves a forward biased PN
junction with its inherently low dynamic impedance. The input to FET
involves a reverse biased PN junction hence the high input impedance of
the order of Mega-ohm.
3. It is less noisy than a bipolar transistor.
4. It exhibits no offset voltage at zero drain current.
5. It has thermal stability.
6. It is relatively immune to radiation.

Note: The main disadvantage is its relatively small gain bandwidth product in comparison with
conventional transistor.

Operation of FET:
▪ if a voltage is applied across the bar, the current
flows through the channel.
▪ The terminal through which majority carriers
enter the channel is called source (S) and leaves
the channel is called drain (D).
▪ For an N-channel device, electrons are the
majority carriers. Hence the circuit behaves like
a dc voltage VDS applied across a resistance RDS.
The resulting current is the drain current ID. If
VDS increases, ID increases proportionally.
▪ Both sides of the n-type bar heavily doped
regions of p-type impurity have been formed by
any method for creating pn junction. These
impurity regions are called gates (G).

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▪ Consider now the behavior of drain current ID vs

drain source voltage VDS. The gate source
voltage is zero therefore VGS=0. Suppose that VDS
is gradually linearly increased linearly from 0V.
ID also increases.
▪ Since the channel behaves as a semiconductor
resistance, therefore it follows ohm's law. The
region is called ohmic region, with increasing
current, the ohmic voltage drop between the
source and the channel region reverse biased
the junction.
▪ The conducting portion of the channel begins to
constrict and ID begins to level off until a
specific value of VDS is reached, called the pinch
of voltage (VP). ∆𝑽𝑫𝑺 𝑽𝑫𝑺
Drain Resistance: 𝒓𝑫 = Ohnic Resistance: 𝑹𝑫𝑺 =
∆𝑰𝑫 𝑰𝑫

▪ At this point further increase in VDS do not produce

corresponding increase in ID. Instead, as VDS
increases, both depletion regions extend further into
the channel, resulting in a no more cross section,
and hence a higher channel resistance.
▪ Thus even though, there is more voltage, the
resistance is also greater and the current remains
relatively constant. This is called pinch off or
saturation region.
▪ The current in this region is maximum current that
FET can produce and designated by IDSS. (Drain to
source current with gate shorted).
▪ As with all pn junctions, when the reverse voltage
exceeds a certain level, avalanche breakdown of PN
junction occurs and ID rises very rapidly.

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N-channel JFET:
▪ Consider an N-channel JFET with a reverse gate
source voltage.
▪ The additional reverse bias, pinch off will occur
for smaller values of |VDS|, and the maximum
drain current will be smaller. A family of curves
for different values of VGS (negative).
▪ Suppose that VGS=0 and that due of VDS at a
specific point along the channel is +5V with
respect to ground. Therefore reverse voltage
across either p-n junction is now 5V. If VGS is
decreased from 0 to –1V the net reverse bias
near the point is 5 - (-1) = 6V. Thus for any fixed
value of VDS, the channel width decreases as VGS
is made more negative.

▪ Thus ID value changes correspondingly. When the gate

voltage is negative enough, the depletion layers touch
each other and the conducting channel pinches off
(disappears). In this case the drain current is cut off.
▪ The gate voltage that produces cut off is symbolized VGS
(off) . It is same as pinch off voltage.
▪ Since the gate source junction is a reverse biased silicon
diode, only a very small reverse current flows through
it. Ideally gate current is zero. As a result, all the free
electrons from the source go to the drain i.e. ID = IS.
Because the gate draws almost negligible reverse
current the input resistance is very high 10's or 100's of
Mega-ohm. Therefore where high input impedance is
required, JFET is preferred over BJT.
▪ The disadvantage is less control over output current i.e.
FET takes larger changes in input voltage to produce
changes in output current. For this reason, JFET has
less voltage gain than a bipolar amplifier.

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Transductance Curves:
▪ The transductance (gm) curve of a JFET is a graph of output current
(ID) vs input voltage (VGS).
▪ By reading the value of ID and VGS for a particular value of VDS, the
transductance curve can be plotted. The transductance curve is a part
of parabola. It has an equation of

𝟐
𝑽𝑮𝑺
𝑰𝑫 = 𝑰𝑫𝑺𝑺 𝟏 −
𝑽𝑮𝑺 𝒐𝒇𝒇

∆𝑰𝑫
Transconductance: 𝒈𝒎 =
∆𝑽𝑫𝑺

Comparison between BJT and FET:

BJT FET
• Bipolar device. • Unipolar device.
(current conduction by both electrons and (current conduction is only due to majority carriers,
holes) either electrons and holes)
• Current controlled device • Voltage controlled device.
(The voltage across the two terminals (The current through the two terminals controlled
controlled by a current at third terminal) by voltage at third terminal)
• Low input impedance • High input impedance
• Transconductance is very high • Lower than BJT
• Gain is characterized by voltage gain • Gain is characterized by transconductance
• Lower thermal stability • Better thermal stability
• High noise level • Low noise level
Application: Application:
• As amplifier - active region • As amplifier – saturation (pinchoff) region
• As switch-cutoff & saturation region • As switch-cutoff & ohmic region
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5.3 METAL OXIDE SEMICONDUCTOR FIELD EFFECT

TRANSISTOR (MOSFET)

▪ Like JFET, it has a source, Drain and Gate.

▪ It is also called IGFET (Insulated Gate FET) because gate
terminal is insulated from channel. Therefore it has
extremely high input resistance.

There are two types of MOSFET:

1. Depletion mode MOSFET
➢ N-channel
➢ P-channel

1. Enhancement mode MOSFET

➢ N-channel
➢ P-channel

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Deplition mode MOSFET:

▪ In depletion mode of operation the bias voltage on the gate reduce
the number of charge carriers in the channel and therefore reduce
the drain current (ID).
▪ It operates in both depletion mode and enhancement mode.

Construction of D-MOSFET:
▪ It consists of lightly doped p-type substrate in which
two highly doped n-regions are diffused.
▪ The source and drain terminals are connected
through metallic contacts to n-doped regions linked
by an n-channel.
▪ The gate is also connected to a metal contact surface
but remains insulated from the n-channel by a very
thin silicon dioxide (SiO2) layer.
▪ SiO2 is a particular type of insulator referred to as a
dielectric that sets up opposing electric fields within
the dielectric when exposed to an externally applied
field.
▪ Then the thin layer of metal aluminium is formed
over the SiO2 layer. This metal overs the entire
channel region and it forms the gate (G).

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Operation of D-MOSFET:
Case-1 “when VDS increased from zero”
▪ Here drain is connected to positive
supply. It act as a reverse bias. Due to
this, depletion region gets increases.
▪ Free electron from n-channel are attracted
towards positive potential of drain
terminal.
▪ This establishes current through channel
flows from drain to source and denoted as
IDSS.
Pinch of voltage
▪ The pinch off voltage is the voltage at
which the junction is depleted of charge
carriers.

Operation of D-MOSFET:
Case-2 “when VGS increased from zero”
▪ The negative charge on gate repels
conduction electrons from the channel
and attract holes from the p-type
substrate.
▪ Due to this electron-hole recombination
occurs and reduce the number of free
electrons in the channel available for
conduction, reducing Drain current (ID).
▪ When negative voltage of VGS is increased
the pinch of voltage decreased. When it is
further increased the channel is fully
depleted and no current flows through it.
▪ The negative voltage depletion MOSFET.

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Characteristics of D-MOSFET:

Fig: Drain and Transfer Characteristics

Enhancement mode MOSFET:

▪ In this mode bias on the gate increases the number of charge carriers
in the channel and increases the drain current (ID).
▪ It operates only in the enhancement mode and has no depletion
mode of operation. It has no physical channel.

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Construction of E-MOSFET:
▪ In the basic construction of the n-channel enhancement-
type MOSFET, a slab of p-type material is formed from a
silicon base and is again referred to as the substrate.
▪ As with the depletion-type MOSFET, the substrate is
sometimes internally connected to the source terminal,
while in other cases a fourth lead is made available for
external control of its potential level.
▪ The SiO2 layer is still present to isolate the gate metallic
platform from the region between the drain and source, but
now it is simply separated from a section of the p-type
material.
▪ In summary, therefore, the construction of an
enhancement-type MOSFET is quite similar to that of the
depletion-type MOSFET, except for the absence of a channel
between the drain and source terminals.

Operation of E-MOSFET:
▪ If VGS is set at 0V and a voltage applied
between the drain and source of the device,
the absence of an n-channel (with its generous
number of free carriers) will result in a current
of effectively zero amperes—quite different
from the depletion- type MOSFET and JFET
where ID - IDSS.
▪ It is not sufficient to saturation level as
occurred for the JFET and depletion-type
MOSFET.
▪ The conductivity of the channel is enhanced
by the positive bias voltage on the gate, the
device is known as enhancement MOSFET. E-
MOSFET‘s are normally called as “OFF
MOSFET”

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Characteristics of E-MOSFET:

Fig: Drain and Transfer Characteristics

Applications of FET:
▪ Low Noise Amplifier
▪ Buffer Amplifier
▪ Cascode Amplifier
▪ Analog Switch
▪ Chopper
▪ Multiplexer
▪ Current Limiter
▪ Phase Shift Oscillators

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