VEHICLE TO VEHICLE BIDIRECTIONAL CHARGING

USING DUAL ACTIVE BRIDGE TOPOLOGY

PROJECT REPORT

Submitted by

KAVYA M TCR21EE076
LIVIN LINTO LTCR21EE145
PARVATHY O G TCR21EE105
SREEPRIYA S TCR21EE122
MOHAMMED SUFAID K P TCR21EE090

to
The APJ Abdul Kalam Technological University
in fulfillment of the requirements for the award of the Degree
of
Bachelor of Technology
in
Electrical and Electronics Engineering

Department of Electrical Engineering

Government Engineering College Thrissur
680009
MARCH 2025
 DECLARATION

We, the undersigned, declare that the project report titled VEHICLE TO
VEHICLE BIDIRECTIONAL CHARGING USING DUAL ACTIVE BRIDGE
TOPOLOGY submitted for partial fulfillment of the requirements for the award of
the degree of Bachelor of Technology of the APJ Abdul Kalam Technological Uni-
versity, Kerala, is a bonafide work done by us under supervision of [Link] K.
Damodaran. This submission represents our ideas in our own words and where
ideas or words of others have been included, we have adequately and accurately
cited and referenced the sources. We also declare we have adhered to the ethics of
academic honesty and integrity and have not misrepresented or fabricated any data
or idea or fact or source in our submission. We understand that any violation of the
above will be a cause for disciplinary action by the institute and/or the University
and can also evoke penal action from the sources that have thus not been properly
cited or from whom proper permission has not been obtained. This report has not
been previously formed the basis for the award of any degree, diploma, or similar
title of any other University.

Signature of student : Signature of student :

Name of student : KAVYA M Name of student : LIVIN LINTO
Signature of student : Signature of student :
Name of student : PARVATHY O G Name of student : SREEPRIYA S
Signature of student :
Name of student : MOHAMMED SUFAID K P

Place : Thrissur
Date : April 7, 2025

2
 DEPARTMENT OF ELECTRICAL ENGINEERING
Government Engineering College Thrissur
Thrissur
680009

CERTIFICATE

This is to certify that the report entitled VEHICLE TO VEHICLE

BIDIRECTIONAL CHARGING USING DUAL ACTIVE BRIDGE
TOPOLOGY submitted by KAVYA M, LIVIN LINTO, PARVATHY O G,
SREEPRIYA S, MOHAMMED SUFAID K P to the APJ Abdul Kalam Tech-
nological University in partial fulfillment of the requirements for the award of the
Degree of Bachelor of Technology in Electrical and Electronics Engineering is a
bonafide record of the project work carried out by him/her under my/our guidance
and supervision. This report in any form has not been submitted to any other Uni-
versity or Institute for any purpose.

Internal Supervisor Project Coordinator

Name : [Link] K. Damodaran Name : Dr. Lalgy Gopi
Signature : Signature :

Project Coordinator Head of Department

Name : Dr. Jaison Mathew Name : [Link] B.
Signature : Signature :
 ACKNOWLEDGMENT

We wish to record our indebtedness and thankfulness to all who helped us

prepare this project report titled VEHICLE TO VEHICLE BIDIRECTIONAL
CHARGING USING DUAL ACTIVE BRIDGE TOPOLOGY and present it
satisfactorily.
We express our sincere gratitude to our guide and supervisor, [Link] K.
Damodaran, in the Department of Electrical Engineering, for their invaluable sug-
gestions and critical insights that greatly contributed to the preparation of this re-
port.
We extend our heartfelt gratitude to Dr. Lalgy Gopi for his unwavering sup-
port and guidance throughout our work. Our profound appreciation also goes to
Dr. Jaison Mathew, our project coordinator, whose mentorship has been a strong
guiding force in the successful execution of this project.
Furthermore, we are deeply grateful to Dr. Joseph K. D., Professor in the
Department of Electrical Engineering, for his valuable inputs that enhanced the
quality of our project.
Our classmates have always been helpful, and we are grateful to them for
patiently listening to our presentations on the work related to the project.

KAVYA M
LIVIN LINTO
PARVATHY O G
SREEPRIYA S
MOHAMMED SUFAID K P
B. Tech. (Electrical and Electronics Engineering)
Department of Electrical Engineering
Government Engineering College Thrissur

i
 ABSTRACT

As electric vehicles (EVs) continue to proliferate, developing efficient and

flexible charging solutions becomes essential for a sustainable and resilient energy
infrastructure. This project explores the concept of Vehicle-to-Vehicle (V2V) bidi-
rectional charging using dual active bridge topology, a technology that enables en-
ergy exchange between two electric [Link] Dual Active Bridge (DAB) is a
popular DC-DC converter known for its benefits, including galvanic isolation, high
power density, bidirectional power transfer, and soft switching. This project fo-
cuses on developing a dynamic model of the DAB using traditional single-phase
shift (SPS) modulation and comparing it with existing literature.A V2V charging
system with a DAB converter uses feedforward control to ensure efficient power
transfer by adjusting phase shift based on the donor battery’s voltage. With Single
Phase Shift (SPS) modulation, power flow is regulated solely through phase shift,
keeping duty ratios constant. The proposed control strategy is verified in simula-
[Link] results demonstrate the effectiveness of the dual active bridge in
providing stable, efficient V2V charging under different load and battery condi-
tions. The DAB converter witha fixed delay of 5ms is developed to understand the
working of a practical dual active bridge converter and the results are compared
with the [Link] project provides valuable insights into the design and po-
tential of V2V charging systems, contributing to the future of flexible, resilient EV
energy networks.

ii
LIST OF ABBREVIATIONS AND SYMBOLS

Abbreviation Definition
EV Electric Vehicle
V2V Vehicle to Vehicle
ZVS Zero Voltage Switching
DAB Dual Active Bridge
V2G Vehicle to Grid
SoC State of Charge
ADC Analog to Digital Converter
EMI Electromagnetic Interference
PWM Pulse Width Modulation
SRAM Static Random-Access Memory
PSRAM Pseudo-Static RAM

iii
 CONTENTS

ACKNOWLEDGEMENT i

ABSTRACT ii

LIST OF ABBREVIATIONS AND SYMBOLS iii

LIST OF FIGURES vi

Chapter 1. INTRODUCTION 1
1.1 BACKGROUND . . . . . . . . . . . . . . . . . . . . . . . 1

Chapter 2. 3
2.1 PROBLEM STATEMENT . . . . . . . . . . . . . . . . . . 3
2.2 OBJECTIVES . . . . . . . . . . . . . . . . . . . . . . . . . 3
2.3 IMPORTANCE OF BIDIRECTIONAL V2V CHARGING . 3

Chapter 3. LITERATURE SURVEY 5

3.1 V2V BIDIRECTIONAL CHARGING . . . . . . . . . . . . 5
3.2 DC-DC CONVERTERS . . . . . . . . . . . . . . . . . . . 5
3.3 DUAL ACTIVE BRIDGE CONVERTER . . . . . . . . . . 6

Chapter 4. METHODOLOGY 7
4.1 SYSTEM SPECIFICATION . . . . . . . . . . . . . . . . . 7
4.2 SELECTION OF CONVERTER TOPOLOGY . . . . . . . 8
4.3 CONTROL PLAN . . . . . . . . . . . . . . . . . . . . . . 8

Chapter 5. DAB AND MODES OF OPERATION 10

5.1 ZERO VOLTAGE SWITCHING . . . . . . . . . . . . . . . 10

iv
 5.1.1 ZERO VOLTAGE SWITCHING RANGE . . . 11
5.2 GALVANIC ISOLATION . . . . . . . . . . . . . . . . . . 11
5.3 BIDIRECTIONAL FLOW . . . . . . . . . . . . . . . . . . 12
5.4 SWITCHING FREQUENCY . . . . . . . . . . . . . . . . . 12
5.5 DC BLOCKING CAPACITOR . . . . . . . . . . . . . . . . 13
5.6 MODES OF OPERATION . . . . . . . . . . . . . . . . . . 13
5.6.1 MODE 1 . . . . . . . . . . . . . . . . . . . . 14
5.6.2 MODE 2 . . . . . . . . . . . . . . . . . . . . 14
5.6.3 MODE 3 . . . . . . . . . . . . . . . . . . . . 15
5.6.4 MODE 4 . . . . . . . . . . . . . . . . . . . . 16
5.6.5 ILLUSTRATION OF WAVEFORMS . . . . . 17

Chapter 6. DESIGN 19
6.1 DAB DESIGN . . . . . . . . . . . . . . . . . . . . . . . . 19
6.1.1 DESIGN OF TRANSFORMER . . . . . . . . 20
6.1.2 DESIGN OF INDUCTOR . . . . . . . . . . . 21

Chapter 7. SIMULATION STUDIES 22

7.1 OPEN LOOP SIMULATION . . . . . . . . . . . . . . . . . 22
7.1.1 SIMULATION RESULTS FOR POSITIVE PHASE
SHIFT . . . . . . . . . . . . . . . . . . . . . 22
7.1.2 SIMULATION RESULTS FOR NEGATIVE
PHASE SHIFT . . . . . . . . . . . . . . . . . 26
7.2 CLOSED LOOP SIMULATION . . . . . . . . . . . . . . . 28
7.2.1 SIMULATION DIAGRAM FOR CLOSED LOOP
SIMULATION . . . . . . . . . . . . . . . . . 29

Chapter 8. HARDWARE AND EXPERIMENTATION 34

8.1 COMPONENTS . . . . . . . . . . . . . . . . . . . . . . . 34
8.1.1 STM32F303RET6 . . . . . . . . . . . . . . . 34
8.1.2 BATTERY . . . . . . . . . . . . . . . . . . . 35

v
 8.1.3 HCPL3120 . . . . . . . . . . . . . . . . . . . 35
8.1.4 IRFB4110 . . . . . . . . . . . . . . . . . . . 36
8.2 Ki CAD Schematic for PCB . . . . . . . . . . . . . . . . . 37
8.3 ALGORITHM OF PROGRAM . . . . . . . . . . . . . . . . 39
8.4 HARDWARE SETUP . . . . . . . . . . . . . . . . . . . . . 40
8.5 RESULTS . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
8.5.1 PULSE USING MICROCONTROLLER . . . 41
8.5.2 VOLTAGE SENSOR . . . . . . . . . . . . . . 42
8.5.3 OUTPUT ACROSS DRIVER CIRCUIT . . . 42
8.5.4 VOLTAGE ACROSS TRANSFORMER WIND-
ING . . . . . . . . . . . . . . . . . . . . . . . 43

Chapter 9. CONCLUSION 44

Chapter 10. FUTURE PROSPECTS 45

REFERENCES 46

Chapter A. DATA SHEETS 48

Apéndice 68

vi
 LIST OF FIGURES

2.1 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

5.1 DAB circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

5.2 mode 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
5.3 mode 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
5.4 mode 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
5.5 mode 4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
5.6 Waveform in different intervals . . . . . . . . . . . . . . . . . . . . 18

7.1 Open loop simulation diagram . . . . . . . . . . . . . . . . . . . . 23

7.2 Input waveforms obtained on scope . . . . . . . . . . . . . . . . . 24
7.3 Output waveforms positive phase shift . . . . . . . . . . . . . . . . 24
7.4 Inductor current and voltage across transformer of DAB for positive
phase shift . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
7.5 ZVS with positive phase shift . . . . . . . . . . . . . . . . . . . . . 25
7.6 Input waveforms of negative phase shift simulation . . . . . . . . . 26
7.7 Output waveforms of negative phase shift . . . . . . . . . . . . . . 27
7.8 ZVS for negative phase shift . . . . . . . . . . . . . . . . . . . . . 27
7.9 Inductor current and voltage across transformer of DAB for nega-
tive phase shift . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
7.10 Inductor Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
7.11 Closed loop simulation diagram . . . . . . . . . . . . . . . . . . . 30
7.12 Input Waveforms of closed loop . . . . . . . . . . . . . . . . . . . 31
7.13 Output waveforms of closed loop . . . . . . . . . . . . . . . . . . . 31
7.14 Inductor current and transformer . . . . . . . . . . . . . . . . . . . 32
7.15 Pulse and Delayed Pulse . . . . . . . . . . . . . . . . . . . . . . . 32

vii
8.1 STM32F303RET6 . . . . . . . . . . . . . . . . . . . . . . . . . . 35
8.2 BATTERY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
8.3 HCPL3120 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
8.4 IRFB4110 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
8.5 Gate Driver Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . 37
8.6 Voltage Regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
8.7 DAB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
8.8 Volatge Sensor . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
8.9 EXPERIMENTAL SETUP . . . . . . . . . . . . . . . . . . . . . . 40
8.10 Pulse from STM32 . . . . . . . . . . . . . . . . . . . . . . . . . . 41
8.11 Driver Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
8.12 Voltage across primary winding of transformer . . . . . . . . . . . 43
8.13 Voltage across secondary winding of transformer . . . . . . . . . . 43

viii
 Chapter 1
INTRODUCTION

Electric vehicles (EVs) offer a cleaner and more sustainable alternative to

traditional internal combustion engine vehicles, playing a vital role in global efforts
toward carbon neutrality. However, limited and unevenly distributed charging in-
frastructure leads to range anxiety, hindering widespread adoption. To address this
challenge, governments and industries are investing in EV infrastructure and incen-
tives. This project focuses on developing a bidirectional charging system that allows
EVs to share power, enabling one vehicle to charge another in remote locations. By
facilitating energy transfer between vehicles, this system reduces the risk of strand-
ing, enhances long-distance travel feasibility, and contributes to a more resilient and
interconnected EV charging network. This project analyses the Dual Active Bridge
(DAB) converter for Vehicle-to-Vehicle (V2V) charging, focusing on voltage reg-
ulation, power stability, and minimizing energy losses during bidirectional energy
transfer. Simulation results evaluate the DAB’s efficiency, performance, and control
under varying load conditions. Additionally, hardware experiments were conducted
to validate the findings, providing practical insights into the converter’s real-world
performance.

1.1 BACKGROUND

With global trend of sustainable transportation, electric vehicles (EVs) have

emerged as a key solution to reducing greenhouse gas emissions and dependence
on fossil fuels. However, widespread EV adoption is hindered by challenges in
charging infrastructure, including limited charging stations, long charging times,
and uneven distribution of charging networks.
 In this complex scenario ,bidirectional charging technology has gained atten-
tion, enabling energy transfer not only from the grid to the vehicle (G2V) but also
between vehicles (V2V). Vehicle-to-Vehicle (V2V) charging allows an EV with
surplus battery capacity to charge another vehicle, enhancing charging flexibility,
emergency support, and energy efficiency.
A critical component for implementing efficient V2V charging is the Dual
Active Bridge (DAB) converter[1], a high-performance bidirectional DC-DC con-
[Link] ability to handle high power levels with minimal losses makes it ideal
for V2V charging applications, ensuring stable and controlled energy transfer be-
tween [Link] advancing V2V charging technology, this work contributes to the
development of a more resilient, flexible, and interconnected EV charging ecosys-
tem, ultimately supporting the broader transition toward sustainable and intelligent
transportation networks.

2
 Chapter 2

2.1 PROBLEM STATEMENT

The widespread adoption of electric vehicles (EVs) is primarily hindered

by the limited availability and accessibility of charging infrastructure, especially in
deserted areas. Existing charging technology often suffers from long wait times,
reliability issues, and lack of standardization, limiting its efficiency and flexibility.
To address these challenges and promote the growth of EVs, a bidirectional V2V
charging system using dual active bridge converter can be a solution.

2.2 OBJECTIVES

The objective of this project is to design and implement a V2V bidirectional

charging system using the dual active bridge (DAB) topology to enable efficient en-
ergy transfer between electric vehicles. This involves a comprehensive analysis of
the DAB converter’s performance across various operating conditions, along with
the development of control strategies that ensure reliable, safe, and efficient bidirec-
tional energy flow. The control algorithms optimizes energy transfer by taking into
account factors such as state of charge (SOC), power demand, and vehicle status
during both charging and discharging phases.

2.3 IMPORTANCE OF BIDIRECTIONAL V2V CHARGING

V2V charging utilizing the Dual Active Bridge (DAB) topology facilitates
efficient, bidirectional energy transfer between electric vehicles by enabling precise
power flow control between two active H-bridges interconnected through an iso-
lated [Link] topology is well-suited for V2V due to its high efficiency,
 Figure 2.1: Block Diagram

power density, and simplified control, making it ideal for compact, vehicle-based
applications. DAB-based V2V systems optimize energy sharing, reduce reliance
on stationary chargers, and support a resilient, decentralized network for EV en-
ergy exchange.
In the proposed V2V bidirectional charging system, each electric vehicle
(Vehicle A and Vehicle B) is equipped with a battery and a DAB converter, as
illustrated in the block diagram.
When one vehicle needs to transfer energy to another, the control system
evaluates the state of charge (SOC) of both vehicles’ batteries, assesses power re-
quirements, and decides the direction of energy flow. For instance, if Vehicle A has
surplus energy and Vehicle B requires a charge, Vehicle A can initiate the transfer.
The control system coordinates the operation of the DAB converters in both
vehicles. It adjusts the power output, monitors the battery conditions, and ensures
that the energy transfer occurs within safe limits. The control algorithms are de-
signed to adapt to changing conditions, such as variations in battery voltage.

4
 Chapter 3
LITERATURE SURVEY

3.1 V2V BIDIRECTIONAL CHARGING

Several charging topologies exist, each with its own advantages and disad-
vantages. Conductive charging, which includes AC and DC charging, is the most
common method. AC charging is further categorized into Level 1, Level 2, and
Level 3 (DC Fast Charging), with increasing power levels and charging speeds.
V2V bidirectional charging allow EVs to exchange energy with each other,
creating a decentralized energy network. This technology offers several benefits, in-
cluding enhanced grid resilience, emergency charging, and optimized energy man-
agement. To fully realize the potential of V2V bidirectional charging, several ad-
vancements are required: high-power, high-efficiency power electronics, advanced
battery management systems, robust communication protocols, standardized charg-
ing interfaces, and viable economic models.

3.2 DC-DC CONVERTERS

A review of bidirectional converter topologies for V2G systems[2] has been

conducted, identifying the DAB converter as a key enabler of seamless power ex-
change between electric vehicles (EVs) and the grid. They stressed the need for op-
timized control strategies to enhance power flow efficiency and reduce harmonics
and reverse power loss in V2G applications. Several DC-DC converter topologies
have been proposed for V2V charging applications, each with its own advantages
and disadvantages.
Among the isolated topologies, the selection of a suitable DC-DC converter
topology for V2V charging depends on various factors, including power level, volt-
age gain, efficiency, and cost. While non-isolated topologies offer simplicity and
low cost, isolated topologies provide galvanic isolation and higher power density.
the Dual Active Bridge (DAB) converter stands out as a promising solution due to
its high efficiency, high power density, and bidirectional power flow capabilities.

3.3 DUAL ACTIVE BRIDGE CONVERTER

The design and implementation of a DAB converter has been investigated

for DC microgrid applications[3], emphasizing its high efficiency, reduced current
stresses, and stability in managing varying power flows . Their study highlighted
the DAB’s suitability for energy storage systems, which are crucial for ensuring
the reliability of DC microgrids. Further,various simulation methods for DAB con-
verters using platforms such as MATLAB/Simulink and PSIM are compared[4],
illustrating how different tools impact simulation accuracy and computational effi-
ciency. Their findings provide valuable insights into selecting appropriate simula-
tion approaches for power electronics applications. A foundational study focused
on the zero-voltage switching (ZVS) characteristics of the DAB converter[1], em-
phasizing its role in improving efficiency and power density for renewable energy
systems, battery storage, and EV applications. Their work demonstrated that ZVS
operation helps minimize switching losses, making DAB converters ideal for high-
power applications.
Collectively, these studies underscore the advantages of DAB converters,
including bidirectional power flow, high efficiency due to ZVS, and galvanic isola-
tion, making them well-suited for applications in microgrids, energy storage, and
EV charging systems.

6
 Chapter 4
METHODOLOGY

The methodology for designing and implementing a Vehicle-to-Vehicle (V2V)

charging system involves several key steps such as analysing the system’s power re-
quirements, including voltage levels and power [Link] are determined based
on the specific needs of the vehicles. The systematic approach and technical frame-
work employed in the design, development, and implementation of a bidirectional
Vehicle-to-Vehicle (V2V) charging system. This innovative system allows for the
exchange of electrical energy between two electric vehicles (EVs), facilitating not
only the charging of a vehicle’s battery but also enabling one vehicle to supply
power to another when needed. By adopting a structured process, this methodology
ensures a safe, efficient, and scalable solution for V2V charging, with an emphasis
on minimizing energy loss, maintaining battery health, and promoting sustainabil-
ity.

4.1 SYSTEM SPECIFICATION

A high-efficiency DC-DC converter is used to step down the voltage, typi-

cally from 36V to 24V, while supporting bidirectional power flow for both charg-
ing and [Link] power output is 200W. It uses a 50KHz frequency trans-
[Link] control mechanism, such as current limiting, balance the transfer of
energy based on the vehicles’ battery levels, with an automatic cutoff when either
battery reaches a critical level.
4.2 SELECTION OF CONVERTER TOPOLOGY

Bidirectional converter topologies encompass a variety of types, each dis-

tinguished by unique characteristics and applications[2]. Single-stage topologies
include both non-resonant and resonant dual-bridge converters, which cater to vary-
ing power levels and efficiency needs. Among these, non-resonant dual-bridge con-
verters, such as the bidirectional full-bridge DC-DC converter and the Dual Active
Bridge (DAB) configuration, are particularly notable for their efficiency stemming
from reduced switching losses, although simpler isolated converters may encounter
limitations in high-power applications. The single-phase DAB converter, with its
symmetrical structure, facilitates bidirectional power flow while utilizing minimal
passive components and achieving low switching losses; however, it struggles to
maintain soft switching under low-load conditions.
According to the system specifications,the Dual Active Bridge (DAB) con-
verter is chosen due to its superior efficiency, bidirectional power transfer capa-
bility, and suitability for high-power applications like Vehicle-to-Vehicle (V2V)
charging systems. This allows efficient power transfer in both directions without
requiring complex [Link] converter efficiently manages high power levels
with reduced switching losses through zero-voltage switching (ZVS) techniques,
ensuring optimal performance in V2V charging [Link] single phase shift
control strategy in the DAB converter allows precise regulation of power flow, mak-
ing it adaptable to different charging scenarios and improving system stability and
[Link] transformer-based structure of the DAB provides galvanic isolation,
enhancing safety while maintaining a compact and power-dense design, making it
ideal for mobile charging solutions.

4.3 CONTROL PLAN

In a Vehicle-to-Vehicle (V2V) charging system using a Dual Active Bridge

(DAB) converter, the current control strategy plays a crucial role in ensuring ef-
ficient and safe power transfer between vehicles. The primary goal is to regulate

8
power transfer while accommodating variations in battery voltage, state of charge
(SoC), and dynamic power demands.
This system utilizes a feedforward control strategy, a predictive approach
that anticipates disturbances and applies corrective actions proactively rather than
reactively. In the context of bidirectional V2V charging, feedforward control en-
hances efficiency, reduces response time, and ensures stable power transfer by dy-
namically adjusting charging parameters based on expected variations in system
conditions.
Since the Single Phase Shift (SPS) modulation scheme is used in the DAB
converter, the phase shift between the two bridges serves as the sole control pa-
rameter, while the duty ratio of the pulses in both the primary and secondary sides
remains constant. The direction of power flow is determined by the phase shift.
In this control approach, the current flowing into the recipient vehicle’s bat-
tery is assumed to remain constant. The phase shift, which introduces a delay in the
second bridge, is continuously adjusted based on the voltage of the donor vehicle’s
battery.

9
 Chapter 5
DAB AND MODES OF OPERATION

A single-phase Dual Active Bridge (DAB) DC/DC converter topology of-

fers advantages like soft-switching commutations, a decreased number of devices
and high efficiency. The design is beneficial where power density, cost, weight,
galvanic isolation, high-voltage conversion ratio, and reliability are critical factors,
making this design an excellent choice for EV charging stations and energy storage
applications. Modularity and symmetrical structure in the DAB allow for stack-
ing converters to achieve high power throughput and facilitate a bidirectional mode
of operation to support battery charging and discharging applications. Advanced
control strategies, particularly phase-shift modulation, regulate power flow in both
charging (buck mode) and discharging (boost mode) operations, allowing for flexi-
ble energy transfer between vehicles.

5.1 ZERO VOLTAGE SWITCHING

Zero-Voltage Switching (ZVS) is employed in the converter to minimize

switching losses[5]. ZVS ensures that the voltage across a power switch is zero
during the switching transition, significantly reducing power dissipation.
In a DAB converter, ZVS is achieved by carefully controlling the phase shift
between the primary and secondary sides. During the on-time of the primary side
switches, energy is stored in the primary side inductor. When the secondary side
switches turn on, the stored energy is transferred to the secondary side, resulting in
zero-voltage conditions for the secondary side switches. This enables the secondary
side switches to turn on with ZVS, minimizing switching losses. The secondary side
switches, in turn, induce a voltage across the primary side switches, allowing them
to turn on with ZVS as well.
By effectively employing ZVS, DAB converters offer numerous advantages,
including high efficiency, reduced electromagnetic interference (EMI), improved
thermal performance, and extended component lifespan. Achieving optimal ZVS
performance requires careful design considerations, such as precise phase shift con-
trol, appropriate inductor design, and mitigation of parasitic capacitances. In addi-
tion to ZVS, DAB converters can also achieve zero-current switching (ZCS) under
certain conditions. This further reduces switching losses and improves efficiency.

5.1.1 ZERO VOLTAGE SWITCHING RANGE

The ZVS range in a DAB converter is determined by the phase shift between
the primary and secondary sides. A minimum phase shift is required to ensure ZVS
for all switching [Link] minimum phase shift depends on the input and
output voltage ratio and the inductor current.
By analyzing the inductor current waveform and the timing of the switching
transitions, it can be determined that the ZVS range is bounded by specific condi-
tions on the inductor current. These conditions ensure that the inductor current is
sufficient to discharge the output capacitances of the MOSFETs and achieve ZVS.
It’s important to note that the ZVS range is influenced by various factors,
including the load conditions, the input and output voltage levels, and the parasitic
capacitances of the MOSFETs. Careful design and control of the DAB converter
are essential to optimize ZVS operation and maximize efficiency.

5.2 GALVANIC ISOLATION

Dual Active Bridge converter has ability to provide galvanic isolation be-
tween the input and output stages. This isolation is achieved through the use of a
high-frequency transformer.
Galvanic isolation offers several benefits like physically separating the in-
put and output stages, galvanic isolation significantly reduces the risk of electric

11
shock. The transformer acts as a barrier, preventing the propagation of common-
mode noise, which can interfere with sensitive electronic components. Galvanic
isolation can increase the reliability of the converter by minimizing the impact of
faults or disturbances in one stage on the other.

5.3 BIDIRECTIONAL FLOW

The bidirectional capability is achieved through precise control of the phase

shift between the primary and secondary sides of the converter. Power transfer
happens in a dual-active bridge where two high-frequency square waves are created
in the primary and secondary side of the transformer by the switching action of
MOSFETs. These high-frequency square waves are phase shifted with respect to
each other. Power transfer takes place from the leading bridge to the lagging bridge,
and this power flow direction can be easily changed by reversing the phase shift
between the two bridges. Hence, it is possible to obtain bidirectional power transfer
with ease in a dual-active bridge.

5.4 SWITCHING FREQUENCY

Switching frequency is an important parameter which affects the efficiency

and power density of the power converter. The input and output voltage levels
primarily determine the type of switches used in the power stage. Usage of SiC
MOSFETs in the power stage enables high switching frequencies. Operating at
higher switching frequencies enables a reduced size of magnetics which improves
thermal conditions, thereby improving the power density of the converter. There-
fore, selection of switching frequency is primarily a tradeoff between the allowable
heat sink design and the transformer size for a given efficiency target.

12
5.5 DC BLOCKING CAPACITOR

DC Blocking capacitors are introduced in the power stage to avoid satura-

tion of the transformer in case of unbalanced currents, which can be caused by
mismatched PWM signals, mismatched propagation delays in gate drivers or other
asymmetries in the system. Especially during start-up and load transients unbal-
anced currents can occur. The DC blocking capacitors should be able to withstand
the full-voltage and provide enough capacitance to not influence the switch node
voltage waveforms in a significant manner.

5.6 MODES OF OPERATION

WORKING: The dual active bridge converter is a DC-AC-DC converter

which has bidirectional current [Link] consist of two H bridge one acting as a recti-
fier and the other as inverter in one direction and vice versa in other direction. It has
a high-frequency transformer to provide galvanic isolation. The leakage inductance
in the high-frequency provides energy storage capability in the energy [Link] is
a single-stage topology.
The gate pulses are given to switch S1 and S4 and the complement of this pulse is
given to S2 and S3 . A delay is provided to the gating pulse of S1 and S4 and this
delayed pulse is given to S5 and S8 and the complement of this is given to S7 and
S6 .

Figure 5.1: DAB circuit.

13
5.6.1 MODE 1

Here Switch S1 ,S4 and S7 ,S6 are turned ON.I1 enters the transformer through
dot here and leave through the other dot as I2 . The current flow in circuit as in the
loop.v1 is the primary voltage which is positive and v2 in the secondary is negative
as per the dot convention.
As v1 is positive and v2 is negative, the voltage across the inductor, vL will be a
high positive value and the current IL is the integral of vL which will be a rapidly
increasing ramp.
vL = v12
vL = v1 − v2
v1 > 0, v2 < 0
vL = v1 − (−v2 ) = v1 + v2
1R
IL = L vL dt

Figure 5.2: mode 1

5.6.2 MODE 2

Here Switch S1 ,S4 remains ON and S5 ,S8 are turned ON. I1 enters the trans-
former through the dot here and leave through the other dot. The current flows in
the circuit as in the loops. v1 is the primary voltage which is positive and v2 in the
secondary is also positive as per the dot convention and direction of current.
As v1 and v2 are positive, the voltage across the inductor, vL will be a small positive

14
value, and the current IL is the integral of vL which will be a ramp that will increase
in a small rate.
vL = v12
vL = v1 − v2
v1 > 0, v2 > 0
vL = v1 − (v2 ) = v1 − v2
1R
IL = L vL dt

Figure 5.3: mode 2

5.6.3 MODE 3

Here Switch S2 ,S3 are turned ON keeping the switch S7 ,S6 [Link] current
flows in the circuit as in the [Link] v1 is negative and v2 in the secondary is
positive as per the dot convention.
As v1 is negative and v2 is positive,the voltage across inductor, vL will be a large
negative value as shown in the wave form,and the current IL is the integral of vL
which will be a ramp with large negative valued slope.
vL = v12
vL = v1 − v2
v1 < 0, v2 > 0
vL = −v1 − (v2 ) = −v1 − v2
1R
IL = L vL dt

15
 Figure 5.4: mode 3

5.6.4 MODE 4

Here Switch S2 ,S3 and S7 ,S6 are turned ON. The current flows in the circuit
as in the [Link] v1 is negative and v2 in the secondary is also negative as per the
dot convention.
As v1 and v2 are negative, the voltage across inductor, vL will be a small negative
value and the current IL is the integral of vL which will give a ramp of small negative
slope.
vL = v12
vL = v1 − v2
v1 < 0, v2 < 0
vL = −v1 − (−v2 ) = −v1 + v2
1R
IL = L vL dt

16
 Figure 5.5: mode 4

5.6.5 ILLUSTRATION OF WAVEFORMS

Figure 5.6. provides a detailed representation of the switching pulses applied

to the various switches in the Dual Active Bridge (DAB) converter across its differ-
ent operating modes—Mode 1, Mode 2, Mode 3, and Mode 4. These modes define
the sequence and timing of switch operations, which ultimately govern the power
transfer between the primary and secondary sides of the converter. The gate pulses
determine the conduction state of the switches, thereby influencing the behavior of
the primary voltage v1 and secondary voltage v2 . As the switches turn on and off in
a controlled manner, they generate the desired AC voltage waveform on both sides
of the transformer, facilitating efficient energy transfer. Additionally, the inductor
voltage vL and inductor current IL are illustrated to show the energy storage and
transfer characteristics of the system. The inductor plays a crucial role in shaping
the current waveform and ensuring smooth power flow between the two bridges.
By analyzing these waveforms, one can gain insights into the DAB converter’s op-
eration, phase shift control, and overall efficiency in bidirectional power transfer
applications.

17
Figure 5.6: Waveform in different intervals

18
 Chapter 6
DESIGN

Design of a dual active bridge DC-DC converter with an input voltage of 36V
and output voltage of 24V at a switching frequency of 50kHz, power as 200W
and a duty ratio of 50% with a phase shift of 90 degree for bidirectional flow.
The high frequency transformer for dual active bridge converter is designed
with primary voltage V1 as 36V secondary voltage V2 as 24V with primary
current I1 as 5.55A and secondary current I2 as [Link] power is taken
as 200W. The leakage inductance required for the DC-DC converter is pro-
vided with a leakage inductor of leakage inductance calculated from the DAB
design and considering transformer inductance.

6.1 DAB DESIGN

Input Voltage,Vin = 36V

Out put Voltage,Vo = 24V
Switching Frequency, fs = 50kHz
Out put Power = 200W
Duty Ratio, D = 0.5
Turns Ratio, n = VVino = 24
36 = 0.666
Inductor Design,
ZV S region depends on L
L = Vin ×Von×P
×D(1−D)
o
= 36×24×0.5(1−0.5)
0.667×200 = 32.3838µH
Vin ×D(1−D)×Td
Out put Current, Iout = n×L = 8.33A
Phase Shi f t, φ = 2π fs Td = πD
Time Delay, Td = 5µs
6.1.1 DESIGN OF TRANSFORMER

A high frequency transformer for DAB was designed[6][7]for the following

specifications
V1 = 36V V2 = 24V P = 200W
So,
V1 I1RMS 200
AC AW = 2KW BM Jf = 2×0.35×0.2×4×50×106
= 21428mm4
Selected Core EE 42/15/21 (click to re f er selection chart f rom appendix)
No. of turns
V
N= 4BM fAC
36
N1 = 4×0.2×182×10−6 ×5×104
= 8.4 turns, Taken as 9 Turns
24
N2 = 4×0.2×182×10 −6 ×5×104 = 5.6 turns, Taken as 6 Turns
aW1 = IJ1 = 5.56
4 = 1.39mm
2

aW2 = IJ2 = 8.33

4 = 2.08mm
2

1
Skin depth = √π×µ×c×f = 0.3mm
We are using copper stranded wire of 24 SWG , AC = 0.24 mm2
1.39
Parallel turn in primary = 0.26 = 6 Turns
Parallel turn in secondary = 2.08
0.26 = 9 Turns
Mean Length = 93mm
Takeresistivityas = 1.68 × 10−5 ohm mm
N1 l 9×1.68×10−5 ×93×10−6
Internal Resistance in primary Rp1 = A = 125×10−6
= 77.3 µohm
−5 ×93×10 −6
Internal Resistance in secondary Rp2 = NA2 l = 6×1.68×10
125×10−6
= 51.5 µohm
Magnetising Inductance,
Le = 97 mm AC = 182mm2 µr = 1590
Le 97×10−3
Reluctance = µr µo AC =
1590×4×3.14×10−7 ×182×10−6
= 266743/H
N21 2
9
Primary inductance = reluctance = 266743 = 3 × 10−4 H = 300 µH
N22 52
Secondary inductance = reluctance = 369159 = 1.31 × 10−4 H = 131 µH
36 −6 = 0.6 A
Magnetising Current = 2×3.03×10 −4 10 × 10

Energy Stored = L2m × I2m = 0.5 × 3 × 10−4 × 0.6 = 5.4 × 10−5 J

2
2N21 µo bW 2×92 ×4×3.14×10−7 ×(6.8×10−3 )
Leakage Inductance = 3h = 3×2×10.3×10−3
= 0.12 µH

20
6.1.2 DESIGN OF INDUCTOR

A leakage inductor of inductance ,Lleak is required for dual active bridge

after consider the inductance provided by the transformer, it is designed as follows:
T1 (Vout −n×Vin +2×n×D×Vin ) −6
Lleak = 5.09 × 10−6 I1 = 2×n×Lleak = 10×10 ×(24−0.667×36+2×0.667×0.5×36
2×0.667×32.3838×10−6
= 5.57A
T1 (2×D×Vin +n×Vin −Vout ) −6 (2×0.5×24+0.667×36−24)
I2 = 2×n×Lleak = 10×102×0.667×32.3838×10−6

= 5.57A
q q
I21 I22 I1 I2 2×Φ 5.572 5.572
+ 5.57×5.57 1 − 2×90



ILrms = 3 + 3 + 3 1− 180 = 3 + 3 3 180
= 4.547A
Take Ip = 5.57A
Core Area calculation;
L×Ip
AC = N×Bm Bm = 0.2T
Conductor selection;
Let J = 4A/mm2
Irms 4.547
a = J = 4 = 1.1369mm2 , selected 18SWGwire.(re f er selection chart f rom appendix)
Core Window Area Calculation ;
KW = 0.4
N × a ⩽ AW × KW
L×Ip ×Irms 32.3838×10−6 ×5.57×4.547
AW AC = Bm×J×KW = 0.2×4×0.4 = 0.2544 × 104 mm4
Select the core E 42/15/21 with Ac = 40 mm2 (re f er selection chart f rom appendix)
L×IP 32.3838×10−6 ×5.57
N= AC ×Bm = = 22.4775 ≈ 23 Turns
40 × 10−6 × 0.2
To find air gap ;
µ×N×Ip −7 ×23×5.57
Ig = Bm = 4π×10 0.2 = 0.804mm ≈ 1mm
Ig ×Bm −3
1×10 ×0.2
N= µ0×Ip = 4π×10−7 ×5.57 = 29 Turns

A DAB converter was designed to meet the required specifications. A transformer

with a 0.667 turns ratio was designed,providing a leakage inductance of 0.1µ[Link]
additional required leakage inductance is supplied by an inductor with an induc-
tance of 32.3838µH.

21
 Chapter 7
SIMULATION STUDIES

The simulation for the bidirectional DC-DC converter of dual active bridge
was implemented using MATLAB. 36V, 6Ah(input) and 24V 9Ah(output) batteries
were used for the simulation according to the design. A phase delay of ±5µs for
90°phase shift was given for bidirectional power flow. The power flow was observed
with SOC 60% and 10%. The simulation results indicate successful operation of
the converter.

7.1 OPEN LOOP SIMULATION

Simulation was done using a 36V 6Ah battery on the input side and 24V
9Ah battery on the output [Link] inductor of leakage inductance 32.3838µH is
connected in the primary [Link] filter capacitors of 100µF and 22µF are used
in the input and output [Link] first battery is set to 60% SOC and second
battery to 10%.The pulse to the secondary bridge is given a delay of ±5µs.

7.1.1 SIMULATION RESULTS FOR POSITIVE PHASE SHIFT

Output Voltage: The output voltage stabilized at a constant DC value of 24.96 V,

confirming that the second battery was successfully charged.
Output Current: The output current exhibited a periodic waveform, with an average
value of 7.057 A. This waveform aligns with the expected behavior of the converter
in steady-state conditions.
Power Transfer: The instantaneous and average power waveforms demonstrate ef-
fective power transfer from the input to the output. The average power output was
measured to be 176.2 W, which is consistent with the converter’s design objectives.
Figure 7.1: Open loop simulation diagram

23
Battery Charging: A gradual increase in the State of Charge (SOC) of the second
battery was observed, indicating that the converter is efficiently charging the battery.

Figure 7.2: Input waveforms obtained on scope

During the experiment, a DC input voltage of 38.58V was applied to the sys-
tem. The observed input current waveform exhibited an average value of 4.708A,
while the corresponding input power waveform had an average value of 181.7W.

Figure 7.3: Output waveforms positive phase shift

The system’s output was observed to have a DC voltage of 24.96V. The output
current waveform exhibited an average value of 7.057A, while the output power
waveform had an average value of 176.2W.

24
Figure 7.4: Inductor current and voltage across transformer of DAB for positive
phase shift

The waveforms of voltage across the primary and secondary of the trans-
former and current through the inductor were [Link] inductor current of av-
erage value 4.708A was obtained.

Figure 7.5: ZVS with positive phase shift

It is verified that switching of the MOSFET occurs when the voltage across
it is zero.

25
7.1.2 SIMULATION RESULTS FOR NEGATIVE PHASE SHIFT

To observe power flow in opposite direction, the SOC of 36V battery was set
to 10% and that of 24V battery was set as 60%. a negative phase shift of 90°was
given to the converter for the powerflow. The phase daley corresponding to that is
-5µs.
The simulation results obtained are:
Output Voltage:The output voltage stabilized at a constant DC value of 25.75 V.
Output Current: The output current exhibited a periodic waveform, with an average
value of -6.02 A. This waveform aligns with the expected behavior of the converter
in steady-state conditions
Power Transfer: The instantaneous and average power waveforms demonstrate ef-
fective power transfer from the input to the output. The average power output
was measured to be -155 W, which is consistent with the converter’s design ob-
[Link] negative power indicates that power is flowing from second battery to
first battery.
Battery Charging: A gradual increase in the State of Charge (SOC) of the first bat-
tery was observed, indicating that the converter is efficiently charging the battery.

Figure 7.6: Input waveforms of negative phase shift simulation

During the experiment, a DC input voltage of 36.9V is observed across the first
battery. The observed input current waveform exhibited an average value of 4.769
A, while the corresponding input power waveform had an average value of 175.9W.

26
 Figure 7.7: Output waveforms of negative phase shift

The system’s output was observed to have a DC voltage of 25.75 V. The

output current waveform exhibited an average value of -6.02 A, while the output
power waveform had an average value of -155 W.

Figure 7.8: ZVS for negative phase shift

It is verified that switching of the MOSFET occurs when the voltage across
it is zero.

27
Figure 7.9: Inductor current and voltage across transformer of DAB for negative
phase shift

The waveforms of voltage across the primary and secondary of the trans-
former and current through the inductor were [Link] inductor current of av-
erage value 4.708A was obtained.

7.2 CLOSED LOOP SIMULATION

LARGE SIGNAL MODEL OF DAB

Inductor current depends on input and output voltages,control parameters such as
turns ratio(n),inductance(L)[8].Output average current can be computed from the
given control parameters in [Link] average output current,

Figure 7.10: Inductor Current

28
 nV1 δ (2 − δ )
Io , K = (7.1)
8 fs L

DAB can be modelled as a current source which is feeding RC load,can be used as

large signal model
v2 (s) R
= (7.2)
io (s) 1 + sCR
.
nV1 δ (2 − δ )
Io = (7.3)
8 fs L
I0
δ 2 − 2δ + nV1
=0 (7.4)
8 fs L

s
I0
δ = 1− 1− nV1
(7.5)
8 fs L

Keeping the output current constant according to the C rating of the battery
used,different values of δ are obtained for different input voltage values.

7.2.1 SIMULATION DIAGRAM FOR CLOSED LOOP SIMULATION

The closed loop simulation for the converter was implemented using MAT-
LAB.A 36V,6Ah and 24V and a 9Ah batteries were used for the simultion as per
the design.A phase delay of δ calculated based on the input voltage was given. The
power flow was observed with SOC 60% and 10%. The simulation of the Dual
Active Bridge (DAB) converter was conducted with an input voltage of 36 V and a
target output voltage of 24 V.

Simulation was done using a 36V 6Ah battery on the input side and 24V 9Ah bat-
tery on the output [Link] inductor of leakage inductance 32.3838µH is connected
in the primary [Link] filter capacitors of 100µF and 22µF are used in the input
and output [Link] first battery is set to 60% SOC and second battery to
10%.The pulse to the secondary bridge is given a delay which is calculated based
on the value of input [Link] calculation is done by the matlab function block.

29
 Figure 7.11: Closed loop simulation diagram

The simulation results are:

Output Voltage:The output side stabilizes at a constant DC voltage of 25.03 V. This
voltage level is also reflected across Battery 1, which becomes 38.49V, indicating
efficient voltage transfer between the batteries.
Output Current: The output current is a rectified version of the inductor current. It
has an average value of 9.33 A.
Power Flow:The instantaneous and average power waveforms demonstrate effec-
tive power transfer from the input to the output. The average power output was
measured to be 233.7 W, which is consistent with the converter’s design objectives.

30
 Figure 7.12: Input Waveforms of closed loop

During the experiment, a DC input voltage of 38.49 V is observed across the

first battery. The observed input current waveform exhibited an average value of
6.225 A, while the corresponding input power waveform had an average value of
239 W.

Figure 7.13: Output waveforms of closed loop

The system’s output was observed to have a DC voltage of 25.03 V. The output
current waveform exhibited an average value of 9.33 A, while the output power
waveform had an average value of 233.7 W.

31
 Figure 7.14: Inductor current and transformer

The voltage waveforms across the primary and secondary of the transformer
and current through the inductor were observed.

Figure 7.15: Pulse and Delayed Pulse

A pulse of 50 kHz and 0.5 duty ratio and a delayed pulse with delay calcu-
lated based on the input voltage is observed.

Both open-loop and closed-loop simulations were performed, and the correspond-
ing waveforms were analyzed. In the open-loop simulation, bidirectional power

32
flow was achieved by applying positive and negative phase shifts, demonstrating
power transfer in both directions. In the closed-loop simulation, the phase shift
automatically adjusted in response to changes in input voltage, implementing a
feedforward control strategy. This adaptive control ensured stable operation by dy-
namically regulating the phase [Link] flow was acheived in one direction. The
resulting waveforms were observed to evaluate system performance under varying
conditions.

33
 Chapter 8
HARDWARE AND EXPERIMENTATION

This chapter presents the hardware implementation and experimental vali-

dation of the proposed system. It details the integration of key hardware compo-
nents, followed by a systematic evaluation of their performance under real-world
[Link] chapter outlines the selection of components, circuit design, PCB
development, and assembly, ensuring compliance with the system’s operational re-
quirements. Additionally, experimental procedures, test setups, and measurement
methodologies are described to assess the system’s efficiency, reliability, and over-
all performance.

8.1 COMPONENTS

8.1.1 STM32F303RET6

STM32F303RET6 is based on the high-performance ARM®Cortex®-M4

32-bit RISC core with FPU operating at a frequency of 72 MHz, and embedding a
floating point unit (FPU), a memory protection unit (MPU) and an embedded trace
macrocell (ETM). The family incorporates high-speed embedded memories (512-
Kbyte Flash memory, 80-Kbyte SRAM), a flexible memory controller (FSMC) for
static memories (SRAM, PSRAM, NOR and NAND), and an extensive range of
enhanced I/Os and peripherals connected to an AHB and two APB [Link] operates
in the -40 to +85°C and -40 to +105°C temperature ranges from a 2.0 to 3.6 V power
[Link] devices offer four fast 12-bit ADCs (5 Msps) and five general-purpose
16-bit timers.
 Figure 8.1: STM32F303RET6

8.1.2 BATTERY

36V 6Ah and 24 V 9Ah batteries are needed. Inorder to get 36V, three 12V
6Ah batteries are connected in series, similarly inorder to get 24V, two 12V 9Ah
batteries are connected in series.

Figure 8.2: BATTERY

8.1.3 HCPL3120

The HCPL-3120 gate drive optocouplers contain a GaAsP LED. The LED is
optically coupled to an integrated circuit with a power output stage. It is used for
driving MOSFETs. The high operating voltage range of the output stage provides
the drive voltages required by gate controlled devices.

Figure 8.3: HCPL3120

35
 COMPONENTS SPECIFICATIONS DIAGRAM

Inductor 32.38µH

Transformer 15 turns in primary and 10 turns in secondary

LM358 36-V,1.2-MHz,3-mV offset voltage

LM7805 output voltage=5V,maximum output current of 1.5A

B0515S-2WR3 5V-15V
Table 8.1: Components Used

8.1.4 IRFB4110

The IRFB4110 is an N-channel power MOSFET designed for high-efficiency

switching applications. It features a low on-resistance RDS of around 4.5mΩ, which
helps minimize conduction losses. With a maximum drain-source voltage of 100V
and a continuous drain current rating of over 100A, it’s suitable for high-power
circuits. The MOSFET also offers fast switching performance due to its low gate
charge, making it ideal for high-frequency designs.

Figure 8.4: IRFB4110

36
8.2 KI CAD SCHEMATIC FOR PCB

Figure 8.5: Gate Driver Circuits

Figure 8.6: Voltage Regulator

37
 Figure 8.7: DAB

Figure 8.8: Volatge Sensor

38
 8.3 ALGORITHM OF PROGRAM

Step 1: System Initialization

1. Initialize the STM32 HAL Library which resets peripherals, initializes the Flash
interface, and sets up the system tick timer.

2. Configure the System Clock:

[Link] Type: Use HSI (High-Speed Internal) clock.
ii. PLL (Phase Locked Loop) Settings: Enable PLL to generate the required system
clock frequency.
[Link] Clock Configuration: Define clock dividers for AHB, APB1, and APB2
buses to optimize peripheral operation.

Step 2:GPIO Configuration

Enable the clock for GPIO ports A, B, and [Link] the GPIO pins associated
with TIM1 and TIM8 PWM outputs with the following parameters:

1. Setting the pins in Alternate Function Mode.

2. Configuring the pins for high-speed operation.

3. Mapping them to the corresponding timer’s alternate function.

For TIM1, main output on PA8, complementary output on [Link] TIM 8,main
output on PC6, complementary output on PA7 .
Step 3: Timer Configuration

1. For both timers prescaler is set to 0 (ensuring no frequency division).

2. Configure counter mode as up-counter.

3. Both timers have a period of 1439 (counter rolls over at this value)

4. Both use PWM1 mode with a pulse width of 720 for 50%

5. TIM1 is configured as the master [Link] 2 of TIM1 is used as a trigger

output (reference point at 360)for 5s. Slave mode triggered by TIM1.

39
6. TIM8 is configured as a slave timer triggered by TIM1.

Step 4:Pulse Generation

The system will produce four synchronized PWM signals:

1. TIM1 Channel 1 (PA8) and TIM1 Channel 1(Complement)(PB13): First pulse pair
(in phase)

2. TIM8 Channel 1 (PC6) and TIM8 Channel 1(Complement)(PA7): Second pulse

pair (delayed by 5s)

Step 5:Infinite Execution Loop

Enters an infinite while loop to allow the STM32 microcontroller to keep run-
[Link] timers operate independently, generating continuous PWM pulses with
the specified phase shift.

8.4 HARDWARE SETUP

Figure 8.9: EXPERIMENTAL SETUP

The Dual Active Bridge (DAB) converter circuit was tested by supplying a 30V
DC input from a DC Supply. A variable resistor was connected at the output to
simulate different load conditions and observe performance variations. All com-
ponents were assembled on a printed circuit board (PCB) to ensure a compact and

40
stable design. The STM32F303RET6 microcontroller was programmed to generate
the required switching pulses, which were then fed to the MOSFETs via dedicated
driver circuits. These drivers ensured proper voltage and current levels for efficient
and reliable switching operation of the MOSFETs.

8.5 RESULTS

8.5.1 PULSE USING MICROCONTROLLER

Figure 8.10: Pulse from STM32

A 50kHz pulse with a 0.5 duty cycle is generated from the D7 pin of the STM32F303RET6
[Link], a complementary pulse—where the high and low states
are inverted relative to the original pulse—is produced from the D4 pin. Further-
more, a delayed pulse is generated from the D14 pin, which has the same frequency
but is shifted by 5µs relative to the original [Link] delay ensures that the rising
and falling edges of this pulse occur 5µs later than the original signal from D7. This
delayed signal can be used for phase-shifted switching. A complementary version
of the delayed pulse is produced from the D11 pin, meaning it is an inverted ver-
sion of the D14 [Link] signals are used to control the MOSFETs in the Dual
Active Bridge (DAB) converter, ensuring proper timing for efficient power transfer.

41
8.5.2 VOLTAGE SENSOR

A voltage sensor was designed using the LM358 operational amplifier, configured
to produce an output of 3V when an input voltage of 40V is applied. The circuit was
assembled and tested, and it was observed that when 30V was applied at the input,
the output measured approximately 2.75V, confirming the expected operation.

8.5.3 OUTPUT ACROSS DRIVER CIRCUIT

Figure 8.11: Driver Output

A boosted 50kHz pulse with a 0.5 duty cycle is obtained from the output of the
driver circuit, providing sufficient voltage and current levels to effectively drive
the IRFB4110 MOSFET. The driver circuit ensures that the pulse has the neces-
sary strength to switch the MOSFET efficiently, minimizing switching losses and
ensuring reliable operation. This enhanced pulse is observed using a Digital Stor-
age Oscilloscope (DSO), which allows for precise analysis of signal characteristics
such as amplitude, timing, and waveform integrity. Proper signal strength is crucial
for ensuring that the MOSFET operates within its optimal switching parameters,
preventing issues like incomplete turn-on or excessive heating.

42
8.5.4 VOLTAGE ACROSS TRANSFORMER WINDING

Figure 8.12: Voltage across primary winding of transformer

A voltage of 33 V was observed on the primary side of the transformer.

Figure 8.13: Voltage across secondary winding of transformer

A voltage of 22 V was obtained on the secondary side of the transformer.

The STM32F303RET6 microcontroller was used to generate the required 50kHz

pulses, which were supplied to the switches. The circuit was tested by applying a
30V DC input, and the resulting waveforms were observed to analyze its perfor-
mance.

43
 Chapter 9
CONCLUSION

Our project on V2V bidirectional charging utilizing DAB topology highlights a sig-
nificant advancement in electric vehicle energy management. The DAB architecture
offers efficient power conversion and enhanced control capabilities, making it well-
suited for dynamic energy transfer between [Link] analysis demonstrated that
the DAB topology not only facilitates effective energy exchange but also optimizes
the overall efficiency of the charging [Link] project demonstrates the imple-
mentation of a Dual Active Bridge (DAB) [Link] extensive simulations
and hardware validation, the system exhibited stable voltage regulation, efficient
power flow control, and minimal energy losses, confirming its viability for real-
world applications.
The simulation results validated the effectiveness of the DAB converter in main-
taining power stability under varying load conditions while ensuring efficient en-
ergy transfer between vehicles. Additionally, hardware experiments demonstrated
the practical feasibility of the [Link] this technology has the potential
to mitigate range anxiety, enhance charging accessibility in remote locations, and
contribute to a more resilient and interconnected EV ecosystem. While our findings
showcase the advantages of using DAB for V2V charging, challenges such as sys-
tem complexity, cost, and the need for standardized communication protocols must
be addressed to realize its full potential. Continued advancements in semiconductor
technology and implementing efficient control algorithms will play a pivotal role in
overcoming these [Link],future research and collaboration will be essen-
tial to explore its applications further, paving the way for a more interconnected and
resilient energy landscape.
 Chapter 10
FUTURE PROSPECTS

To enhance the practicality and efficiency of bidirectional Vehicle-to-Vehicle (V2V)

charging, several key advancements are [Link] of the primary areas for im-
provement is the development and implementation of a more sophisticated control
algorithm to optimize power transfer efficiency. Optimizing the control algorithm
with advanced techniques like model predictive control (MPC) can improve power
transfer efficiency, minimize losses, and enhance system stability under dynamic
conditions. Implementing robust communication protocols such as ISO 15118,
CAN, or wireless technologies will enable seamless data exchange between vehi-
cles, ensuring coordinated and intelligent energy sharing. Additionally, integrating
a Battery Management System (BMS) will allow real-time monitoring of State of
Charge (SOC), State of Health (SOH), and temperature, ensuring safe and efficient
[Link] transition this system from a proof-of-concept to a real-world applica-
tion, several practical challenges need to be addressed. Standardization and regu-
latory compliance will be essential to ensure compatibility between different EV
models and manufacturers. By addressing these future prospects, the bidirectional
V2V charging system can evolve into a highly efficient, intelligent, and scalable
solution, significantly contributing to the advancement of electric mobility and sus-
tainable energy ecosystems.
 BIBLIOGRAPHY

[1] A. R. Rodrı́guez Alonso, J. Sebastian, D. G. Lamar, M. M. Hernando and A.

Vazquez, ”An overall study of a Dual Active Bridge for bidirectional DC/DC
conversion,” 2010 IEEE Energy Conversion Congress and Exposition, At-
lanta, GA, USA, 2010, pp.

[2] A Comprehensive Review of the Bidirectional Converter Topologies for

the Vehicle-to-Grid System by Suresh Panchanathan1,Pradeep Vishnuram
1,Narayanamoorthi Rajamanickam1,Mohit Bajaj 2,,*,Vojtech Blazek4,Lukas
Prokop4,* andStanislav Misak4.

[3] . Joarder and A. Ghosh, ”Design and Implementation of Dual Active Bridge
Converter for DC Microgrid application,” 2022 IEEE Delhi Section Con-
ference (DELCON), New Delhi, India, 2022, pp. 1-6, doi: 10.1109/DEL-
CON54057.2022.9753372.

[4] S. Yin, S. Debnath, Q. Xia, S. Marti, P. Marthi and M. Saeedifard, ”Compar-

ison of Simulation of Dual-Active Bridge in Different Simulators and Using
Different Simulation Methods,” 2021 IEEE 22nd Workshop on Control and
Modelling of Power Electronics (COMPEL), Cartagena, Colombia, 2021, pp.
1-7, doi: 10.1109/COMPEL52922.2021.9645935

[5] Video:creator Timmcrae’s Lecture 8.9: The DAB

and Soft Switching uploaded on jun 15 2021
URL:[Link]

[6] Dey, S. S. Chakraborty, S. Singh and K. Hatua, ”Design of High Fre-

quency Transformer for a Dual Active Bridge (DAB) Converter,” 2022 IEEE
Global Conference on Computing, Power and Communication Technolo-
gies (GlobConPT), New Delhi, India, 2022, pp. 1-6, doi: 10.1109/Glob-
ConPT57482.2022.9938249.,

46
[7] Video:you tube video uploaded by NPTELHERD,
Mod-04 Lec-06 Transformer on Jan 9 2014
URL:[Link]

[8] K. Zhang, Z. Shan and J. Jatskevich, ”Large- and Small-Signal Average-

Value Modeling of Dual-Active-Bridge DC–DC Converter Considering Power
Losses,” in IEEE Transactions on Power Electronics, vol. 32, no. 3, pp. 1964-
1974, March 2017, doi: 10.1109/TPEL.2016.2555929.

47
 Appendix A

DATA SHEETS

[Link] OF IRFB4110- Courtesy:[Link]

/power/mosfet/n-channel/irfb4110/
[Link] OF STM32 NUCLEO BOARD-Courtesy:
[Link] en/datasheet/[Link]
[Link] OF EE CORE-Courtesy:[Link]
[Link]
[Link] OF HCPL3120- Courtesy:[Link]
pdf/download/82098/HP/[Link]
[Link] OF LM7805-Courtesy:[Link]
pdf/ download/838007/TI1/[Link]
[Link] OF LM358-Courtesy:[Link]
sheet/pdf/ [Link]
[Link] OF B0515S-2WR3-Courtesy:[Link]
2wr3-5v-to-15v-2w-133ma-dc-to-dc-isolation-voltage-1500vdc-power-
module-converter/
 IRFB4110PbF
HEXFET® Power MOSFET
Applications
l High Efficiency Synchronous Rectification in SMPS
D VDSS 100V
l Uninterruptible Power Supply RDS(on) typ. 3.7mΩ
l High Speed Power Switching
max. 4.5mΩ
l Hard Switched and High Frequency Circuits G
ID (Silicon Limited) 180A c
S ID (Package Limited) 120A
Benefits
l Improved Gate, Avalanche and Dynamic dv/dt D
Ruggedness
l Fully Characterized Capacitance and Avalanche
SOA
l Enhanced body diode dV/dt and dI/dt Capability S
D
l Lead Free G
l RoHS Compliant, Halogen-Free TO-220AB

G D S
Gate Drain Source

Standard Pack
Base Part Number Package Type Orderable Part Number
Form Quantity
IRFB4110PbF TO-220 Tube 50 IRFB4110PbF

Absolute Maximum Ratings

Symbol Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V (Silicon Limited) 180c A
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V (Silicon Limited) 130c
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V (Wire Bond Limited) 120
IDM Pulsed Drain Current d 670
PD @TC = 25°C Maximum Power Dissipation 370 W
Linear Derating Factor 2.5 W/°C
VGS Gate-to-Source Voltage ± 20 V
dv/dt Peak Diode Recovery f 5.3 V/ns
TJ Operating Junction and -55 to + 175 °C
TSTG Storage Temperature Range
Soldering Temperature, for 10 seconds 300
(1.6mm from case)
Mounting torque, 6-32 or M3 screw x
10lb in (1.1N m)x
Avalanche Characteristics
EAS (Thermally limited) Single Pulse Avalanche Energy e 190 mJ
IAR Avalanche Current d See Fig. 14, 15, 22a, 22b A
EAR Repetitive Avalanche Energy g mJ

Thermal Resistance
Symbol Parameter Typ. Max. Units
RθJC Junction-to-Case k ––– 0.402
RθCS Case-to-Sink, Flat Greased Surface 0.50 ––– °C/W
RθJA Junction-to-Ambient j ––– 62

1 [Link] © 2014 International Rectifier Submit Datasheet Feedback April 28, 2014
 IRFB4110PbF

Static @ TJ = 25°C (unless otherwise specified)

Symbol Parameter Min. Typ. Max. Units Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage 100 ––– ––– V VGS = 0V, ID = 250µA
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient ––– 0.108 ––– V/°C Reference to 25°C, ID = 5mA d
RDS(on) Static Drain-to-Source On-Resistance ––– 3.7 4.5 mΩ VGS = 10V, ID = 75A g
VGS(th) Gate Threshold Voltage 2.0 ––– 4.0 V VDS = VGS, ID = 250µA
IDSS Drain-to-Source Leakage Current ––– ––– 20 µA VDS = 100V, VGS = 0V
––– ––– 250 VDS = 100V, VGS = 0V, TJ = 125°C
IGSS Gate-to-Source Forward Leakage ––– ––– 100 nA VGS = 20V
Gate-to-Source Reverse Leakage ––– ––– -100 VGS = -20V
Dynamic @ TJ = 25°C (unless otherwise specified)
Symbol Parameter Min. Typ. Max. Units Conditions
gfs Forward Transconductance 160 ––– ––– S VDS = 50V, ID = 75A
Qg Total Gate Charge ––– 150 210 nC ID = 75A
Qgs Gate-to-Source Charge ––– 35 ––– VDS = 50V
Qgd Gate-to-Drain ("Miller") Charge ––– 43 ––– VGS = 10V g
RG Gate Resistance ––– 1.3 ––– Ω
td(on) Turn-On Delay Time ––– 25 ––– ns VDD = 65V
tr Rise Time ––– 67 ––– ID = 75A
td(off) Turn-Off Delay Time ––– 78 ––– RG = 2.6Ω
tf Fall Time ––– 88 ––– VGS = 10V g
Ciss Input Capacitance ––– 9620 ––– pF VGS = 0V
Coss Output Capacitance ––– 670 ––– VDS = 50V
Crss Reverse Transfer Capacitance ––– 250 ––– ƒ = 1.0MHz
Coss eff. (ER) Effective Output Capacitance (Energy Related) i ––– 820 ––– VGS = 0V, VDS = 0V to 80V j
Coss eff. (TR) Effective Output Capacitance (Time Related) h ––– 950 ––– VGS = 0V, VDS = 0V to 80V h
Diode Characteristics
Symbol Parameter Min. Typ. Max. Units Conditions
IS Continuous Source Current ––– ––– 170 c A MOSFET symbol D

(Body Diode) showing the

ISM Pulsed Source Current ––– ––– 670 integral reverse G

(Body Diode) di p-n junction diode. S

VSD Diode Forward Voltage ––– ––– 1.3 V TJ = 25°C, IS = 75A, VGS = 0V g
trr Reverse Recovery Time ––– 50 75 ns TJ = 25°C VR = 85V,
––– 60 90 TJ = 125°C IF = 75A
Qrr Reverse Recovery Charge ––– 94 140 nC TJ = 25°C di/dt = 100A/µs g
––– 140 210 TJ = 125°C
IRRM Reverse Recovery Current ––– 3.5 ––– A TJ = 25°C
ton Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)

Notes:
 Calculated continuous current based on maximum allowable junction „ ISD ≤ 75A, di/dt ≤ 630A/µs, VDD ≤ V(BR)DSS, TJ ≤ 175°C.
temperature. Bond wire current limit is 120A. Note that current Pulse width ≤ 400µs; duty cycle ≤ 2%.
limitations arising from heating of the device leads may occur with † Coss eff. (TR) is a fixed capacitance that gives the same charging time
some lead mounting arrangements. as Coss while VDS is rising from 0 to 80% VDSS .
‚ Repetitive rating; pulse width limited by max. junction ‡ Coss eff. (ER) is a fixed capacitance that gives the same energy as
temperature. Coss while VDS is rising from 0 to 80% VDSS.
ƒ Limited by TJmax, starting TJ = 25°C, L = 0.033mH ˆ When mounted on 1" square PCB (FR-4 or G-10 Material). For recom
RG = 25Ω, IAS = 108A, VGS =10V. Part not recommended for use mended footprint and soldering techniques refer to application note #AN-994.
above this value. ‰ Rθ is measured at TJ approximately 90°C.

2 [Link] © 2014 International Rectifier Submit Datasheet Feedback April 28, 2014
 NUCLEO‑XXXXRX NUCLEO‑XXXXRX‑P

Data brief

STM32 Nucleo-64 boards

Features
• Common features
– STM32 microcontroller in LQFP64 package
– 1 user LED shared with ARDUINO®
– 1 user and 1 reset push-buttons
– 32.768 kHz crystal oscillator
– Board connectors:
◦ ARDUINO® Uno V3 expansion connector
◦ ST morpho extension pin headers for full access to all STM32 I/Os
– Flexible power-supply options: ST-LINK, USB VBUS, or external sources
– On-board ST-LINK debugger/programmer with USB re-enumeration
capability: mass storage, Virtual COM port and debug port
– Comprehensive free software libraries and examples available with the
NUCLEO-G474RE example. Boards with STM32Cube MCU Package
different references show different – Support of a wide choice of Integrated Development Environments (IDEs)
layouts. Picture is not contractual.
including IAR Embedded Workbench®, MDK-ARM, and STM32CubeIDE
• Board-specific features
– External SMPS to generate Vcore logic supply
– 24 MHz HSE
– Board connectors:
◦ External SMPS experimentation dedicated connector
Product status link ◦ Micro-AB or Mini-AB USB connector for the ST-LINK
NUCLEO-XXXXRX ◦ MIPI® debug connector
NUCLEO-F030R8, NUCLEO-F070RB, – Arm® Mbed Enabled™ compliant
NUCLEO-F072RB, NUCLEO-F091RC,
NUCLEO-F103RB, NUCLEO-F302R8,
NUCLEO-F303RE, NUCLEO-F334R8, Description
NUCLEO-F401RE, NUCLEO-F410RB,
NUCLEO-F411RE, NUCLEO-F446RE, The STM32 Nucleo-64 board provides an affordable and flexible way for users to try
NUCLEO-G070RB, NUCLEO-G071RB, out new concepts and build prototypes by choosing from the various combinations of
NUCLEO-G0B1RE, NUCLEO-G431RB, performance and power consumption features, provided by the STM32
NUCLEO-G474RE, NUCLEO-G491RE, microcontroller. For the compatible boards, the external SMPS significantly reduces
NUCLEO-L010RB, NUCLEO-L053R8, power consumption in Run mode.
NUCLEO-L073RZ, NUCLEO-L152RE,
NUCLEO-L452RE, NUCLEO-L476RG. The ARDUINO® Uno V3 connectivity support and the ST morpho headers allow the
NUCLEO-XXXXRX-P
easy expansion of the functionality of the STM32 Nucleo open development platform
with a wide choice of specialized shields.
NUCLEO-L412RB-P,
NUCLEO-L433RC-P, The STM32 Nucleo-64 board does not require any separate probe as it integrates the
NUCLEO-L452RE-P. ST-LINK debugger/programmer.
The STM32 Nucleo-64 board comes with the STM32 comprehensive free software
libraries and examples available with the STM32Cube MCU Package.

DB2196 - Rev 14 - October 2020 [Link]

For further information contact your local STMicroelectronics sales office.
 NUCLEO‑XXXXRX NUCLEO‑XXXXRX‑P
Development environment

2 Development environment
2.1 System requirements
• Windows® OS (7, 8 and 10), Linux® 64-bit, or macOS®
• USB Type-A or USB Type-C® to Micro-B cable, or USB Type-A or USB Type-C® to Mini-B cable (depending
on the board reference)
Note: macOS® is a trademark of Apple Inc. registered in the U.S. and other countries.
All other trademarks are the property of their respective owners.

2.2 Development toolchains

• IAR Systems - IAR Embedded Workbench®(1)
• Keil® - MDK-ARM(1)
• STMicroelectronics - STM32CubeIDE
• Arm® - Mbed Studio(2) (3)

1. On Windows® only.
2. Arm and Mbed are registered trademarks or trademarks of Arm Limited (or its subsidiaries) in the US and or elsewhere.
3. Refer to the [Link] website and to the “Ordering information” section to determine which order codes are supported.

2.3 Demonstration software

The demonstration software, included in the STM32Cube MCU Package corresponding to the on-board
microcontroller, is preloaded in the STM32 Flash memory for easy demonstration of the device peripherals in
standalone mode. The latest versions of the demonstration source code and associated documentation can be
downloaded from [Link].

DB2196 - Rev 14 page 5/7

Ferroxcube

E cores and accessories E42/21/15

CORE SETS
Effective core parameters 43 0
handbook, halfpage −1.7

VALU 29.5 +1.4

0
SYMBOL PARAMETER UNIT
E 12.2 0
−0.5
Σ(I/A) core factor (C1) 0.548 mm−1
Ve effective volume 17300 mm3
R ≤ 0.6 +0.6
14.8
Ie effective length 97.0 mm 0 21
±0.2
Ae effective area 178 mm2
Amin minimum area 175 mm2
m mass of core half ≈ 44 g
R2

15.2 0
−0.6

CBW048

Dimensions in mm.

Fig.1 E42/21/15 core half.

Core halves
AL measured in combination with a non-gapped core half, clamping force for AL measurements 40 ±20 N, unless stated
otherwise.
AL TOTAL AIR GAP
GRADE µe TYPE NUMBER
(nH) (µm)
3C81 100 ±5%(1) ≈ 43 ≈ 3960 E42/21/15-3C81-E100
160 ±5%(1) ≈ 69 ≈ 2060 E42/21/15-3C81-E160
250 ±5%(1) ≈ 108 ≈ 1140 E42/21/15-3C81-E250
315 ±5% ≈ 137 ≈ 850 E42/21/15-3C81-A315
400 ±8% ≈ 173 ≈ 630 E42/21/15-3C81-A400
630 ±15% ≈ 273 ≈ 360 E42/21/15-3C81-A630
5300 ±25% ≈ 2300 ≈0 E42/21/15-3C81
3C90 100 ±5%(1) ≈ 43 ≈ 3960 E42/21/15-3C90-E100
160 ±5%(1) ≈ 69 ≈ 2060 E42/21/15-3C90-E160
250 ±5%(1) ≈ 108 ≈ 1140 E42/21/15-3C90-E250
315 ±5% ≈ 137 ≈ 850 E42/21/15-3C90-A315
400 ±8% ≈ 173 ≈ 630 E42/21/15-3C90-A400
630 ±15% ≈ 273 ≈ 360 E42/21/15-3C90-A630
3950 ±25% ≈ 1710 ≈0 E42/21/15-3C90
3C91 5300 ±25% ≈ 2300 ≈0 E42/21/15-3C91
3C92 3100 ±25% ≈ 1350 ≈0 E42/21/15-3C92
3C94 4100 ±25% ≈ 1780 ≈0 E42/21/15-3C94

2008 Sep 01 407

Ferroxcube

E cores and accessories E42/21/15

COIL FORMERS
General data for E42/21/15 coil former without pins

PARAMETER SPECIFICATION
Coil former material polybutyleneterephtalate (PBT), glass reinforced, flame retardant in
accordance with “UL 94V-0”; UL file number E45329(R)
Maximum operating temperature 155 °C, “IEC 60085”, class F

29 max. 30.8 max.

handbook, full pagewidth
2

34
17.9 15.7
max. +0.2

CBW494
12.6 +0.2 26.2 min.
14.6 28

Dimensions in mm.

Fig.2 E42/21/15 coil former.

Winding data and area product for E42/21/15 coil former without pins

MINIMUM AVERAGE AREA

WINDING
NUMBER OF WINDING LENGTH OF PRODUCT
AREA TYPE NUMBER
SECTIONS WIDTH TURN Ae x Aw
(mm2)
(mm) (mm) (mm4)
1 178 26.2 93 31700 CP-E42/21/15-1S

2008 Sep 01 409

2.0 Amp Output Current IGBT
Gate Drive Optocoupler

Technical Data
HCPL-3120
HCPL-J312
HCNW3120

Features CSA Approval Applications

• 2.0 A Minimum Peak Output VDE 0884 Approved • IGBT/MOSFET Gate Drive
Current VIORM = 630 Vpeak for • AC/Brushless DC Motor
• 15 kV/µs Minimum Common HCPL-3120 (Option 060) Drives
Mode Rejection (CMR) at VIORM = 891 Vpeak for
• Industrial Inverters
VCM = 1500 V HCPL-J312
VIORM = 1414 Vpeak for • Switch Mode Power
• 0.5 V Maximum Low Level Supplies
HCNW3120
Output Voltage (VOL)
BSI Certified (HCNW3120
Eliminates Need for Negative
only) (Pending)
Gate Drive
• ICC = 5 mA Maximum Supply
Current
Functional Diagram
• Under Voltage Lock-Out HCPL-3120/J312 HCNW3120
Protection (UVLO) with
Hysteresis N/C 1 8 VCC N/C 1 8 VCC

• Wide Operating VCC Range:

ANODE 2 7 VO ANODE 2 7 VO
15 to 30 Volts
• 500 ns Maximum Switching CATHODE 3 6 VO CATHODE 3 6 N/C
Speeds
• Industrial Temperature N/C 4 5 VEE N/C 4 5 VEE
SHIELD SHIELD
Range: -40°C to 100°C
• Safety Approval
UL Recognized
2500 Vrms for 1 min. for TRUTH TABLE
HCPL-3120 VCC - VEE VCC - VEE
3750 Vrms for 1 min. for “POSITIVE GOING” “NEGATIVE GOING”
HCPL-J312 LED (i.e., TURN-ON) (i.e., TURN-OFF) VO
5000 Vrms for 1 min. for OFF 0 - 30 V 0 - 30 V LOW
HCNW3120 ON 0 - 11 V 0 - 9.5 V LOW
ON 11 - 13.5 V 9.5 - 12 V TRANSITION
ON 13.5 - 30 V 12 - 30 V HIGH

A 0.1 µF bypass capacitor must be connected between pins 5 and 8.

CAUTION: It is advised that normal static precautions be taken in handling and assembly of this component
to prevent damage and/or degradation which may be induced by ESD.
 2

Description operating voltage range of the stage which drives the IGBT gate.
The HCPL-3120 contains a output stage provides the drive The HCNW3120 has the highest
GaAsP LED while the HCPL-J312 voltages required by gate insulation voltage of
and the HCNW3120 contain an controlled devices. The voltage VIORM = 1414 Vpeak in the
AlGaAs LED. The LED is optically and current supplied by these VDE0884. The HCPL-J312 has an
coupled to an integrated circuit optocouplers make them ideally insulation voltage of
with a power output stage. These suited for directly driving IGBTs VIORM = 891 Vpeak and the
optocouplers are ideally suited with ratings up to 1200 V/100 A. VIORM = 630 Vpeak is also
for driving power IGBTs and For IGBTs with higher ratings, available with the HCPL-3120
MOSFETs used in motor control the HCPL-3120 series can be (Option 060).
inverter applications. The high used to drive a discrete power

Selection Guide
Part Number HCPL-3120 HCPL-J312 HCNW3120 HCPL-3150*
Output Peak Current ( IO) 2.0 A 2.0 A 2.0 A 0.5 A
VDE0884 Approval VIORM = 630 Vpeak VIORM = 891 Vpeak VIORM = 1414 Vpeak VIORM = 630 Vpeak
(Option 060) (Option 060)
*The HCPL-3150 Data sheet available. Contact Agilent sales representative or authorized distributor.

Ordering Information
Specify Part Number followed by Option Number (if desired)

Example:

HCPL-3120#XXX

060 = VDE0884, VIORM = 630 Vpeak (HCPL-3120 only)

300 = Gull Wing Surface Mount Option
500 = Tape and Reel Packaging Option

Option 500 contains 1000 units (HCPL-3120/J312), 750 units (HCNW3120) per reel.
Other options contain 50 units (HCPL-3120/J312), 42 units (HCNW312) per tube.
Option data sheets available. Contact Agilent sales representative or authorized distributor.
 7

Absolute Maximum Ratings

Parameter Symbol Min. Max. Units Note
Storage Temperature TS -55 125 °C
Operating Temperature TA -40 100 °C
Average Input Current IF(AVG) 25 mA 1
Peak Transient Input Current
IF(TRAN) 1.0 A
(<1 µs pulse width, 300 pps)
Reverse Input Voltage HCPL-3120 VR 5 Volts
HCPL-J312 3
HCNW3120
“High” Peak Output Current IOH(PEAK) 2.5 A 2
“Low” Peak Output Current IOL(PEAK) 2.5 A 2
Supply Voltage (VCC - VEE) 0 35 Volts
Input Current (Rise/Fall Time) tr(IN) / tf(IN) 500 ns
Output Voltage VO(PEAK) 0 VCC Volts
Output Power Dissipation PO 250 mW 3
Total Power Dissipation PT 295 mW 4
Lead Solder HCPL-3120 260°C for 10 sec., 1.6 mm below seating plane
Temperature HCPL-J312
HCNW3120 260°C for 10 sec., up to seating plane
Solder Reflow Temperature Profile See Package Outline Drawings section

Recommended Operating Conditions

Parameter Symbol Min. Max. Units
Power Supply Voltage (VCC - VEE) 15 30 Volts
Input Current (ON) HCPL-3120
7
HCPL-J312 IF(ON) 16 mA
HCNW3120 10
Input Voltage (OFF) VF(OFF) -3.0 0.8 V
Operating Temperature TA -40 100 °C
 Product Sample & Technical Tools & Support &
Folder Buy Documents Software Community

LM340, LM340A, LM7805, LM7812, LM7815

SNOSBT0K – FEBRUARY 2000 – REVISED JULY 2016

LM340, LM340A and LM78xx Wide VIN 1.5-A Fixed Voltage Regulators
1 Features 3 Description
•
1 Output Current up to 1.5 A The LM340 and LM78xx monolithic 3-terminal
positive voltage regulators employ internal current-
• Available in Fixed 5-V, 12-V, and 15-V Options limiting, thermal shutdown and safe-area
• Output Voltage Tolerances of ±2% at TJ = 25°C compensation, making them essentially indestructible.
(LM340A) If adequate heat sinking is provided, they can deliver
• Line Regulation of 0.01% / V of at 1-A Load over 1.5-A output current. They are intended as fixed
(LM340A) voltage regulators in a wide range of applications
including local (on-card) regulation for elimination of
• Load Regulation of 0.3% / A (LM340A) noise and distribution problems associated with
• Internal Thermal Overload, Short-Circuit and SOA single-point regulation. In addition to use as fixed
Protection voltage regulators, these devices can be used with
• Available in Space-Saving SOT-223 Package external components to obtain adjustable output
voltages and currents.
• Output Capacitance Not Required for Stability
Considerable effort was expended to make the entire
2 Applications series of regulators easy to use and minimize the
number of external components. It is not necessary to
• Industrial Power Supplies bypass the output, although this does improve
• SMPS Post Regulation transient response. Input bypassing is needed only if
• HVAC Systems the regulator is located far from the filter capacitor of
the power supply.
• White Goods
SPACE LM7805 is also available in a higher accuracy and
better performance version (LM340A). Refer to
Available Packages LM340A specifications in the LM340A Electrical
Characterisitcs table.
Pin 1. Input
2. Ground
3. Output 2 Device Information(1)
1
Tab/Case is Ground or Output PART NUMBER PACKAGE BODY SIZE (NOM)
DDPAK/TO-263 (3) 10.18 mm × 8.41 mm
TO-3 TO-220
LM340x SOT-23 (4) 6.50 mm × 3.50 mm
2
3 LM78xx TO-220 (3) 14.986 mm × 10.16 mm
1
TO-3 (2) 38.94 mm x 25.40 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.

TO-263 SOT-223 Fixed Output Voltage Regulator

1 2 2
3 1
3

*Required if the regulator is located far from

the power supply filter.
**Although no output capacitor is needed
for stability, it does help transient response.
(If needed, use 0.1-μF, ceramic disc).

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
 LM340, LM340A, LM7805, LM7812, LM7815
[Link] SNOSBT0K – FEBRUARY 2000 – REVISED JULY 2016

5 Pin Configuration and Functions

LM7805 and LM7812 KTT Package

3-Pin DDPAK/TO-263 LM7805 DCY Package
Top View 4-Pin SOT-223
Side View

GND

LM7805, LM7812, and LM7815 NDE Package

3-Pin TO-220 LM340K-5.0 NDS Package
Top View 2-Pin TO-3
Top View

GND

GND

Pin Functions
PIN
I/O DESCRIPTION
NAME NO.
INPUT 1 I Input voltage pin
GND 2 I/O Ground pin
OUTPUT 3 O Output voltage pin

Copyright © 2000–2016, Texas Instruments Incorporated Submit Documentation Feedback 3

Product Folder Links: LM340 LM340A LM7805 LM7812 LM7815
LM340, LM340A, LM7805, LM7812, LM7815
SNOSBT0K – FEBRUARY 2000 – REVISED JULY 2016 [Link]

6.6 LM340 / LM7805 Electrical Characteristics,

VO = 5 V, VI = 10 V
0°C ≤ TJ ≤ 125°C unless otherwise specified (1)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
TJ = 25°C, 5 mA ≤ IO ≤ 1 A 4.8 5 5.2 V
VO Output voltage PD ≤ 15 W, 5 mA ≤ IO ≤ 1 A 4.75 5.25
V
7.5 V ≤ VIN ≤ 20 V
TJ = 25°C 3 50
mV
7V ≤ VIN ≤ 25V
IO = 500 mA
Over temperature 50
mV
8V ≤ VIN ≤ 20V
ΔVO Line regulation
TJ = 25°C 50
mV
7.5V ≤ VIN ≤ 20V
IO ≤ 1 A
Over temperature 25
mV
8V ≤ VIN ≤ 12V
5 mA ≤ IO ≤ 1.5 A 10 50 mV
TJ = 25°C
ΔVO Load regulation 250 mA ≤ IO ≤ 750 mA 25 mV
Over temperature, 5 mA ≤ IO ≤ 1 A 50 mV
TJ = 25°C 8 mA
IQ Quiescent current IO ≤ 1 A
Over temperature 8.5 mA
0°C ≤ TJ ≤ 125°C, 5 mA ≤ IO ≤ 1 A 0.5 mA
TJ = 25°C, IO ≤ 1 A 1 mA
ΔIQ Quiescent current change
7 V ≤ VIN ≤ 20 V Over temperature, IO ≤ 500 1
mA
mA
VN Output noise voltage TA = 25°C, 10 Hz ≤ f ≤ 100 kHz 40 μV
TJ = 25°C, IO ≤ 1 A 62 80 dB
f = 120 Hz
Ripple rejection Over temperature, IO ≤ 500 62
8 V ≤ VIN ≤ 18 V mA dB

Dropout voltage TJ = 25°C, IO = 1 A 2 V

Output resistance f = 1 kHz 8 mΩ
RO Short-circuit current TJ = 25°C 2.1 A
Peak output current TJ = 25°C 2.4 A
Average TC of VOUT Over temperature, IO = 5 mA −0.6 mV/°C
VIN Input voltage required to TJ = 25°C, IO ≤ 1 A
7.5 V
maintain line regulation

(1) All characteristics are measured with a 0.22-μF capacitor from input to ground and a 0.1-μF capacitor from output to ground. All
characteristics except noise voltage and ripple rejection ratio are measured using pulse techniques (tw ≤ 10 ms, duty cycle ≤ 5%).
Output voltage changes due to changes in internal temperature must be taken into account separately.

6 Submit Documentation Feedback Copyright © 2000–2016, Texas Instruments Incorporated

Product Folder Links: LM340 LM340A LM7805 LM7812 LM7815

 DATA SHEET
[Link]

Single Supply Dual PDIP−8

Operational Amplifiers N, AN, VN SUFFIX
CASE 626
8
1
LM258, LM358, LM358A,
LM358E, LM2904, LM2904A,
SOIC−8
8 D, VD SUFFIX

LM2904E, LM2904V, 1
CASE 751

NCV2904
Utilizing the circuit designs perfected for Quad Operational 8
Micro8]
Amplifiers, these dual operational amplifiers feature low power drain, DMR2 SUFFIX
CASE 846A
a common mode input voltage range extending to ground/VEE, and 1
single supply or split supply operation. The LM358 series is
equivalent to one−half of an LM324.
These amplifiers have several distinct advantages over standard PIN CONNECTIONS
operational amplifier types in single supply applications. They can
operate at supply voltages as low as 3.0 V or as high as 32 V, with
quiescent currents about one−fifth of those associated with the Output A 1 8 VCC
MC1741 (on a per amplifier basis). The common mode input range Output B
2 7
−
Inputs A +
includes the negative supply, thereby eliminating the necessity for
3 6
−
+ 5 Inputs B
VEE/Gnd
external biasing components in many applications. The output voltage
4

range also includes the negative power supply voltage. (Top View)

Features
• Short Circuit Protected Outputs ORDERING INFORMATION
See detailed ordering and shipping information on page 10 of
• True Differential Input Stage this data sheet.
• Single Supply Operation: 3.0 V to 32 V
• Low Input Bias Currents
DEVICE MARKING INFORMATION
• Internally Compensated See general marking information in the device marking
• Common Mode Range Extends to Negative Supply section on page 11 of this data sheet.

• Single and Split Supply Operation

• ESD Clamps on the Inputs Increase Ruggedness of the Device
without Affecting Operation
• NCV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant

© Semiconductor Components Industries, LLC, 2016 1 Publication Order Number:

August, 2021 − Rev. 34 LM358/D
 LM258, LM358, LM358A, LM358E, LM2904, LM2904A, LM2904E, LM2904V, NCV2904

MAXIMUM RATINGS (TA = +25°C, unless otherwise noted.)

Rating Symbol Value Unit
Power Supply Voltages Vdc
Single Supply VCC 32
Split Supplies VCC, VEE ±16
Input Differential Voltage Range (Note 1) VIDR ±32 Vdc
Input Common Mode Voltage Range VICR −0.3 to 32 Vdc
Output Short Circuit Duration tSC Continuous
Junction Temperature TJ 150 °C
Thermal Resistance, Junction−to−Air (Note 2) Case 846A RJA 238 °C/W
Case 751 212
Case 626 161
Storage Temperature Range Tstg −65 to +150 °C
Operating Ambient Temperature Range TA °C
LM258 −25 to +85
LM358, LM358A, LM358E 0 to +70
LM2904, LM2904A, LM2904E −40 to +105
LM2904V, NCV2904 (Note 3) −40 to +125
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Split Power Supplies.
2. All RJA measurements made on evaluation board with 1 oz. copper traces of minimum pad size. All device outputs were active.
3. NCV2904 is qualified for automotive use.

ESD RATINGS
Rating HBM MM Unit
ESD Protection at any Pin (Human Body Model − HBM, Machine Model − MM)
NCV2904 (Note 3) 2000 200 V
LM358E, LM2904E 2000 200 V
LM358DG/DR2G, LM2904DG/DR2G 250 100 V
All Other Devices 2000 200 V

[Link]
3
 LM258, LM358, LM358A, LM358E, LM2904, LM2904A, LM2904E, LM2904V, NCV2904

ELECTRICAL CHARACTERISTICS (VCC = 5.0 V, VEE = GND, TA = 25°C, unless otherwise noted.)
LM258 LM358, LM358E LM358A
Characteristic Symbol Min Typ Max Min Typ Max Min Typ Max Unit
Input Offset Voltage VIO mV
VCC = 5.0 V to 30 V, VIC = 0 V to VCC −1.7 V,
VO ] 1.4 V, RS = 0 
TA = 25°C − 2.0 5.0 − 2.0 7.0 − 2.0 3.0
TA = Thigh (Note 4) − − 7.0 − − 9.0 − − 5.0
TA = Tlow (Note 4) − − 7.0 − − 9.0 − − 5.0
Average Temperature Coefficient of Input Offset VIO/T − 7.0 − − 7.0 − − 7.0 − V/°C
Voltage
TA = Thigh to Tlow (Note 4)
Input Offset Current IIO − 3.0 30 − 5.0 50 − 5.0 30 nA
TA = Thigh to Tlow (Note 4) − − 100 − − 150 − − 75
Input Bias Current IIB − −45 −150 − −45 −250 − −45 −100
TA = Thigh to Tlow (Note 4) − −50 −300 − −50 −500 − −50 −200
Average Temperature Coefficient of Input Offset IIO/T − 10 − − 10 − − 10 − pA/°C
Current
TA = Thigh to Tlow (Note 4)
Input Common Mode Voltage Range (Note 5), VICR 0 − 28.3 0 − 28.3 0 − 28.5 V
VCC = 30 V
VCC = 30 V, TA = Thigh to Tlow 0 − 28 0 − 28 0 − 28
Differential Input Voltage Range VIDR − − VCC − − VCC − − VCC V
Large Signal Open Loop Voltage Gain AVOL V/mV
RL = 2.0 k, VCC = 15 V, For Large VO Swing, 50 100 − 25 100 − 25 100 −
TA = Thigh to Tlow (Note 4) 25 − − 15 − − 15 − −
Channel Separation CS − −120 − − −120 − − −120 − dB
1.0 kHz ≤ f ≤ 20 kHz, Input Referenced
Common Mode Rejection CMR 70 85 − 65 70 − 65 70 − dB
RS ≤ 10 k
Power Supply Rejection PSR 65 100 − 65 100 − 65 100 − dB
Output Voltage−High Limit VOH V
TA = Thigh to Tlow (Note 4)
VCC = 5.0 V, RL = 2.0 k, TA = 25°C 3.3 3.5 − 3.3 3.5 − 3.3 3.5 −
VCC = 30 V, RL = 2.0 k 26 − − 26 − − 26 − −
VCC = 30 V, RL = 10 k 27 28 − 27 28 − 27 28 −
Output Voltage−Low Limit VOL − 5.0 20 − 5.0 20 − 5.0 20 mV
VCC = 5.0 V, RL = 10 k,
TA = Thigh to Tlow (Note 4)
Output Source Current IO+ mA
VID = +1.0 V, VCC = 15 V 20 40 − 20 40 − 20 40 −
TA = Thigh to Tlow (LM358A Only) 10 − −
Output Sink Current IO−
VID = −1.0 V, VCC = 15 V 10 20 − 10 20 − 10 20 − mA
TA = Thigh to Tlow (LM358A Only) 5.0 − − mA
VID = −1.0 V, VO = 200 mV 12 50 − 12 50 − 12 50 − A
Output Short Circuit to Ground (Note 6) ISC − 40 60 − 40 60 − 40 60 mA
Power Supply Current (Total Device) ICC mA
TA = Thigh to Tlow (Note 4)
VCC = 30 V, VO = 0 V, RL = ∞ − 1.5 3.0 − 1.5 3.0 − 1.5 2.0
VCC = 5 V, VO = 0 V, RL = ∞ − 0.7 1.2 − 0.7 1.2 − 0.7 1.2
4. LM258: Tlow = −25°C, Thigh = +85°C LM358, LM358A, LM358E: Tlow = 0°C, Thigh = +70°C
LM2904/A/E: Tlow = −40°C, Thigh = +105°C LM2904V & NCV2904: Tlow = −40°C, Thigh = +125°C
NCV2904 is qualified for automotive use.
5. The input common mode voltage or either input signal voltage should not be allowed to go negative by more than 0.3 V. The upper end of
the common mode voltage range is VCC − 1.7 V.
6. Short circuits from the output to VCC can cause excessive heating and eventual destruction. Destructive dissipation can result from
simultaneous shorts on all amplifiers.

[Link]
4
 LM258, LM358, LM358A, LM358E, LM2904, LM2904A, LM2904E, LM2904V, NCV2904

ELECTRICAL CHARACTERISTICS (VCC = 5.0 V, VEE = Gnd, TA = 25°C, unless otherwise noted.)
LM2904/LM2904E LM2904A LM2904V, NCV2904
Characteristic Symbol Min Typ Max Min Typ Max Min Typ Max Unit
Input Offset Voltage VIO mV
VCC = 5.0 V to 30 V, VIC = 0 V to VCC −1.7 V,
VO ] 1.4 V, RS = 0 
TA = 25°C − 2.0 7.0 − 2.0 7.0 − − 7.0
TA = Thigh (Note 7) − − 10 − − 10 − − 13
TA = Tlow (Note 7) − − 10 − − 10 − − 10
Average Temperature Coefficient of Input Offset VIO/T − 7.0 − − 7.0 − − 7.0 − V/°C
Voltage
TA = Thigh to Tlow (Note 7)
Input Offset Current IIO − 5.0 50 − 5.0 50 − 5.0 50 nA
TA = Thigh to Tlow (Note 7) − 45 200 − 45 200 − 45 200
Input Bias Current IIB − −45 −250 − −45 −100 − −45 −250
TA = Thigh to Tlow (Note 7) − −50 −500 − −50 −250 − −50 −500
Average Temperature Coefficient of Input Offset IIO/T − 10 − − 10 − − 10 − pA/°C
Current
TA = Thigh to Tlow (Note 7)
Input Common Mode Voltage Range (Note 8), VICR 0 − 28.3 0 − 28.3 0 − 28.3 V
VCC = 30 V
VCC = 30 V, TA = Thigh to Tlow 0 − 28 0 − 28 0 − 28
Differential Input Voltage Range VIDR − − VCC − − VCC − − VCC V
Large Signal Open Loop Voltage Gain AVOL V/mV
RL = 2.0 k, VCC = 15 V, For Large VO Swing, 25 100 − 25 100 − 25 100 −
TA = Thigh to Tlow (Note 7) 15 − − 15 − − 15 − −
Channel Separation CS − −120 − − −120 − − −120 − dB
1.0 kHz ≤ f ≤ 20 kHz, Input Referenced
Common Mode Rejection CMR 50 70 − 50 70 − 50 70 − dB
RS ≤ 10 k
Power Supply Rejection PSR 50 100 − 50 100 − 50 100 − dB
Output Voltage−High Limit VOH V
TA = Thigh to Tlow (Note 7)
VCC = 5.0 V, RL = 2.0 k, TA = 25°C 3.3 3.5 − 3.3 3.5 − 3.3 3.5 −
VCC = 30 V, RL = 2.0 k 26 − − 26 − − 26 − −
VCC = 30 V, RL = 10 k 27 28 − 27 28 − 27 28 −
Output Voltage−Low Limit VOL − 5.0 20 − 5.0 20 − 5.0 20 mV
VCC = 5.0 V, RL = 10 k,
TA = Thigh to Tlow (Note 7)
Output Source Current IO+ 20 40 − 20 40 − 20 40 − mA
VID = +1.0 V, VCC = 15 V
Output Sink Current IO−
VID = −1.0 V, VCC = 15 V 10 20 − 10 20 − 10 20 − mA
VID = −1.0 V, VO = 200 mV − − − − − − − − − A
Output Short Circuit to Ground (Note 9) ISC − 40 60 − 40 60 − 40 60 mA
Power Supply Current (Total Device) ICC mA
TA = Thigh to Tlow (Note 7)
VCC = 30 V, VO = 0 V, RL = ∞ − 1.5 3.0 − 1.5 3.0 − 1.5 3.0
VCC = 5 V, VO = 0 V, RL = ∞ − 0.7 1.2 − 0.7 1.2 − 0.7 1.2
7. LM258: Tlow = −25°C, Thigh = +85°C LM358, LM358A, LM358E: Tlow = 0°C, Thigh = +70°C
LM2904/A/E: Tlow = −40°C, Thigh = +105°C LM2904V & NCV2904: Tlow = −40°C, Thigh = +125°C
NCV2904 is qualified for automotive use.
8. The input common mode voltage or either input signal voltage should not be allowed to go negative by more than 0.3 V. The upper end of
the common mode voltage range is VCC − 1.7 V.
9. Short circuits from the output to VCC can cause excessive heating and eventual destruction. Destructive dissipation can result from
simultaneous shorts on all amplifiers.
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.

[Link]
5
 B0515S-2WR3

Typical Application Circuit

65
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